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From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@gmail.com>
Cc: Akhil P Oommen <akhilpo@codeaurora.org>,
	freedreno@lists.freedesktop.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	dri-devel@lists.freedesktop.org,
	iommu@lists.linux-foundation.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Subject: [PATCHv8 3/8] iommu/arm-smmu: Move non-strict mode to use domain_attr_io_pgtbl_cfg
Date: Tue, 17 Nov 2020 20:00:42 +0530	[thread overview]
Message-ID: <672a1cf7bbfc43ab401a2c157dafa0e9099e67a2.1605621785.git.saiprakash.ranjan@codeaurora.org> (raw)
In-Reply-To: <cover.1605621785.git.saiprakash.ranjan@codeaurora.org>

Now that we have a struct domain_attr_io_pgtbl_cfg with quirks,
use that for non_strict mode as well thereby removing the need
for more members of arm_smmu_domain in the future.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
 drivers/iommu/arm/arm-smmu/arm-smmu.c | 7 ++-----
 drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 -
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c
index 7b05782738e2..5f066a1b7221 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
@@ -786,9 +786,6 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
 			goto out_clear_smmu;
 	}
 
-	if (smmu_domain->non_strict)
-		pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;
-
 	if (smmu_domain->pgtbl_cfg.quirks)
 		pgtbl_cfg.quirks |= smmu_domain->pgtbl_cfg.quirks;
 
@@ -1527,7 +1524,7 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain,
 	case IOMMU_DOMAIN_DMA:
 		switch (attr) {
 		case DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE:
-			*(int *)data = smmu_domain->non_strict;
+			*(int *)data = smmu_domain->pgtbl_cfg.quirks;
 			return 0;
 		default:
 			return -ENODEV;
@@ -1583,7 +1580,7 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
 	case IOMMU_DOMAIN_DMA:
 		switch (attr) {
 		case DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE:
-			smmu_domain->non_strict = *(int *)data;
+			smmu_domain->pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;
 			break;
 		default:
 			ret = -ENODEV;
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h
index 18fbed376afb..caae543ea077 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.h
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h
@@ -368,7 +368,6 @@ struct arm_smmu_domain {
 	const struct iommu_flush_ops	*flush_ops;
 	struct arm_smmu_cfg		cfg;
 	enum arm_smmu_domain_stage	stage;
-	bool				non_strict;
 	struct mutex			init_mutex; /* Protects smmu pointer */
 	spinlock_t			cb_lock; /* Serialises ATS1* ops and TLB syncs */
 	struct iommu_domain		domain;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@gmail.com>
Cc: linux-arm-msm@vger.kernel.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCHv8 3/8] iommu/arm-smmu: Move non-strict mode to use domain_attr_io_pgtbl_cfg
Date: Tue, 17 Nov 2020 20:00:42 +0530	[thread overview]
Message-ID: <672a1cf7bbfc43ab401a2c157dafa0e9099e67a2.1605621785.git.saiprakash.ranjan@codeaurora.org> (raw)
In-Reply-To: <cover.1605621785.git.saiprakash.ranjan@codeaurora.org>

Now that we have a struct domain_attr_io_pgtbl_cfg with quirks,
use that for non_strict mode as well thereby removing the need
for more members of arm_smmu_domain in the future.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
 drivers/iommu/arm/arm-smmu/arm-smmu.c | 7 ++-----
 drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 -
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c
index 7b05782738e2..5f066a1b7221 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
@@ -786,9 +786,6 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
 			goto out_clear_smmu;
 	}
 
-	if (smmu_domain->non_strict)
-		pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;
-
 	if (smmu_domain->pgtbl_cfg.quirks)
 		pgtbl_cfg.quirks |= smmu_domain->pgtbl_cfg.quirks;
 
@@ -1527,7 +1524,7 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain,
 	case IOMMU_DOMAIN_DMA:
 		switch (attr) {
 		case DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE:
-			*(int *)data = smmu_domain->non_strict;
+			*(int *)data = smmu_domain->pgtbl_cfg.quirks;
 			return 0;
 		default:
 			return -ENODEV;
@@ -1583,7 +1580,7 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
 	case IOMMU_DOMAIN_DMA:
 		switch (attr) {
 		case DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE:
-			smmu_domain->non_strict = *(int *)data;
+			smmu_domain->pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;
 			break;
 		default:
 			ret = -ENODEV;
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h
index 18fbed376afb..caae543ea077 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.h
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h
@@ -368,7 +368,6 @@ struct arm_smmu_domain {
 	const struct iommu_flush_ops	*flush_ops;
 	struct arm_smmu_cfg		cfg;
 	enum arm_smmu_domain_stage	stage;
-	bool				non_strict;
 	struct mutex			init_mutex; /* Protects smmu pointer */
 	spinlock_t			cb_lock; /* Serialises ATS1* ops and TLB syncs */
 	struct iommu_domain		domain;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@gmail.com>
Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	linux-arm-msm@vger.kernel.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCHv8 3/8] iommu/arm-smmu: Move non-strict mode to use domain_attr_io_pgtbl_cfg
Date: Tue, 17 Nov 2020 20:00:42 +0530	[thread overview]
Message-ID: <672a1cf7bbfc43ab401a2c157dafa0e9099e67a2.1605621785.git.saiprakash.ranjan@codeaurora.org> (raw)
In-Reply-To: <cover.1605621785.git.saiprakash.ranjan@codeaurora.org>

Now that we have a struct domain_attr_io_pgtbl_cfg with quirks,
use that for non_strict mode as well thereby removing the need
for more members of arm_smmu_domain in the future.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
 drivers/iommu/arm/arm-smmu/arm-smmu.c | 7 ++-----
 drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 -
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c
index 7b05782738e2..5f066a1b7221 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
@@ -786,9 +786,6 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
 			goto out_clear_smmu;
 	}
 
-	if (smmu_domain->non_strict)
-		pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;
-
 	if (smmu_domain->pgtbl_cfg.quirks)
 		pgtbl_cfg.quirks |= smmu_domain->pgtbl_cfg.quirks;
 
@@ -1527,7 +1524,7 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain,
 	case IOMMU_DOMAIN_DMA:
 		switch (attr) {
 		case DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE:
-			*(int *)data = smmu_domain->non_strict;
+			*(int *)data = smmu_domain->pgtbl_cfg.quirks;
 			return 0;
 		default:
 			return -ENODEV;
@@ -1583,7 +1580,7 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
 	case IOMMU_DOMAIN_DMA:
 		switch (attr) {
 		case DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE:
-			smmu_domain->non_strict = *(int *)data;
+			smmu_domain->pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;
 			break;
 		default:
 			ret = -ENODEV;
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h
index 18fbed376afb..caae543ea077 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.h
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h
@@ -368,7 +368,6 @@ struct arm_smmu_domain {
 	const struct iommu_flush_ops	*flush_ops;
 	struct arm_smmu_cfg		cfg;
 	enum arm_smmu_domain_stage	stage;
-	bool				non_strict;
 	struct mutex			init_mutex; /* Protects smmu pointer */
 	spinlock_t			cb_lock; /* Serialises ATS1* ops and TLB syncs */
 	struct iommu_domain		domain;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2020-11-17 14:32 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-17 14:30 [PATCHv8 0/8] System Cache support for GPU and required SMMU support Sai Prakash Ranjan
2020-11-17 14:30 ` Sai Prakash Ranjan
2020-11-17 14:30 ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 1/8] iommu/io-pgtable-arm: Add support to use system cache Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:06   ` Will Deacon
2020-11-23 15:06     ` Will Deacon
2020-11-23 15:06     ` Will Deacon
2020-11-23 15:06     ` Will Deacon
2020-11-23 16:41     ` Sai Prakash Ranjan
2020-11-23 16:41       ` Sai Prakash Ranjan
2020-11-23 16:41       ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 2/8] iommu/arm-smmu: Add domain attribute for pagetable configuration Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:18   ` Will Deacon
2020-11-23 15:18     ` Will Deacon
2020-11-23 15:18     ` Will Deacon
2020-11-23 15:18     ` Will Deacon
2020-11-23 16:42     ` Sai Prakash Ranjan
2020-11-23 16:42       ` Sai Prakash Ranjan
2020-11-23 16:42       ` Sai Prakash Ranjan
2020-11-17 14:30 ` Sai Prakash Ranjan [this message]
2020-11-17 14:30   ` [PATCHv8 3/8] iommu/arm-smmu: Move non-strict mode to use domain_attr_io_pgtbl_cfg Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:19   ` Will Deacon
2020-11-23 15:19     ` Will Deacon
2020-11-23 15:19     ` Will Deacon
2020-11-23 15:19     ` Will Deacon
2020-11-23 16:43     ` Sai Prakash Ranjan
2020-11-23 16:43       ` Sai Prakash Ranjan
2020-11-23 16:43       ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 4/8] drm/msm: rearrange the gpu_rmw() function Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 5/8] drm/msm/a6xx: Add support for using system cache(LLC) Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 6/8] drm/msm/a6xx: Add support for using system cache on MMU500 based targets Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 7/8] iommu: arm-smmu-impl: Use table to list QCOM implementations Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 8/8] iommu: arm-smmu-impl: Add a space before open parenthesis Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:21 ` [PATCHv8 0/8] System Cache support for GPU and required SMMU support Will Deacon
2020-11-23 15:21   ` Will Deacon
2020-11-23 15:21   ` Will Deacon
2020-11-23 15:21   ` Will Deacon
2020-11-23 17:01   ` Sai Prakash Ranjan
2020-11-23 17:01     ` Sai Prakash Ranjan
2020-11-23 17:01     ` Sai Prakash Ranjan
2020-11-23 19:22     ` Rob Clark
2020-11-23 19:22       ` Rob Clark
2020-11-23 19:22       ` Rob Clark
2020-11-23 19:22       ` Rob Clark
2020-11-24  4:02       ` Sai Prakash Ranjan
2020-11-24  4:02         ` Sai Prakash Ranjan
2020-11-24  4:02         ` Sai Prakash Ranjan
2020-11-24 11:10         ` Will Deacon
2020-11-24 11:10           ` Will Deacon
2020-11-24 11:10           ` Will Deacon
2020-11-24 11:10           ` Will Deacon
2020-11-24 19:05           ` Rob Clark
2020-11-24 19:05             ` Rob Clark
2020-11-24 19:05             ` Rob Clark
2020-11-24 19:05             ` Rob Clark
2020-11-24 21:43             ` Will Deacon
2020-11-24 21:43               ` Will Deacon
2020-11-24 21:43               ` Will Deacon
2020-11-24 21:43               ` Will Deacon
2020-11-24 22:08               ` Rob Clark
2020-11-24 22:08                 ` Rob Clark
2020-11-24 22:08                 ` Rob Clark
2020-11-24 22:08                 ` Rob Clark

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