From: Suzuki K Poulose <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, mike.leach@linaro.org, anshuman.khandual@arm.com, leo.yan@linaro.org, Suzuki K Poulose <suzuki.poulose@arm.com>, Peter Zijlstra <peterz@infradead.org> Subject: [PATCH v4 02/19] perf: aux: Add CoreSight PMU buffer formats Date: Thu, 25 Feb 2021 19:35:26 +0000 [thread overview] Message-ID: <20210225193543.2920532-3-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210225193543.2920532-1-suzuki.poulose@arm.com> CoreSight PMU supports aux-buffer for the ETM tracing. The trace generated by the ETM (associated with individual CPUs, like Intel PT) is captured by a separate IP (CoreSight TMC-ETR/ETF until now). The TMC-ETR applies formatting of the raw ETM trace data, as it can collect traces from multiple ETMs, with the TraceID to indicate the source of a given trace packet. Arm Trace Buffer Extension is new "sink" IP, attached to individual CPUs and thus do not provide additional formatting, like TMC-ETR. Additionally, a system could have both TRBE *and* TMC-ETR for the trace collection. e.g, TMC-ETR could be used as a single trace buffer to collect data from multiple ETMs to correlate the traces from different CPUs. It is possible to have a perf session where some events end up collecting the trace in TMC-ETR while the others in TRBE. Thus we need a way to identify the type of the trace for each AUX record. Define the trace formats exported by the CoreSight PMU. We don't define the flags following the "ETM" as this information is available to the user when issuing the session. What is missing is the additional formatting applied by the "sink" which is decided at the runtime and the user may not have a control on. So we define : - CORESIGHT format (indicates the Frame format) - RAW format (indicates the format of the source) The default value is CORESIGHT format for all the records (i,e == 0). Add the RAW format for others that use raw format. Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- Changes from previous: - Split from the coresight driver specific code for ease of merging --- include/uapi/linux/perf_event.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index f006eeab6f0e..63971eaef127 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -1162,6 +1162,10 @@ enum perf_callchain_context { #define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */ #define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace format type */ +/* CoreSight PMU AUX buffer formats */ +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT 0x0000 /* Default for backward compatibility */ +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW 0x0100 /* Raw format of the source */ + #define PERF_FLAG_FD_NO_GROUP (1UL << 0) #define PERF_FLAG_FD_OUTPUT (1UL << 1) #define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ -- 2.24.1
WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: mathieu.poirier@linaro.org, anshuman.khandual@arm.com, Peter Zijlstra <peterz@infradead.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, linux-kernel@vger.kernel.org, leo.yan@linaro.org, mike.leach@linaro.org Subject: [PATCH v4 02/19] perf: aux: Add CoreSight PMU buffer formats Date: Thu, 25 Feb 2021 19:35:26 +0000 [thread overview] Message-ID: <20210225193543.2920532-3-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210225193543.2920532-1-suzuki.poulose@arm.com> CoreSight PMU supports aux-buffer for the ETM tracing. The trace generated by the ETM (associated with individual CPUs, like Intel PT) is captured by a separate IP (CoreSight TMC-ETR/ETF until now). The TMC-ETR applies formatting of the raw ETM trace data, as it can collect traces from multiple ETMs, with the TraceID to indicate the source of a given trace packet. Arm Trace Buffer Extension is new "sink" IP, attached to individual CPUs and thus do not provide additional formatting, like TMC-ETR. Additionally, a system could have both TRBE *and* TMC-ETR for the trace collection. e.g, TMC-ETR could be used as a single trace buffer to collect data from multiple ETMs to correlate the traces from different CPUs. It is possible to have a perf session where some events end up collecting the trace in TMC-ETR while the others in TRBE. Thus we need a way to identify the type of the trace for each AUX record. Define the trace formats exported by the CoreSight PMU. We don't define the flags following the "ETM" as this information is available to the user when issuing the session. What is missing is the additional formatting applied by the "sink" which is decided at the runtime and the user may not have a control on. So we define : - CORESIGHT format (indicates the Frame format) - RAW format (indicates the format of the source) The default value is CORESIGHT format for all the records (i,e == 0). Add the RAW format for others that use raw format. Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- Changes from previous: - Split from the coresight driver specific code for ease of merging --- include/uapi/linux/perf_event.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index f006eeab6f0e..63971eaef127 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -1162,6 +1162,10 @@ enum perf_callchain_context { #define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */ #define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace format type */ +/* CoreSight PMU AUX buffer formats */ +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT 0x0000 /* Default for backward compatibility */ +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW 0x0100 /* Raw format of the source */ + #define PERF_FLAG_FD_NO_GROUP (1UL << 0) #define PERF_FLAG_FD_OUTPUT (1UL << 1) #define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ -- 2.24.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-02-25 19:39 UTC|newest] Thread overview: 132+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-25 19:35 [PATCH v4 00/19] arm64: coresight: Add support for ETE and TRBE Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 01/19] perf: aux: Add flags for the buffer format Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose [this message] 2021-02-25 19:35 ` [PATCH v4 02/19] perf: aux: Add CoreSight PMU buffer formats Suzuki K Poulose 2021-03-16 17:04 ` Mathieu Poirier 2021-03-16 17:04 ` Mathieu Poirier 2021-03-22 12:29 ` Suzuki K Poulose 2021-03-22 12:29 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 03/19] kvm: arm64: Hide system instruction access to Trace registers Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-22 22:21 ` Suzuki K Poulose 2021-03-22 22:21 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 04/19] kvm: arm64: nvhe: Save the SPE context early Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-01 16:32 ` Alexandru Elisei 2021-03-01 16:32 ` Alexandru Elisei 2021-03-02 10:01 ` Suzuki K Poulose 2021-03-02 10:01 ` Suzuki K Poulose 2021-03-02 10:13 ` Marc Zyngier 2021-03-02 10:13 ` Marc Zyngier 2021-03-02 11:00 ` Alexandru Elisei 2021-03-02 11:00 ` Alexandru Elisei 2021-02-25 19:35 ` [PATCH v4 05/19] kvm: arm64: Disable guest access to trace filter controls Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-22 22:24 ` Suzuki K Poulose 2021-03-22 22:24 ` Suzuki K Poulose 2021-03-23 9:16 ` Marc Zyngier 2021-03-23 9:16 ` Marc Zyngier 2021-03-23 9:44 ` Suzuki K Poulose 2021-03-23 9:44 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 06/19] arm64: Add support for trace synchronization barrier Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 07/19] arm64: Add TRBE definitions Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-16 17:46 ` Mathieu Poirier 2021-03-16 17:46 ` Mathieu Poirier 2021-02-25 19:35 ` [PATCH v4 08/19] arm64: kvm: Enable access to TRBE support for host Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-16 17:49 ` Mathieu Poirier 2021-03-16 17:49 ` Mathieu Poirier 2021-02-25 19:35 ` [PATCH v4 09/19] coresight: etm4x: Move ETM to prohibited region for disable Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-08 17:25 ` Mike Leach 2021-03-08 17:25 ` Mike Leach 2021-03-16 19:30 ` Mathieu Poirier 2021-03-16 19:30 ` Mathieu Poirier 2021-03-17 10:44 ` Suzuki K Poulose 2021-03-17 10:44 ` Suzuki K Poulose 2021-03-17 17:09 ` Mathieu Poirier 2021-03-17 17:09 ` Mathieu Poirier 2021-03-22 21:28 ` Mathieu Poirier 2021-03-22 21:28 ` Mathieu Poirier 2021-02-25 19:35 ` [PATCH v4 10/19] coresight: etm-perf: Allow an event to use different sinks Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-08 17:25 ` Mike Leach 2021-03-08 17:25 ` Mike Leach 2021-03-16 20:23 ` Mathieu Poirier 2021-03-16 20:23 ` Mathieu Poirier 2021-03-17 10:47 ` Suzuki K Poulose 2021-03-17 10:47 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 11/19] coresight: Do not scan for graph if none is present Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 12/19] coresight: etm4x: Add support for PE OS lock Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 13/19] coresight: ete: Add support for ETE sysreg access Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 22:33 ` kernel test robot 2021-02-25 22:33 ` kernel test robot 2021-02-25 22:33 ` kernel test robot 2021-02-26 6:25 ` kernel test robot 2021-02-26 6:25 ` kernel test robot 2021-02-25 19:35 ` [PATCH v4 14/19] coresight: ete: Add support for ETE tracing Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 15/19] dts: bindings: Document device tree bindings for ETE Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-06 21:06 ` Rob Herring 2021-03-06 21:06 ` Rob Herring 2021-03-08 17:25 ` Mike Leach 2021-03-08 17:25 ` Mike Leach 2021-03-22 16:53 ` Suzuki K Poulose 2021-03-22 16:53 ` Suzuki K Poulose 2021-03-22 17:28 ` Rob Herring 2021-03-22 17:28 ` Rob Herring 2021-03-22 22:49 ` Suzuki K Poulose 2021-03-22 22:49 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 16/19] coresight: etm-perf: Handle stale output handles Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-25 19:35 ` [PATCH v4 17/19] coresight: core: Add support for dedicated percpu sinks Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-02-26 6:34 ` kernel test robot 2021-02-26 6:34 ` kernel test robot 2021-02-26 6:34 ` kernel test robot 2021-03-01 13:54 ` Suzuki K Poulose 2021-03-01 13:54 ` Suzuki K Poulose 2021-03-01 13:54 ` Suzuki K Poulose 2021-03-02 10:21 ` Anshuman Khandual 2021-03-02 10:21 ` Anshuman Khandual 2021-03-02 10:21 ` Anshuman Khandual 2021-03-01 14:08 ` [PATCH v4.1 " Suzuki K Poulose 2021-03-01 14:08 ` Suzuki K Poulose 2021-03-08 17:26 ` [PATCH v4 " Mike Leach 2021-03-08 17:26 ` Mike Leach 2021-03-22 16:57 ` Suzuki K Poulose 2021-03-22 16:57 ` Suzuki K Poulose 2021-03-17 19:31 ` Mathieu Poirier 2021-03-17 19:31 ` Mathieu Poirier 2021-02-25 19:35 ` [PATCH v4 18/19] coresight: sink: Add TRBE driver Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose 2021-03-08 17:26 ` Mike Leach 2021-03-08 17:26 ` Mike Leach 2021-03-19 10:30 ` Suzuki K Poulose 2021-03-19 10:30 ` Suzuki K Poulose 2021-03-19 11:55 ` Mike Leach 2021-03-19 11:55 ` Mike Leach 2021-03-22 21:24 ` Mathieu Poirier 2021-03-22 21:24 ` Mathieu Poirier 2021-03-22 23:00 ` Suzuki K Poulose 2021-03-22 23:00 ` Suzuki K Poulose 2021-03-18 18:08 ` Mathieu Poirier 2021-03-18 18:08 ` Mathieu Poirier 2021-03-19 10:34 ` Suzuki K Poulose 2021-03-19 10:34 ` Suzuki K Poulose 2021-03-19 14:47 ` Mathieu Poirier 2021-03-19 14:47 ` Mathieu Poirier 2021-03-19 17:58 ` Mathieu Poirier 2021-03-19 17:58 ` Mathieu Poirier 2021-03-22 21:20 ` Mathieu Poirier 2021-03-22 21:20 ` Mathieu Poirier 2021-02-25 19:35 ` [PATCH v4 19/19] dts: bindings: Document device tree bindings for Arm TRBE Suzuki K Poulose 2021-02-25 19:35 ` Suzuki K Poulose
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