From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Cc: <daniel.vetter@ffwll.ch> Subject: [PATCH 02/22] drm/i915/guc: Fix outstanding G2H accounting Date: Mon, 16 Aug 2021 06:51:19 -0700 [thread overview] Message-ID: <20210816135139.10060-3-matthew.brost@intel.com> (raw) In-Reply-To: <20210816135139.10060-1-matthew.brost@intel.com> A small race that could result in incorrect accounting of the number of outstanding G2H. Basically prior to this patch we did not increment the number of outstanding G2H if we encoutered a GT reset while sending a H2G. This was incorrect as the context state had already been updated to anticipate a G2H response thus the counter should be incremented. Fixes: f4eb1f3fe946 ("drm/i915/guc: Ensure G2H response has space in buffer") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Cc: <stable@vger.kernel.org> --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 69faa39da178..b5d3972ae164 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -360,11 +360,13 @@ static int guc_submission_send_busy_loop(struct intel_guc *guc, { int err; - err = intel_guc_send_busy_loop(guc, action, len, g2h_len_dw, loop); - - if (!err && g2h_len_dw) + if (g2h_len_dw) atomic_inc(&guc->outstanding_submission_g2h); + err = intel_guc_send_busy_loop(guc, action, len, g2h_len_dw, loop); + if (err == -EBUSY && g2h_len_dw) + atomic_dec(&guc->outstanding_submission_g2h); + return err; } -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Cc: <daniel.vetter@ffwll.ch> Subject: [Intel-gfx] [PATCH 02/22] drm/i915/guc: Fix outstanding G2H accounting Date: Mon, 16 Aug 2021 06:51:19 -0700 [thread overview] Message-ID: <20210816135139.10060-3-matthew.brost@intel.com> (raw) In-Reply-To: <20210816135139.10060-1-matthew.brost@intel.com> A small race that could result in incorrect accounting of the number of outstanding G2H. Basically prior to this patch we did not increment the number of outstanding G2H if we encoutered a GT reset while sending a H2G. This was incorrect as the context state had already been updated to anticipate a G2H response thus the counter should be incremented. Fixes: f4eb1f3fe946 ("drm/i915/guc: Ensure G2H response has space in buffer") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Cc: <stable@vger.kernel.org> --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 69faa39da178..b5d3972ae164 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -360,11 +360,13 @@ static int guc_submission_send_busy_loop(struct intel_guc *guc, { int err; - err = intel_guc_send_busy_loop(guc, action, len, g2h_len_dw, loop); - - if (!err && g2h_len_dw) + if (g2h_len_dw) atomic_inc(&guc->outstanding_submission_g2h); + err = intel_guc_send_busy_loop(guc, action, len, g2h_len_dw, loop); + if (err == -EBUSY && g2h_len_dw) + atomic_dec(&guc->outstanding_submission_g2h); + return err; } -- 2.32.0
next prev parent reply other threads:[~2021-08-16 13:57 UTC|newest] Thread overview: 104+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-16 13:51 [PATCH 00/22] Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 01/22] drm/i915/guc: Fix blocked context accounting Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` Matthew Brost [this message] 2021-08-16 13:51 ` [Intel-gfx] [PATCH 02/22] drm/i915/guc: Fix outstanding G2H accounting Matthew Brost 2021-08-17 9:39 ` Daniel Vetter 2021-08-17 9:39 ` [Intel-gfx] " Daniel Vetter 2021-08-17 18:17 ` Matthew Brost 2021-08-17 18:17 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 03/22] drm/i915/guc: Unwind context requests in reverse order Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 04/22] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 05/22] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 9:32 ` Daniel Vetter 2021-08-17 9:32 ` [Intel-gfx] " Daniel Vetter 2021-08-17 15:03 ` Matthew Brost 2021-08-17 15:03 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 06/22] drm/i915/execlists: Do not propagate errors to dependent fences Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 9:21 ` Daniel Vetter 2021-08-17 9:21 ` [Intel-gfx] " Daniel Vetter 2021-08-17 15:08 ` Matthew Brost 2021-08-17 15:08 ` [Intel-gfx] " Matthew Brost 2021-08-17 15:49 ` Daniel Vetter 2021-08-17 15:49 ` [Intel-gfx] " Daniel Vetter 2021-08-16 13:51 ` [PATCH 07/22] drm/i915/selftests: Add a cancel request selftest that triggers a reset Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 08/22] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 9:47 ` Daniel Vetter 2021-08-17 9:47 ` [Intel-gfx] " Daniel Vetter 2021-08-17 9:57 ` Daniel Vetter 2021-08-17 9:57 ` [Intel-gfx] " Daniel Vetter 2021-08-17 16:44 ` Matthew Brost 2021-08-17 16:44 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 09/22] drm/i915/selftests: Fix memory corruption in live_lrc_isolation Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 10/22] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 11/22] drm/i915/guc: Take context ref when cancelling request Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 12/22] drm/i915/guc: Don't touch guc_state.sched_state without a lock Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 7:21 ` kernel test robot 2021-08-17 7:21 ` kernel test robot 2021-08-17 7:21 ` [Intel-gfx] " kernel test robot 2021-08-16 13:51 ` [PATCH 13/22] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 14/22] drm/i915: Allocate error capture in atomic context Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 10:06 ` Daniel Vetter 2021-08-17 10:06 ` [Intel-gfx] " Daniel Vetter 2021-08-17 16:12 ` Matthew Brost 2021-08-17 16:12 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 15/22] drm/i915/guc: Flush G2H work queue during reset Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 10:06 ` Daniel Vetter 2021-08-16 13:51 ` [PATCH 16/22] drm/i915/guc: Release submit fence from an IRQ Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 10:08 ` Daniel Vetter 2021-08-17 10:08 ` [Intel-gfx] " Daniel Vetter 2021-08-16 13:51 ` [PATCH 17/22] drm/i915/guc: Move guc_blocked fence to struct guc_state Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 10:10 ` Daniel Vetter 2021-08-17 10:10 ` [Intel-gfx] " Daniel Vetter 2021-08-16 13:51 ` [PATCH 18/22] drm/i915/guc: Rework and simplify locking Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 10:15 ` Daniel Vetter 2021-08-17 10:15 ` [Intel-gfx] " Daniel Vetter 2021-08-17 15:30 ` Matthew Brost 2021-08-17 15:30 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 19/22] drm/i915/guc: Proper xarray usage for contexts_lookup Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 10:27 ` Daniel Vetter 2021-08-17 15:26 ` Matthew Brost 2021-08-17 17:13 ` Daniel Vetter 2021-08-17 17:13 ` Matthew Brost 2021-08-16 13:51 ` [PATCH 20/22] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 21/22] drm/i915/guc: Move GuC priority fields in context under guc_active Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-16 13:51 ` [PATCH 22/22] drm/i915/guc: Add GuC kernel doc Matthew Brost 2021-08-16 13:51 ` [Intel-gfx] " Matthew Brost 2021-08-17 11:11 ` Daniel Vetter 2021-08-17 11:11 ` [Intel-gfx] " Daniel Vetter 2021-08-17 16:36 ` Matthew Brost 2021-08-17 16:36 ` [Intel-gfx] " Matthew Brost 2021-08-17 17:20 ` Daniel Vetter 2021-08-17 17:20 ` [Intel-gfx] " Daniel Vetter 2021-08-17 17:27 ` Michal Wajdeczko 2021-08-17 17:27 ` [Intel-gfx] " Michal Wajdeczko 2021-08-17 17:34 ` Daniel Vetter 2021-08-17 17:34 ` [Intel-gfx] " Daniel Vetter 2021-08-17 20:41 ` Michal Wajdeczko 2021-08-17 20:41 ` [Intel-gfx] " Michal Wajdeczko 2021-08-17 21:49 ` Daniel Vetter 2021-08-17 21:49 ` [Intel-gfx] " Daniel Vetter 2021-08-17 12:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev2) Patchwork 2021-08-17 12:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-08-17 13:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-17 14:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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