From: Ramalingam C <ramalingam.c@intel.com>
To: dri-devel <dri-devel@lists.freedesktop.org>,
intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel@ffwll.ch>,
Matthew Auld <matthew.auld@intel.com>,
Hellstrom Thomas <thomas.hellstrom@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Ramalingam C <ramalingam.c@intel.com>
Subject: [PATCH v3 11/17] drm/i915/dg2: Prune the Y Tiling modifiers
Date: Thu, 28 Oct 2021 02:53:33 +0530 [thread overview]
Message-ID: <20211027212339.29259-12-ramalingam.c@intel.com> (raw)
In-Reply-To: <20211027212339.29259-1-ramalingam.c@intel.com>
Remove the Y Tiling modifiers for DG2.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Juha-Pekka Heikkila <juha-pekka.heikkila@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 9ce1d273dc7e..9ff52dde1683 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -315,6 +315,9 @@ static bool plane_has_modifier(struct drm_i915_private *i915,
if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until))
return false;
+ if (IS_DG2(i915) && md->tiling == I915_TILING_Y)
+ return false;
+
if (!md->is_linear &&
!(plane_caps & PLANE_HAS_TILING))
return false;
--
2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Ramalingam C <ramalingam.c@intel.com>
To: dri-devel <dri-devel@lists.freedesktop.org>,
intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel@ffwll.ch>,
Matthew Auld <matthew.auld@intel.com>,
Hellstrom Thomas <thomas.hellstrom@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Ramalingam C <ramalingam.c@intel.com>
Subject: [Intel-gfx] [PATCH v3 11/17] drm/i915/dg2: Prune the Y Tiling modifiers
Date: Thu, 28 Oct 2021 02:53:33 +0530 [thread overview]
Message-ID: <20211027212339.29259-12-ramalingam.c@intel.com> (raw)
In-Reply-To: <20211027212339.29259-1-ramalingam.c@intel.com>
Remove the Y Tiling modifiers for DG2.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Juha-Pekka Heikkila <juha-pekka.heikkila@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 9ce1d273dc7e..9ff52dde1683 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -315,6 +315,9 @@ static bool plane_has_modifier(struct drm_i915_private *i915,
if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until))
return false;
+ if (IS_DG2(i915) && md->tiling == I915_TILING_Y)
+ return false;
+
if (!md->is_linear &&
!(plane_caps & PLANE_HAS_TILING))
return false;
--
2.20.1
next prev parent reply other threads:[~2021-10-27 21:21 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-27 21:23 [PATCH v3 00/17] drm/i915/dg2: Enabling 64k page size and flat ccs Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 01/17] drm/i915: Add has_64k_pages flag Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 02/17] drm/i915/xehpsdv: set min page-size to 64K Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 03/17] drm/i915/xehpsdv: enforce min GTT alignment Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 04/17] drm/i915: enforce min page size for scratch Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 05/17] drm/i915/gtt/xehpsdv: move scratch page to system memory Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 06/17] drm/i915/xehpsdv: support 64K GTT pages Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 07/17] drm/i915/xehpsdv: implement memory coloring Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 08/17] drm/i915/xehpsdv: Add has_flat_ccs to device info Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 09/17] drm/i915/lmem: Enable lmem for platforms with Flat CCS Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 10/17] drm/i915/gt: Clear compress metadata for Xe_HP platforms Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` Ramalingam C [this message]
2021-10-27 21:23 ` [Intel-gfx] [PATCH v3 11/17] drm/i915/dg2: Prune the Y Tiling modifiers Ramalingam C
2021-10-27 21:23 ` [PATCH v3 12/17] drm/i915/dg2: Tile 4 plane format support Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-28 7:04 ` Lisovskiy, Stanislav
2021-10-28 7:04 ` [Intel-gfx] " Lisovskiy, Stanislav
2021-10-27 21:23 ` [PATCH v3 13/17] uapi/drm/dg2: Format modifier for DG2 unified compression and clear color Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-12-07 23:51 ` [Intel-gfx] [Mesa-dev] " Nanley Chery
2021-12-07 23:51 ` Nanley Chery
2021-12-09 19:41 ` [Intel-gfx] " Nanley Chery
2021-12-09 19:41 ` Nanley Chery
2021-12-14 0:23 ` Ramalingam C
2021-12-14 0:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 14/17] drm/i915/dg2: Plane handling for Flat CCS " Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 15/17] drm/i915/uapi: document behaviour for DG2 64K support Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 16/17] drm/i915/Flat-CCS: Document on Flat-CCS memory compression Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:23 ` [PATCH v3 17/17] Doc/gpu/rfc/i915: i915 DG2 uAPI Ramalingam C
2021-10-27 21:23 ` [Intel-gfx] " Ramalingam C
2021-10-27 21:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dg2: Enabling 64k page size and flat ccs (rev3) Patchwork
2021-10-27 21:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-27 22:05 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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