From: <conor.dooley@microchip.com> To: <linus.walleij@linaro.org>, <bgolaszewski@baylibre.com>, <robh+dt@kernel.org>, <jassisinghbrar@gmail.com>, <paul.walmsley@sifive.com>, <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <a.zummo@towertech.it>, <alexandre.belloni@bootlin.com>, <broonie@kernel.org>, <gregkh@linuxfoundation.org>, <thierry.reding@gmail.com>, <u.kleine-koenig@pengutronix.de>, <lee.jones@linaro.org>, <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <linux-pwm@vger.kernel.org>, <linux-riscv@lists.infradead.org>, <linux-crypto@vger.kernel.org>, <linux-rtc@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org> Cc: <krzysztof.kozlowski@canonical.com>, <geert@linux-m68k.org>, <bin.meng@windriver.com>, <heiko@sntech.de>, <lewis.hanly@microchip.com>, <conor.dooley@microchip.com>, <daire.mcnamara@microchip.com>, <ivan.griffin@microchip.com>, <atishp@rivosinc.com> Subject: [PATCH v4 10/14] riscv: dts: microchip: add fpga fabric section to icicle kit Date: Mon, 17 Jan 2022 11:07:51 +0000 [thread overview] Message-ID: <20220117110755.3433142-11-conor.dooley@microchip.com> (raw) In-Reply-To: <20220117110755.3433142-1-conor.dooley@microchip.com> From: Conor Dooley <conor.dooley@microchip.com> Split the device tree for the Microchip MPFS into two sections by adding microchip-mpfs-fabric.dtsi, which contains peripherals contained in the FPGA fabric. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- .../dts/microchip/microchip-mpfs-fabric.dtsi | 25 +++++++++++++++++++ .../microchip/microchip-mpfs-icicle-kit.dts | 8 ++++++ .../boot/dts/microchip/microchip-mpfs.dtsi | 1 + 3 files changed, 34 insertions(+) create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi new file mode 100644 index 000000000000..c1dcd56b0679 --- /dev/null +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2020-2021 Microchip Technology Inc */ + +/ { + core_pwm0: pwm@41000000 { + compatible = "microchip,corepwm-rtl-v4"; + reg = <0x0 0x41000000 0x0 0xF0>; + microchip,sync-update = /bits/ 16 <0>; + #pwm-cells = <2>; + clocks = <&clkcfg CLK_FIC3>; + status = "disabled"; + }; + + i2c2: i2c@44000000 { + compatible = "microchip,corei2c-rtl-v7"; + reg = <0x0 0x44000000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkcfg CLK_FIC3>; + interrupt-parent = <&plic>; + interrupts = <122>; + clock-frequency = <100000>; + status = "disabled"; + }; +}; diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index 6d19ba196f12..ab803f71626a 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -68,6 +68,10 @@ &mmc { sd-uhs-sdr104; }; +&i2c2 { + status = "okay"; +}; + &emac0 { phy-mode = "sgmii"; phy-handle = <&phy0>; @@ -86,3 +90,7 @@ phy1: ethernet-phy@9 { ti,fifo-depth = <0x01>; }; }; + +&core_pwm0 { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index 717e39b30a15..c7d73756c9b8 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -3,6 +3,7 @@ /dts-v1/; #include "dt-bindings/clock/microchip,mpfs-clock.h" +#include "microchip-mpfs-fabric.dtsi" / { #address-cells = <2>; -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: <conor.dooley@microchip.com> To: <linus.walleij@linaro.org>, <bgolaszewski@baylibre.com>, <robh+dt@kernel.org>, <jassisinghbrar@gmail.com>, <paul.walmsley@sifive.com>, <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <a.zummo@towertech.it>, <alexandre.belloni@bootlin.com>, <broonie@kernel.org>, <gregkh@linuxfoundation.org>, <thierry.reding@gmail.com>, <u.kleine-koenig@pengutronix.de>, <lee.jones@linaro.org>, <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <linux-pwm@vger.kernel.org>, <linux-riscv@lists.infradead.org>, <linux-crypto@vger.kernel.org>, <linux-rtc@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org> Cc: <krzysztof.kozlowski@canonical.com>, <geert@linux-m68k.org>, <bin.meng@windriver.com>, <heiko@sntech.de>, <lewis.hanly@microchip.com>, <conor.dooley@microchip.com>, <daire.mcnamara@microchip.com>, <ivan.griffin@microchip.com>, <atishp@rivosinc.com> Subject: [PATCH v4 10/14] riscv: dts: microchip: add fpga fabric section to icicle kit Date: Mon, 17 Jan 2022 11:07:51 +0000 [thread overview] Message-ID: <20220117110755.3433142-11-conor.dooley@microchip.com> (raw) In-Reply-To: <20220117110755.3433142-1-conor.dooley@microchip.com> From: Conor Dooley <conor.dooley@microchip.com> Split the device tree for the Microchip MPFS into two sections by adding microchip-mpfs-fabric.dtsi, which contains peripherals contained in the FPGA fabric. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- .../dts/microchip/microchip-mpfs-fabric.dtsi | 25 +++++++++++++++++++ .../microchip/microchip-mpfs-icicle-kit.dts | 8 ++++++ .../boot/dts/microchip/microchip-mpfs.dtsi | 1 + 3 files changed, 34 insertions(+) create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi new file mode 100644 index 000000000000..c1dcd56b0679 --- /dev/null +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2020-2021 Microchip Technology Inc */ + +/ { + core_pwm0: pwm@41000000 { + compatible = "microchip,corepwm-rtl-v4"; + reg = <0x0 0x41000000 0x0 0xF0>; + microchip,sync-update = /bits/ 16 <0>; + #pwm-cells = <2>; + clocks = <&clkcfg CLK_FIC3>; + status = "disabled"; + }; + + i2c2: i2c@44000000 { + compatible = "microchip,corei2c-rtl-v7"; + reg = <0x0 0x44000000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkcfg CLK_FIC3>; + interrupt-parent = <&plic>; + interrupts = <122>; + clock-frequency = <100000>; + status = "disabled"; + }; +}; diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index 6d19ba196f12..ab803f71626a 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -68,6 +68,10 @@ &mmc { sd-uhs-sdr104; }; +&i2c2 { + status = "okay"; +}; + &emac0 { phy-mode = "sgmii"; phy-handle = <&phy0>; @@ -86,3 +90,7 @@ phy1: ethernet-phy@9 { ti,fifo-depth = <0x01>; }; }; + +&core_pwm0 { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index 717e39b30a15..c7d73756c9b8 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -3,6 +3,7 @@ /dts-v1/; #include "dt-bindings/clock/microchip,mpfs-clock.h" +#include "microchip-mpfs-fabric.dtsi" / { #address-cells = <2>; -- 2.32.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-01-17 11:07 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-17 11:07 [PATCH v4 00/14] Update the Icicle Kit device tree conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 01/14] dt-bindings: soc/microchip: update syscontroller compatibles conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 02/14] dt-bindings: soc/microchip: add services as children of sys ctrlr conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 03/14] dt-bindings: i2c: add bindings for microchip mpfs i2c conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:10 ` Rob Herring 2022-01-19 3:10 ` Rob Herring 2022-01-20 8:30 ` Geert Uytterhoeven 2022-01-20 8:30 ` Geert Uytterhoeven 2022-01-20 13:42 ` Conor.Dooley 2022-01-20 13:42 ` Conor.Dooley 2022-01-20 14:56 ` Geert Uytterhoeven 2022-01-20 14:56 ` Geert Uytterhoeven 2022-01-20 15:42 ` conor dooley 2022-01-20 15:42 ` conor dooley 2022-01-17 11:07 ` [PATCH v4 04/14] dt-bindings: rtc: add bindings for microchip mpfs rtc conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:12 ` Rob Herring 2022-01-19 3:12 ` Rob Herring 2022-01-19 10:47 ` Conor.Dooley 2022-01-19 10:47 ` Conor.Dooley 2022-01-17 11:07 ` [PATCH v4 05/14] dt-bindings: gpio: add bindings for microchip mpfs gpio conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:12 ` Rob Herring 2022-01-19 3:12 ` Rob Herring 2022-01-17 11:07 ` [PATCH v4 06/14] dt-bindings: spi: add bindings for microchip mpfs spi conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:13 ` Rob Herring 2022-01-19 3:13 ` Rob Herring 2022-01-17 11:07 ` [PATCH v4 07/14] dt-bindings: usb: add bindings for microchip mpfs musb conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:13 ` Rob Herring 2022-01-19 3:13 ` Rob Herring 2022-01-17 11:07 ` [PATCH v4 08/14] dt-bindings: pwm: add microchip corepwm binding conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:14 ` Rob Herring 2022-01-19 3:14 ` Rob Herring 2022-01-17 11:07 ` [PATCH v4 09/14] riscv: dts: microchip: use clk defines for icicle kit conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` conor.dooley [this message] 2022-01-17 11:07 ` [PATCH v4 10/14] riscv: dts: microchip: add fpga fabric section to " conor.dooley 2022-01-17 11:07 ` [PATCH v4 11/14] riscv: dts: microchip: refactor icicle kit device tree conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-18 11:14 ` Conor.Dooley 2022-01-18 11:14 ` Conor.Dooley 2022-01-17 11:07 ` [PATCH v4 12/14] riscv: dts: microchip: update peripherals in " conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 13/14] riscv: dts: microchip: add new peripherals to " conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 14/14] MAINTAINERS: update riscv/microchip entry conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-25 10:21 ` (subset) [PATCH v4 00/14] Update the Icicle Kit device tree Mark Brown 2022-01-25 10:21 ` Mark Brown
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220117110755.3433142-11-conor.dooley@microchip.com \ --to=conor.dooley@microchip.com \ --cc=a.zummo@towertech.it \ --cc=alexandre.belloni@bootlin.com \ --cc=aou@eecs.berkeley.edu \ --cc=atishp@rivosinc.com \ --cc=bgolaszewski@baylibre.com \ --cc=bin.meng@windriver.com \ --cc=broonie@kernel.org \ --cc=daire.mcnamara@microchip.com \ --cc=devicetree@vger.kernel.org \ --cc=geert@linux-m68k.org \ --cc=gregkh@linuxfoundation.org \ --cc=heiko@sntech.de \ --cc=ivan.griffin@microchip.com \ --cc=jassisinghbrar@gmail.com \ --cc=krzysztof.kozlowski@canonical.com \ --cc=lee.jones@linaro.org \ --cc=lewis.hanly@microchip.com \ --cc=linus.walleij@linaro.org \ --cc=linux-crypto@vger.kernel.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-i2c@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-pwm@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=linux-rtc@vger.kernel.org \ --cc=linux-spi@vger.kernel.org \ --cc=linux-usb@vger.kernel.org \ --cc=palmer@dabbelt.com \ --cc=paul.walmsley@sifive.com \ --cc=robh+dt@kernel.org \ --cc=thierry.reding@gmail.com \ --cc=u.kleine-koenig@pengutronix.de \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.