From: <conor.dooley@microchip.com> To: <linus.walleij@linaro.org>, <bgolaszewski@baylibre.com>, <robh+dt@kernel.org>, <jassisinghbrar@gmail.com>, <paul.walmsley@sifive.com>, <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <a.zummo@towertech.it>, <alexandre.belloni@bootlin.com>, <broonie@kernel.org>, <gregkh@linuxfoundation.org>, <thierry.reding@gmail.com>, <u.kleine-koenig@pengutronix.de>, <lee.jones@linaro.org>, <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <linux-pwm@vger.kernel.org>, <linux-riscv@lists.infradead.org>, <linux-crypto@vger.kernel.org>, <linux-rtc@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org> Cc: <krzysztof.kozlowski@canonical.com>, <geert@linux-m68k.org>, <bin.meng@windriver.com>, <heiko@sntech.de>, <lewis.hanly@microchip.com>, <conor.dooley@microchip.com>, <daire.mcnamara@microchip.com>, <ivan.griffin@microchip.com>, <atishp@rivosinc.com> Subject: [PATCH v4 08/14] dt-bindings: pwm: add microchip corepwm binding Date: Mon, 17 Jan 2022 11:07:49 +0000 [thread overview] Message-ID: <20220117110755.3433142-9-conor.dooley@microchip.com> (raw) In-Reply-To: <20220117110755.3433142-1-conor.dooley@microchip.com> From: Conor Dooley <conor.dooley@microchip.com> Add device tree bindings for the Microchip fpga fabric based "core" PWM controller. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- .../bindings/pwm/microchip,corepwm.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml new file mode 100644 index 000000000000..26a77cde2465 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/microchip,corepwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip ip core PWM controller bindings + +maintainers: + - Conor Dooley <conor.dooley@microchip.com> + +description: | + corePWM is an 16 channel pulse width modulator FPGA IP + + https://www.microsemi.com/existing-parts/parts/152118 + +properties: + compatible: + items: + - const: microchip,corepwm-rtl-v4 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 2 + + microchip,sync-update: + description: | + In synchronous mode, all channels are updated at the beginning of the PWM period. + Asynchronous mode is relevant to applications such as LED control, where + synchronous updates are not required. Asynchronous mode lowers the area size, + reducing shadow register requirements. This can be set at run time, provided + SHADOW_REG_EN is asserted. SHADOW_REG_EN is set by the FPGA bitstream programmed + to the device. + Each bit corresponds to a PWM channel & represents whether synchronous mode is + possible for the PWM channel. + + $ref: /schemas/types.yaml#/definitions/uint16 + default: 0 + + microchip,dac-mode: + description: | + Optional, per-channel Low Ripple DAC mode is possible on this IP core. It creates + a minimum period pulse train whose High/Low average is that of the chosen duty + cycle. This "DAC" will have far better bandwidth and ripple performance than the + standard PWM algorithm can achieve. + Each bit corresponds to a PWM channel & represents whether dac mode is enabled + that PWM channel. + + $ref: /schemas/types.yaml#/definitions/uint16 + default: 0 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + #include "dt-bindings/clock/microchip,mpfs-clock.h" + pwm@41000000 { + compatible = "microchip,corepwm-rtl-v4"; + microchip,sync-update = /bits/ 16 <0>; + clocks = <&clkcfg CLK_FIC3>; + reg = <0x41000000 0xF0>; + #pwm-cells = <2>; + }; -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: <conor.dooley@microchip.com> To: <linus.walleij@linaro.org>, <bgolaszewski@baylibre.com>, <robh+dt@kernel.org>, <jassisinghbrar@gmail.com>, <paul.walmsley@sifive.com>, <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <a.zummo@towertech.it>, <alexandre.belloni@bootlin.com>, <broonie@kernel.org>, <gregkh@linuxfoundation.org>, <thierry.reding@gmail.com>, <u.kleine-koenig@pengutronix.de>, <lee.jones@linaro.org>, <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <linux-pwm@vger.kernel.org>, <linux-riscv@lists.infradead.org>, <linux-crypto@vger.kernel.org>, <linux-rtc@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org> Cc: <krzysztof.kozlowski@canonical.com>, <geert@linux-m68k.org>, <bin.meng@windriver.com>, <heiko@sntech.de>, <lewis.hanly@microchip.com>, <conor.dooley@microchip.com>, <daire.mcnamara@microchip.com>, <ivan.griffin@microchip.com>, <atishp@rivosinc.com> Subject: [PATCH v4 08/14] dt-bindings: pwm: add microchip corepwm binding Date: Mon, 17 Jan 2022 11:07:49 +0000 [thread overview] Message-ID: <20220117110755.3433142-9-conor.dooley@microchip.com> (raw) In-Reply-To: <20220117110755.3433142-1-conor.dooley@microchip.com> From: Conor Dooley <conor.dooley@microchip.com> Add device tree bindings for the Microchip fpga fabric based "core" PWM controller. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- .../bindings/pwm/microchip,corepwm.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml new file mode 100644 index 000000000000..26a77cde2465 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/microchip,corepwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip ip core PWM controller bindings + +maintainers: + - Conor Dooley <conor.dooley@microchip.com> + +description: | + corePWM is an 16 channel pulse width modulator FPGA IP + + https://www.microsemi.com/existing-parts/parts/152118 + +properties: + compatible: + items: + - const: microchip,corepwm-rtl-v4 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 2 + + microchip,sync-update: + description: | + In synchronous mode, all channels are updated at the beginning of the PWM period. + Asynchronous mode is relevant to applications such as LED control, where + synchronous updates are not required. Asynchronous mode lowers the area size, + reducing shadow register requirements. This can be set at run time, provided + SHADOW_REG_EN is asserted. SHADOW_REG_EN is set by the FPGA bitstream programmed + to the device. + Each bit corresponds to a PWM channel & represents whether synchronous mode is + possible for the PWM channel. + + $ref: /schemas/types.yaml#/definitions/uint16 + default: 0 + + microchip,dac-mode: + description: | + Optional, per-channel Low Ripple DAC mode is possible on this IP core. It creates + a minimum period pulse train whose High/Low average is that of the chosen duty + cycle. This "DAC" will have far better bandwidth and ripple performance than the + standard PWM algorithm can achieve. + Each bit corresponds to a PWM channel & represents whether dac mode is enabled + that PWM channel. + + $ref: /schemas/types.yaml#/definitions/uint16 + default: 0 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + #include "dt-bindings/clock/microchip,mpfs-clock.h" + pwm@41000000 { + compatible = "microchip,corepwm-rtl-v4"; + microchip,sync-update = /bits/ 16 <0>; + clocks = <&clkcfg CLK_FIC3>; + reg = <0x41000000 0xF0>; + #pwm-cells = <2>; + }; -- 2.32.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-01-17 11:07 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-17 11:07 [PATCH v4 00/14] Update the Icicle Kit device tree conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 01/14] dt-bindings: soc/microchip: update syscontroller compatibles conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 02/14] dt-bindings: soc/microchip: add services as children of sys ctrlr conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 03/14] dt-bindings: i2c: add bindings for microchip mpfs i2c conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:10 ` Rob Herring 2022-01-19 3:10 ` Rob Herring 2022-01-20 8:30 ` Geert Uytterhoeven 2022-01-20 8:30 ` Geert Uytterhoeven 2022-01-20 13:42 ` Conor.Dooley 2022-01-20 13:42 ` Conor.Dooley 2022-01-20 14:56 ` Geert Uytterhoeven 2022-01-20 14:56 ` Geert Uytterhoeven 2022-01-20 15:42 ` conor dooley 2022-01-20 15:42 ` conor dooley 2022-01-17 11:07 ` [PATCH v4 04/14] dt-bindings: rtc: add bindings for microchip mpfs rtc conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:12 ` Rob Herring 2022-01-19 3:12 ` Rob Herring 2022-01-19 10:47 ` Conor.Dooley 2022-01-19 10:47 ` Conor.Dooley 2022-01-17 11:07 ` [PATCH v4 05/14] dt-bindings: gpio: add bindings for microchip mpfs gpio conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:12 ` Rob Herring 2022-01-19 3:12 ` Rob Herring 2022-01-17 11:07 ` [PATCH v4 06/14] dt-bindings: spi: add bindings for microchip mpfs spi conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:13 ` Rob Herring 2022-01-19 3:13 ` Rob Herring 2022-01-17 11:07 ` [PATCH v4 07/14] dt-bindings: usb: add bindings for microchip mpfs musb conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-19 3:13 ` Rob Herring 2022-01-19 3:13 ` Rob Herring 2022-01-17 11:07 ` conor.dooley [this message] 2022-01-17 11:07 ` [PATCH v4 08/14] dt-bindings: pwm: add microchip corepwm binding conor.dooley 2022-01-19 3:14 ` Rob Herring 2022-01-19 3:14 ` Rob Herring 2022-01-17 11:07 ` [PATCH v4 09/14] riscv: dts: microchip: use clk defines for icicle kit conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 10/14] riscv: dts: microchip: add fpga fabric section to " conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 11/14] riscv: dts: microchip: refactor icicle kit device tree conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-18 11:14 ` Conor.Dooley 2022-01-18 11:14 ` Conor.Dooley 2022-01-17 11:07 ` [PATCH v4 12/14] riscv: dts: microchip: update peripherals in " conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 13/14] riscv: dts: microchip: add new peripherals to " conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-17 11:07 ` [PATCH v4 14/14] MAINTAINERS: update riscv/microchip entry conor.dooley 2022-01-17 11:07 ` conor.dooley 2022-01-25 10:21 ` (subset) [PATCH v4 00/14] Update the Icicle Kit device tree Mark Brown 2022-01-25 10:21 ` Mark Brown
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