From: Michael Walle <michael@walle.cc> To: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>, Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>, soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Alexandre Belloni <alexandre.belloni@bootlin.com>, Claudiu Beznea <claudiu.beznea@microchip.com>, Tudor.Ambarus@microchip.com, Horatiu Vultur <horatiu.vultur@microchip.com>, Michael Walle <michael@walle.cc> Subject: [PATCH v4 09/13] ARM: dts: lan966x: add MIIM nodes Date: Tue, 3 May 2022 00:41:23 +0200 [thread overview] Message-ID: <20220502224127.2604333-10-michael@walle.cc> (raw) In-Reply-To: <20220502224127.2604333-1-michael@walle.cc> Add the MDIO controller nodes. The integrated PHYs are connected to the second controller. This controller also takes care of the resets of the integrated PHYs, thus it has two memory regions. The first controller is routed to the external MDIO/MDC pins. By default, they are disabled. Signed-off-by: Michael Walle <michael@walle.cc> --- arch/arm/boot/dts/lan966x.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 64290fb43926..0442735910da 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -418,6 +418,37 @@ gpio: pinctrl@e2004064 { #interrupt-cells = <2>; }; + mdio0: mdio@e2004118 { + compatible = "microchip,lan966x-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe2004118 0x24>; + clocks = <&sys_clk>; + status = "disabled"; + }; + + mdio1: mdio@e200413c { + compatible = "microchip,lan966x-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe200413c 0x24>, + <0xe2010020 0x4>; + clocks = <&sys_clk>; + status = "disabled"; + + phy0: ethernet-phy@1 { + reg = <1>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + phy1: ethernet-phy@2 { + reg = <2>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; + sgpio: gpio@e2004190 { compatible = "microchip,sparx5-sgpio"; reg = <0xe2004190 0x118>; -- 2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Michael Walle <michael@walle.cc> To: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>, Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>, soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Alexandre Belloni <alexandre.belloni@bootlin.com>, Claudiu Beznea <claudiu.beznea@microchip.com>, Tudor.Ambarus@microchip.com, Horatiu Vultur <horatiu.vultur@microchip.com>, Michael Walle <michael@walle.cc> Subject: [PATCH v4 09/13] ARM: dts: lan966x: add MIIM nodes Date: Tue, 3 May 2022 00:41:23 +0200 [thread overview] Message-ID: <20220502224127.2604333-10-michael@walle.cc> (raw) In-Reply-To: <20220502224127.2604333-1-michael@walle.cc> Add the MDIO controller nodes. The integrated PHYs are connected to the second controller. This controller also takes care of the resets of the integrated PHYs, thus it has two memory regions. The first controller is routed to the external MDIO/MDC pins. By default, they are disabled. Signed-off-by: Michael Walle <michael@walle.cc> --- arch/arm/boot/dts/lan966x.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 64290fb43926..0442735910da 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -418,6 +418,37 @@ gpio: pinctrl@e2004064 { #interrupt-cells = <2>; }; + mdio0: mdio@e2004118 { + compatible = "microchip,lan966x-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe2004118 0x24>; + clocks = <&sys_clk>; + status = "disabled"; + }; + + mdio1: mdio@e200413c { + compatible = "microchip,lan966x-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe200413c 0x24>, + <0xe2010020 0x4>; + clocks = <&sys_clk>; + status = "disabled"; + + phy0: ethernet-phy@1 { + reg = <1>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + phy1: ethernet-phy@2 { + reg = <2>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; + sgpio: gpio@e2004190 { compatible = "microchip,sparx5-sgpio"; reg = <0xe2004190 0x118>; -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-05-02 22:42 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-02 22:41 [PATCH v4 00/13] ARM: dts: lan966x: dtsi improvements and KSwitch D10 support Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 01/13] ARM: dts: lan966x: swap dma channels for crypto node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 02/13] ARM: dts: lan966x: add sgpio node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 03/13] ARM: dts: lan966x: add missing uart DMA channel Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 04/13] ARM: dts: lan966x: add all flexcom usart nodes Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 05/13] ARM: dts: lan966x: add flexcom SPI nodes Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 06/13] ARM: dts: lan966x: add flexcom I2C nodes Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 07/13] ARM: dts: lan966x: add basic Kontron KSwitch D10 support Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 08/13] ARM: dts: lan966x: add hwmon node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:25 ` Claudiu.Beznea 2022-05-09 6:25 ` Claudiu.Beznea 2022-05-02 22:41 ` Michael Walle [this message] 2022-05-02 22:41 ` [PATCH v4 09/13] ARM: dts: lan966x: add MIIM nodes Michael Walle 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 10/13] ARM: dts: lan966x: add reset switch reset node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 11/13] ARM: dts: lan966x: add serdes node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 12/13] ARM: dts: lan966x: add switch node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 13/13] ARM: dts: kswitch-d10: enable networking Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-04 10:16 ` [PATCH v4 00/13] ARM: dts: lan966x: dtsi improvements and KSwitch D10 support Horatiu Vultur 2022-05-04 10:16 ` Horatiu Vultur 2022-05-11 9:07 ` Michael Walle 2022-05-11 9:07 ` Michael Walle
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