From: <Claudiu.Beznea@microchip.com> To: <michael@walle.cc>, <Kavyasree.Kotagiri@microchip.com>, <Nicolas.Ferre@microchip.com> Cc: <arnd@arndb.de>, <olof@lixom.net>, <soc@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski@canonical.com>, <alexandre.belloni@bootlin.com>, <Tudor.Ambarus@microchip.com>, <Horatiu.Vultur@microchip.com> Subject: Re: [PATCH v4 10/13] ARM: dts: lan966x: add reset switch reset node Date: Mon, 9 May 2022 06:26:35 +0000 [thread overview] Message-ID: <642fa722-70d8-edcd-85c4-0ad9cc284fcd@microchip.com> (raw) In-Reply-To: <20220502224127.2604333-11-michael@walle.cc> On 03.05.2022 01:41, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Add the switch reset node which will later be used by the switch driver. > The switch reset also resets the GPIO controller and the SGPIO > controller, thus it also has to be connectected to these nodes. This way > the reset will only issued once for the first device requesting the > reset. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > arch/arm/boot/dts/lan966x.dtsi | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > index 0442735910da..7020b31322d8 100644 > --- a/arch/arm/boot/dts/lan966x.dtsi > +++ b/arch/arm/boot/dts/lan966x.dtsi > @@ -391,6 +391,11 @@ watchdog: watchdog@e0090000 { > status = "disabled"; > }; > > + cpu_ctrl: syscon@e00c0000 { > + compatible = "microchip,lan966x-cpu-syscon", "syscon"; > + reg = <0xe00c0000 0x350>; > + }; > + > can0: can@e081c000 { > compatible = "bosch,m_can"; > reg = <0xe081c000 0xfc>, <0x00100000 0x4000>; > @@ -406,10 +411,20 @@ can0: can@e081c000 { > status = "disabled"; > }; > > + reset: reset-controller@e200400c { > + compatible = "microchip,lan966x-switch-reset"; > + reg = <0xe200400c 0x4>; > + reg-names = "gcb"; > + #reset-cells = <1>; > + cpu-syscon = <&cpu_ctrl>; > + }; > + > gpio: pinctrl@e2004064 { > compatible = "microchip,lan966x-pinctrl"; > reg = <0xe2004064 0xb4>, > <0xe2010024 0x138>; > + resets = <&reset 0>; > + reset-names = "switch"; > gpio-controller; > #gpio-cells = <2>; > gpio-ranges = <&gpio 0 0 78>; > @@ -453,6 +468,8 @@ sgpio: gpio@e2004190 { > compatible = "microchip,sparx5-sgpio"; > reg = <0xe2004190 0x118>; > clocks = <&sys_clk>; > + resets = <&reset 0>; > + reset-names = "switch"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > -- > 2.30.2 >
WARNING: multiple messages have this Message-ID (diff)
From: <Claudiu.Beznea@microchip.com> To: <michael@walle.cc>, <Kavyasree.Kotagiri@microchip.com>, <Nicolas.Ferre@microchip.com> Cc: <arnd@arndb.de>, <olof@lixom.net>, <soc@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski@canonical.com>, <alexandre.belloni@bootlin.com>, <Tudor.Ambarus@microchip.com>, <Horatiu.Vultur@microchip.com> Subject: Re: [PATCH v4 10/13] ARM: dts: lan966x: add reset switch reset node Date: Mon, 9 May 2022 06:26:35 +0000 [thread overview] Message-ID: <642fa722-70d8-edcd-85c4-0ad9cc284fcd@microchip.com> (raw) In-Reply-To: <20220502224127.2604333-11-michael@walle.cc> On 03.05.2022 01:41, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Add the switch reset node which will later be used by the switch driver. > The switch reset also resets the GPIO controller and the SGPIO > controller, thus it also has to be connectected to these nodes. This way > the reset will only issued once for the first device requesting the > reset. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > arch/arm/boot/dts/lan966x.dtsi | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > index 0442735910da..7020b31322d8 100644 > --- a/arch/arm/boot/dts/lan966x.dtsi > +++ b/arch/arm/boot/dts/lan966x.dtsi > @@ -391,6 +391,11 @@ watchdog: watchdog@e0090000 { > status = "disabled"; > }; > > + cpu_ctrl: syscon@e00c0000 { > + compatible = "microchip,lan966x-cpu-syscon", "syscon"; > + reg = <0xe00c0000 0x350>; > + }; > + > can0: can@e081c000 { > compatible = "bosch,m_can"; > reg = <0xe081c000 0xfc>, <0x00100000 0x4000>; > @@ -406,10 +411,20 @@ can0: can@e081c000 { > status = "disabled"; > }; > > + reset: reset-controller@e200400c { > + compatible = "microchip,lan966x-switch-reset"; > + reg = <0xe200400c 0x4>; > + reg-names = "gcb"; > + #reset-cells = <1>; > + cpu-syscon = <&cpu_ctrl>; > + }; > + > gpio: pinctrl@e2004064 { > compatible = "microchip,lan966x-pinctrl"; > reg = <0xe2004064 0xb4>, > <0xe2010024 0x138>; > + resets = <&reset 0>; > + reset-names = "switch"; > gpio-controller; > #gpio-cells = <2>; > gpio-ranges = <&gpio 0 0 78>; > @@ -453,6 +468,8 @@ sgpio: gpio@e2004190 { > compatible = "microchip,sparx5-sgpio"; > reg = <0xe2004190 0x118>; > clocks = <&sys_clk>; > + resets = <&reset 0>; > + reset-names = "switch"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > -- > 2.30.2 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-05-09 6:28 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-02 22:41 [PATCH v4 00/13] ARM: dts: lan966x: dtsi improvements and KSwitch D10 support Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 01/13] ARM: dts: lan966x: swap dma channels for crypto node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 02/13] ARM: dts: lan966x: add sgpio node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 03/13] ARM: dts: lan966x: add missing uart DMA channel Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 04/13] ARM: dts: lan966x: add all flexcom usart nodes Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 05/13] ARM: dts: lan966x: add flexcom SPI nodes Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 06/13] ARM: dts: lan966x: add flexcom I2C nodes Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 07/13] ARM: dts: lan966x: add basic Kontron KSwitch D10 support Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-02 22:41 ` [PATCH v4 08/13] ARM: dts: lan966x: add hwmon node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:25 ` Claudiu.Beznea 2022-05-09 6:25 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 09/13] ARM: dts: lan966x: add MIIM nodes Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 10/13] ARM: dts: lan966x: add reset switch reset node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:26 ` Claudiu.Beznea [this message] 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 11/13] ARM: dts: lan966x: add serdes node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-09 6:26 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 12/13] ARM: dts: lan966x: add switch node Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-02 22:41 ` [PATCH v4 13/13] ARM: dts: kswitch-d10: enable networking Michael Walle 2022-05-02 22:41 ` Michael Walle 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-09 6:27 ` Claudiu.Beznea 2022-05-04 10:16 ` [PATCH v4 00/13] ARM: dts: lan966x: dtsi improvements and KSwitch D10 support Horatiu Vultur 2022-05-04 10:16 ` Horatiu Vultur 2022-05-11 9:07 ` Michael Walle 2022-05-11 9:07 ` Michael Walle
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