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From: Sudeep Holla <sudeep.holla@arm.com>
To: Conor.Dooley@microchip.com
Cc: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org,
	Valentina.FernandezAlanis@microchip.com,
	vincent.guittot@linaro.org, dietmar.eggemann@arm.com,
	wangqing@vivo.com, robh+dt@kernel.org, rafael@kernel.org,
	ionela.voinescu@arm.com, pierre.gondois@arm.com,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 00/21] arch_topology: Updates to add socket support and fix cluster ids
Date: Mon, 4 Jul 2022 16:20:08 +0100	[thread overview]
Message-ID: <20220704152008.pc4s2olkdqfnx34h@bogus> (raw)
In-Reply-To: <6a647b6b-c913-b9d7-a23e-b17a8034c5c8@microchip.com>

On Mon, Jul 04, 2022 at 03:10:30PM +0000, Conor.Dooley@microchip.com wrote:
> On 04/07/2022 11:15, Sudeep Holla wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > Hi Greg,
> > 
> > Let me know if you prefer to pull the patches directly or prefer pull
> > request. It has been in -next for a while now.
> > 
> > Hi All,
> > 
> > This version updates cacheinfo to populate and use the information from
> > there for all the cache topology.
> > 
> > This series intends to fix some discrepancies we have in the CPU topology
> > parsing from the device tree /cpu-map node. Also this diverges from the
> > behaviour on a ACPI enabled platform. The expectation is that both DT
> > and ACPI enabled systems must present consistent view of the CPU topology.
> > 
> > Currently we assign generated cluster count as the physical package identifier
> > for each CPU which is wrong. The device tree bindings for CPU topology supports
> > sockets to infer the socket or physical package identifier for a given CPU.
> > Also we don't check if all the cores/threads belong to the same cluster before
> > updating their sibling masks which is fine as we don't set the cluster id yet.
> > 
> > These changes also assigns the cluster identifier as parsed from the device tree
> > cluster nodes within /cpu-map without support for nesting of the clusters.
> > Finally, it also add support for socket nodes in /cpu-map. With this the
> > parsing of exact same information from ACPI PPTT and /cpu-map DT node
> > aligns well.
> > 
> > The only exception is that the last level cache id information can be
> > inferred from the same ACPI PPTT while we need to parse CPU cache nodes
> > in the device tree.
> 
> For DT + RISC-V on PolarFire SoC and SiFive fu540
> Tested-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Anecdotally, v5 was tested on the !SMP D1 which worked fine when
> CONFIG_SMP was enabled.
> 

Thanks a lot for testing on RISC-V, much appreciated! Thanks for your
patience and help with v5 so that we could figure out the silly issue
finally.

-- 
Regards,
Sudeep

WARNING: multiple messages have this Message-ID (diff)
From: Sudeep Holla <sudeep.holla@arm.com>
To: Conor.Dooley@microchip.com
Cc: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org,
	Valentina.FernandezAlanis@microchip.com,
	vincent.guittot@linaro.org, dietmar.eggemann@arm.com,
	wangqing@vivo.com, robh+dt@kernel.org, rafael@kernel.org,
	ionela.voinescu@arm.com, pierre.gondois@arm.com,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 00/21] arch_topology: Updates to add socket support and fix cluster ids
Date: Mon, 4 Jul 2022 16:20:08 +0100	[thread overview]
Message-ID: <20220704152008.pc4s2olkdqfnx34h@bogus> (raw)
In-Reply-To: <6a647b6b-c913-b9d7-a23e-b17a8034c5c8@microchip.com>

On Mon, Jul 04, 2022 at 03:10:30PM +0000, Conor.Dooley@microchip.com wrote:
> On 04/07/2022 11:15, Sudeep Holla wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > Hi Greg,
> > 
> > Let me know if you prefer to pull the patches directly or prefer pull
> > request. It has been in -next for a while now.
> > 
> > Hi All,
> > 
> > This version updates cacheinfo to populate and use the information from
> > there for all the cache topology.
> > 
> > This series intends to fix some discrepancies we have in the CPU topology
> > parsing from the device tree /cpu-map node. Also this diverges from the
> > behaviour on a ACPI enabled platform. The expectation is that both DT
> > and ACPI enabled systems must present consistent view of the CPU topology.
> > 
> > Currently we assign generated cluster count as the physical package identifier
> > for each CPU which is wrong. The device tree bindings for CPU topology supports
> > sockets to infer the socket or physical package identifier for a given CPU.
> > Also we don't check if all the cores/threads belong to the same cluster before
> > updating their sibling masks which is fine as we don't set the cluster id yet.
> > 
> > These changes also assigns the cluster identifier as parsed from the device tree
> > cluster nodes within /cpu-map without support for nesting of the clusters.
> > Finally, it also add support for socket nodes in /cpu-map. With this the
> > parsing of exact same information from ACPI PPTT and /cpu-map DT node
> > aligns well.
> > 
> > The only exception is that the last level cache id information can be
> > inferred from the same ACPI PPTT while we need to parse CPU cache nodes
> > in the device tree.
> 
> For DT + RISC-V on PolarFire SoC and SiFive fu540
> Tested-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Anecdotally, v5 was tested on the !SMP D1 which worked fine when
> CONFIG_SMP was enabled.
> 

Thanks a lot for testing on RISC-V, much appreciated! Thanks for your
patience and help with v5 so that we could figure out the silly issue
finally.

-- 
Regards,
Sudeep

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Sudeep Holla <sudeep.holla@arm.com>
To: Conor.Dooley@microchip.com
Cc: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org,
	Valentina.FernandezAlanis@microchip.com,
	vincent.guittot@linaro.org, dietmar.eggemann@arm.com,
	wangqing@vivo.com, robh+dt@kernel.org, rafael@kernel.org,
	ionela.voinescu@arm.com, pierre.gondois@arm.com,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 00/21] arch_topology: Updates to add socket support and fix cluster ids
Date: Mon, 4 Jul 2022 16:20:08 +0100	[thread overview]
Message-ID: <20220704152008.pc4s2olkdqfnx34h@bogus> (raw)
In-Reply-To: <6a647b6b-c913-b9d7-a23e-b17a8034c5c8@microchip.com>

On Mon, Jul 04, 2022 at 03:10:30PM +0000, Conor.Dooley@microchip.com wrote:
> On 04/07/2022 11:15, Sudeep Holla wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > Hi Greg,
> > 
> > Let me know if you prefer to pull the patches directly or prefer pull
> > request. It has been in -next for a while now.
> > 
> > Hi All,
> > 
> > This version updates cacheinfo to populate and use the information from
> > there for all the cache topology.
> > 
> > This series intends to fix some discrepancies we have in the CPU topology
> > parsing from the device tree /cpu-map node. Also this diverges from the
> > behaviour on a ACPI enabled platform. The expectation is that both DT
> > and ACPI enabled systems must present consistent view of the CPU topology.
> > 
> > Currently we assign generated cluster count as the physical package identifier
> > for each CPU which is wrong. The device tree bindings for CPU topology supports
> > sockets to infer the socket or physical package identifier for a given CPU.
> > Also we don't check if all the cores/threads belong to the same cluster before
> > updating their sibling masks which is fine as we don't set the cluster id yet.
> > 
> > These changes also assigns the cluster identifier as parsed from the device tree
> > cluster nodes within /cpu-map without support for nesting of the clusters.
> > Finally, it also add support for socket nodes in /cpu-map. With this the
> > parsing of exact same information from ACPI PPTT and /cpu-map DT node
> > aligns well.
> > 
> > The only exception is that the last level cache id information can be
> > inferred from the same ACPI PPTT while we need to parse CPU cache nodes
> > in the device tree.
> 
> For DT + RISC-V on PolarFire SoC and SiFive fu540
> Tested-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Anecdotally, v5 was tested on the !SMP D1 which worked fine when
> CONFIG_SMP was enabled.
> 

Thanks a lot for testing on RISC-V, much appreciated! Thanks for your
patience and help with v5 so that we could figure out the silly issue
finally.

-- 
Regards,
Sudeep

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-07-04 15:21 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-04 10:15 [PATCH v6 00/21] arch_topology: Updates to add socket support and fix cluster ids Sudeep Holla
2022-07-04 10:15 ` Sudeep Holla
2022-07-04 10:15 ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 01/21] ACPI: PPTT: Use table offset as fw_token instead of virtual address Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 02/21] cacheinfo: Use of_cpu_device_node_get instead cpu_dev->of_node Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 03/21] cacheinfo: Add helper to access any cache index for a given CPU Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 04/21] cacheinfo: Move cache_leaves_are_shared out of CONFIG_OF Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 05/21] cacheinfo: Add support to check if last level cache(LLC) is valid or shared Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 06/21] cacheinfo: Allow early detection and population of cache attributes Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 07/21] cacheinfo: Use cache identifiers to check if the caches are shared if available Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 08/21] cacheinfo: Align checks in cache_shared_cpu_map_{setup,remove} for readability Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 09/21] arch_topology: Add support to parse and detect cache attributes Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-19 14:22   ` Geert Uytterhoeven
2022-07-19 14:22     ` Geert Uytterhoeven
2022-07-19 14:22     ` Geert Uytterhoeven
2022-07-19 14:37     ` Conor Dooley
2022-07-19 14:37       ` Conor Dooley
2022-07-19 14:37       ` Conor Dooley
2022-07-19 15:05       ` Sudeep Holla
2022-07-19 15:05         ` Sudeep Holla
2022-07-19 15:05         ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 10/21] arch_topology: Use the last level cache information from the cacheinfo Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 11/21] arm64: topology: Remove redundant setting of llc_id in CPU topology Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 12/21] arch_topology: Drop LLC identifier stash from the " Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 13/21] arch_topology: Set thread sibling cpumask only within the cluster Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 14/21] arch_topology: Check for non-negative value rather than -1 for IDs validity Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 15/21] arch_topology: Avoid parsing through all the CPUs once a outlier CPU is found Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 16/21] arch_topology: Don't set cluster identifier as physical package identifier Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 17/21] arch_topology: Limit span of cpu_clustergroup_mask() Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-08  0:10   ` Darren Hart
2022-07-08  0:10     ` Darren Hart
2022-07-08  0:10     ` Darren Hart
2022-07-08  8:04     ` Sudeep Holla
2022-07-08  8:04       ` Sudeep Holla
2022-07-08  8:04       ` Sudeep Holla
2022-07-08 16:27       ` Darren Hart
2022-07-08 16:27         ` Darren Hart
2022-07-08 16:27         ` Darren Hart
2022-07-08  9:05     ` Ionela Voinescu
2022-07-08  9:05       ` Ionela Voinescu
2022-07-08  9:05       ` Ionela Voinescu
2022-07-08 16:14       ` Darren Hart
2022-07-08 16:14         ` Darren Hart
2022-07-08 16:14         ` Darren Hart
2022-07-04 10:16 ` [PATCH v6 18/21] arch_topology: Set cluster identifier in each core/thread from /cpu-map Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 19/21] arch_topology: Add support for parsing sockets in /cpu-map Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 20/21] arch_topology: Warn that topology for nested clusters is not supported Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 21/21] ACPI: Remove the unused find_acpi_cpu_cache_topology() Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 15:10 ` [PATCH v6 00/21] arch_topology: Updates to add socket support and fix cluster ids Conor.Dooley
2022-07-04 15:10   ` Conor.Dooley
2022-07-04 15:10   ` Conor.Dooley
2022-07-04 15:20   ` Sudeep Holla [this message]
2022-07-04 15:20     ` Sudeep Holla
2022-07-04 15:20     ` Sudeep Holla
     [not found]   ` <507c6b64-fc23-3eea-e4c1-4d426025d658@inria.fr>
2022-07-05 19:06     ` Conor.Dooley
2022-07-05 19:06       ` Conor.Dooley
2022-07-05 19:06       ` Conor.Dooley
2022-07-05 20:07       ` Sudeep Holla
2022-07-05 20:07         ` Sudeep Holla
2022-07-05 20:07         ` Sudeep Holla
2022-07-05 20:14         ` Conor.Dooley
2022-07-05 20:14           ` Conor.Dooley
2022-07-05 20:14           ` Conor.Dooley
2022-07-05 20:22           ` Sudeep Holla
2022-07-05 20:22             ` Sudeep Holla
2022-07-05 20:22             ` Sudeep Holla

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