All of lore.kernel.org
 help / color / mirror / Atom feed
From: Darren Hart <darren@os.amperecomputing.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: linux-kernel@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	conor.dooley@microchip.com,
	valentina.fernandezalanis@microchip.com,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Dietmar Eggemann <dietmar.eggemann@arm.com>,
	Qing Wang <wangqing@vivo.com>, Rob Herring <robh+dt@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Ionela Voinescu <ionela.voinescu@arm.com>,
	Pierre Gondois <pierre.gondois@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 17/21] arch_topology: Limit span of cpu_clustergroup_mask()
Date: Fri, 8 Jul 2022 09:27:04 -0700	[thread overview]
Message-ID: <Ysha2AL60u8lb5zT@fedora> (raw)
In-Reply-To: <20220708080424.22x2bgcbggb6skua@bogus>

On Fri, Jul 08, 2022 at 09:04:24AM +0100, Sudeep Holla wrote:
> Hi Darren,
> 
> I will let Ionela or Dietmar cover some of the scheduler aspects as
> I don't have much knowledge in that area.
> 
> On Thu, Jul 07, 2022 at 05:10:19PM -0700, Darren Hart wrote:
> > On Mon, Jul 04, 2022 at 11:16:01AM +0100, Sudeep Holla wrote:
> > > From: Ionela Voinescu <ionela.voinescu@arm.com>
> > 
> > Hi Sudeep and Ionela,
> > 
> > > 
> > > Currently the cluster identifier is not set on DT based platforms.
> > > The reset or default value is -1 for all the CPUs. Once we assign the
> > > cluster identifier values correctly, the cluster_sibling mask will be
> > > populated and returned by cpu_clustergroup_mask() to contribute in the
> > > creation of the CLS scheduling domain level, if SCHED_CLUSTER is
> > > enabled.
> > > 
> > > To avoid topologies that will result in questionable or incorrect
> > > scheduling domains, impose restrictions regarding the span of clusters,
> > 
> > Can you provide a specific example of a valid topology that results in
> > the wrong thing currently?
> >
> 
> As a simple example, Juno with 2 clusters and L2 for each cluster. IIUC
> MC is preferred instead of CLS and both MC and CLS domains are exact
> match.
> 
> > > 
> > > While previously the scheduling domain builder code would have removed MC
> > > as redundant and kept CLS if SCHED_CLUSTER was enabled and the
> > > cpu_coregroup_mask() and cpu_clustergroup_mask() spanned the same CPUs,
> > > now CLS will be removed and MC kept.
> > > 
> > 
> > This is not desireable for all systems, particular those which don't
> > have an L3 but do share other resources - such as the snoop filter in
> > the case of the Ampere Altra.

I was wrong here. This match also modifies the coregroup, the MC after
this patch is equivalent to the CLS before the patch. The Altra is not
negatively impacted here.

> > 
> > While not universally supported, we agreed in the discussion on the
> > above patch to allow systems to define clusters independently from the
> > L3 as an LLC since this is also independently defined in PPTT.
> >
> > Going back to my first comment - does this fix an existing system with a
> > valid topology? 
> 
> Yes as mentioned above Juno.
> 
> > It's not clear to me what that would look like. The Ampere Altra presents
> > a cluster level in PPTT because that is the desireable topology for the
> > system.
> 
> Absolutely wrong reason. It should present because the hardware is so,
> not because some OSPM desires something in someway. Sorry that's not how
> DT/ACPI is designed for. If 2 different OSPM desires different things, then
> one ACPI will not be sufficient.

Agree. I worded that badly. I should have said the Altra presents a PPTT
topology that accurately reflects the hardwere. There is no shared
cpu-side LLC, and there is an affinity between the DSU pairs which share
a snoop filter.

I do think the general assumption that MC shares a cpu-side LLC will
continue to present challenges to the Altra topology in terms of ongoing
to changes to the code. I don't have a good solution to that at the
moment, something I'll continue to think on.

> 
> > If it's not desirable for another system to have the cluster topology -
> > shouldn't it not present that layer to the kernel in the first place?
> 
> Absolutely 100% yes, it must present it if the hardware is designed so.
> No if or but.
> 
> -- 
> Regards,
> Sudeep

Thanks Sudeep,

-- 
Darren Hart
Ampere Computing / OS and Kernel

WARNING: multiple messages have this Message-ID (diff)
From: Darren Hart <darren@os.amperecomputing.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: linux-kernel@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	conor.dooley@microchip.com,
	valentina.fernandezalanis@microchip.com,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Dietmar Eggemann <dietmar.eggemann@arm.com>,
	Qing Wang <wangqing@vivo.com>, Rob Herring <robh+dt@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Ionela Voinescu <ionela.voinescu@arm.com>,
	Pierre Gondois <pierre.gondois@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 17/21] arch_topology: Limit span of cpu_clustergroup_mask()
Date: Fri, 8 Jul 2022 09:27:04 -0700	[thread overview]
Message-ID: <Ysha2AL60u8lb5zT@fedora> (raw)
In-Reply-To: <20220708080424.22x2bgcbggb6skua@bogus>

On Fri, Jul 08, 2022 at 09:04:24AM +0100, Sudeep Holla wrote:
> Hi Darren,
> 
> I will let Ionela or Dietmar cover some of the scheduler aspects as
> I don't have much knowledge in that area.
> 
> On Thu, Jul 07, 2022 at 05:10:19PM -0700, Darren Hart wrote:
> > On Mon, Jul 04, 2022 at 11:16:01AM +0100, Sudeep Holla wrote:
> > > From: Ionela Voinescu <ionela.voinescu@arm.com>
> > 
> > Hi Sudeep and Ionela,
> > 
> > > 
> > > Currently the cluster identifier is not set on DT based platforms.
> > > The reset or default value is -1 for all the CPUs. Once we assign the
> > > cluster identifier values correctly, the cluster_sibling mask will be
> > > populated and returned by cpu_clustergroup_mask() to contribute in the
> > > creation of the CLS scheduling domain level, if SCHED_CLUSTER is
> > > enabled.
> > > 
> > > To avoid topologies that will result in questionable or incorrect
> > > scheduling domains, impose restrictions regarding the span of clusters,
> > 
> > Can you provide a specific example of a valid topology that results in
> > the wrong thing currently?
> >
> 
> As a simple example, Juno with 2 clusters and L2 for each cluster. IIUC
> MC is preferred instead of CLS and both MC and CLS domains are exact
> match.
> 
> > > 
> > > While previously the scheduling domain builder code would have removed MC
> > > as redundant and kept CLS if SCHED_CLUSTER was enabled and the
> > > cpu_coregroup_mask() and cpu_clustergroup_mask() spanned the same CPUs,
> > > now CLS will be removed and MC kept.
> > > 
> > 
> > This is not desireable for all systems, particular those which don't
> > have an L3 but do share other resources - such as the snoop filter in
> > the case of the Ampere Altra.

I was wrong here. This match also modifies the coregroup, the MC after
this patch is equivalent to the CLS before the patch. The Altra is not
negatively impacted here.

> > 
> > While not universally supported, we agreed in the discussion on the
> > above patch to allow systems to define clusters independently from the
> > L3 as an LLC since this is also independently defined in PPTT.
> >
> > Going back to my first comment - does this fix an existing system with a
> > valid topology? 
> 
> Yes as mentioned above Juno.
> 
> > It's not clear to me what that would look like. The Ampere Altra presents
> > a cluster level in PPTT because that is the desireable topology for the
> > system.
> 
> Absolutely wrong reason. It should present because the hardware is so,
> not because some OSPM desires something in someway. Sorry that's not how
> DT/ACPI is designed for. If 2 different OSPM desires different things, then
> one ACPI will not be sufficient.

Agree. I worded that badly. I should have said the Altra presents a PPTT
topology that accurately reflects the hardwere. There is no shared
cpu-side LLC, and there is an affinity between the DSU pairs which share
a snoop filter.

I do think the general assumption that MC shares a cpu-side LLC will
continue to present challenges to the Altra topology in terms of ongoing
to changes to the code. I don't have a good solution to that at the
moment, something I'll continue to think on.

> 
> > If it's not desirable for another system to have the cluster topology -
> > shouldn't it not present that layer to the kernel in the first place?
> 
> Absolutely 100% yes, it must present it if the hardware is designed so.
> No if or but.
> 
> -- 
> Regards,
> Sudeep

Thanks Sudeep,

-- 
Darren Hart
Ampere Computing / OS and Kernel

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Darren Hart <darren@os.amperecomputing.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: linux-kernel@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	conor.dooley@microchip.com,
	valentina.fernandezalanis@microchip.com,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Dietmar Eggemann <dietmar.eggemann@arm.com>,
	Qing Wang <wangqing@vivo.com>, Rob Herring <robh+dt@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Ionela Voinescu <ionela.voinescu@arm.com>,
	Pierre Gondois <pierre.gondois@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 17/21] arch_topology: Limit span of cpu_clustergroup_mask()
Date: Fri, 8 Jul 2022 09:27:04 -0700	[thread overview]
Message-ID: <Ysha2AL60u8lb5zT@fedora> (raw)
In-Reply-To: <20220708080424.22x2bgcbggb6skua@bogus>

On Fri, Jul 08, 2022 at 09:04:24AM +0100, Sudeep Holla wrote:
> Hi Darren,
> 
> I will let Ionela or Dietmar cover some of the scheduler aspects as
> I don't have much knowledge in that area.
> 
> On Thu, Jul 07, 2022 at 05:10:19PM -0700, Darren Hart wrote:
> > On Mon, Jul 04, 2022 at 11:16:01AM +0100, Sudeep Holla wrote:
> > > From: Ionela Voinescu <ionela.voinescu@arm.com>
> > 
> > Hi Sudeep and Ionela,
> > 
> > > 
> > > Currently the cluster identifier is not set on DT based platforms.
> > > The reset or default value is -1 for all the CPUs. Once we assign the
> > > cluster identifier values correctly, the cluster_sibling mask will be
> > > populated and returned by cpu_clustergroup_mask() to contribute in the
> > > creation of the CLS scheduling domain level, if SCHED_CLUSTER is
> > > enabled.
> > > 
> > > To avoid topologies that will result in questionable or incorrect
> > > scheduling domains, impose restrictions regarding the span of clusters,
> > 
> > Can you provide a specific example of a valid topology that results in
> > the wrong thing currently?
> >
> 
> As a simple example, Juno with 2 clusters and L2 for each cluster. IIUC
> MC is preferred instead of CLS and both MC and CLS domains are exact
> match.
> 
> > > 
> > > While previously the scheduling domain builder code would have removed MC
> > > as redundant and kept CLS if SCHED_CLUSTER was enabled and the
> > > cpu_coregroup_mask() and cpu_clustergroup_mask() spanned the same CPUs,
> > > now CLS will be removed and MC kept.
> > > 
> > 
> > This is not desireable for all systems, particular those which don't
> > have an L3 but do share other resources - such as the snoop filter in
> > the case of the Ampere Altra.

I was wrong here. This match also modifies the coregroup, the MC after
this patch is equivalent to the CLS before the patch. The Altra is not
negatively impacted here.

> > 
> > While not universally supported, we agreed in the discussion on the
> > above patch to allow systems to define clusters independently from the
> > L3 as an LLC since this is also independently defined in PPTT.
> >
> > Going back to my first comment - does this fix an existing system with a
> > valid topology? 
> 
> Yes as mentioned above Juno.
> 
> > It's not clear to me what that would look like. The Ampere Altra presents
> > a cluster level in PPTT because that is the desireable topology for the
> > system.
> 
> Absolutely wrong reason. It should present because the hardware is so,
> not because some OSPM desires something in someway. Sorry that's not how
> DT/ACPI is designed for. If 2 different OSPM desires different things, then
> one ACPI will not be sufficient.

Agree. I worded that badly. I should have said the Altra presents a PPTT
topology that accurately reflects the hardwere. There is no shared
cpu-side LLC, and there is an affinity between the DSU pairs which share
a snoop filter.

I do think the general assumption that MC shares a cpu-side LLC will
continue to present challenges to the Altra topology in terms of ongoing
to changes to the code. I don't have a good solution to that at the
moment, something I'll continue to think on.

> 
> > If it's not desirable for another system to have the cluster topology -
> > shouldn't it not present that layer to the kernel in the first place?
> 
> Absolutely 100% yes, it must present it if the hardware is designed so.
> No if or but.
> 
> -- 
> Regards,
> Sudeep

Thanks Sudeep,

-- 
Darren Hart
Ampere Computing / OS and Kernel

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-07-08 16:27 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-04 10:15 [PATCH v6 00/21] arch_topology: Updates to add socket support and fix cluster ids Sudeep Holla
2022-07-04 10:15 ` Sudeep Holla
2022-07-04 10:15 ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 01/21] ACPI: PPTT: Use table offset as fw_token instead of virtual address Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 02/21] cacheinfo: Use of_cpu_device_node_get instead cpu_dev->of_node Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 03/21] cacheinfo: Add helper to access any cache index for a given CPU Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 04/21] cacheinfo: Move cache_leaves_are_shared out of CONFIG_OF Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 05/21] cacheinfo: Add support to check if last level cache(LLC) is valid or shared Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 06/21] cacheinfo: Allow early detection and population of cache attributes Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 07/21] cacheinfo: Use cache identifiers to check if the caches are shared if available Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 08/21] cacheinfo: Align checks in cache_shared_cpu_map_{setup,remove} for readability Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 09/21] arch_topology: Add support to parse and detect cache attributes Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-19 14:22   ` Geert Uytterhoeven
2022-07-19 14:22     ` Geert Uytterhoeven
2022-07-19 14:22     ` Geert Uytterhoeven
2022-07-19 14:37     ` Conor Dooley
2022-07-19 14:37       ` Conor Dooley
2022-07-19 14:37       ` Conor Dooley
2022-07-19 15:05       ` Sudeep Holla
2022-07-19 15:05         ` Sudeep Holla
2022-07-19 15:05         ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 10/21] arch_topology: Use the last level cache information from the cacheinfo Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 11/21] arm64: topology: Remove redundant setting of llc_id in CPU topology Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 12/21] arch_topology: Drop LLC identifier stash from the " Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 13/21] arch_topology: Set thread sibling cpumask only within the cluster Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 14/21] arch_topology: Check for non-negative value rather than -1 for IDs validity Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15 ` [PATCH v6 15/21] arch_topology: Avoid parsing through all the CPUs once a outlier CPU is found Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:15   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 16/21] arch_topology: Don't set cluster identifier as physical package identifier Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 17/21] arch_topology: Limit span of cpu_clustergroup_mask() Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-08  0:10   ` Darren Hart
2022-07-08  0:10     ` Darren Hart
2022-07-08  0:10     ` Darren Hart
2022-07-08  8:04     ` Sudeep Holla
2022-07-08  8:04       ` Sudeep Holla
2022-07-08  8:04       ` Sudeep Holla
2022-07-08 16:27       ` Darren Hart [this message]
2022-07-08 16:27         ` Darren Hart
2022-07-08 16:27         ` Darren Hart
2022-07-08  9:05     ` Ionela Voinescu
2022-07-08  9:05       ` Ionela Voinescu
2022-07-08  9:05       ` Ionela Voinescu
2022-07-08 16:14       ` Darren Hart
2022-07-08 16:14         ` Darren Hart
2022-07-08 16:14         ` Darren Hart
2022-07-04 10:16 ` [PATCH v6 18/21] arch_topology: Set cluster identifier in each core/thread from /cpu-map Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 19/21] arch_topology: Add support for parsing sockets in /cpu-map Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 20/21] arch_topology: Warn that topology for nested clusters is not supported Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16 ` [PATCH v6 21/21] ACPI: Remove the unused find_acpi_cpu_cache_topology() Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 10:16   ` Sudeep Holla
2022-07-04 15:10 ` [PATCH v6 00/21] arch_topology: Updates to add socket support and fix cluster ids Conor.Dooley
2022-07-04 15:10   ` Conor.Dooley
2022-07-04 15:10   ` Conor.Dooley
2022-07-04 15:20   ` Sudeep Holla
2022-07-04 15:20     ` Sudeep Holla
2022-07-04 15:20     ` Sudeep Holla
     [not found]   ` <507c6b64-fc23-3eea-e4c1-4d426025d658@inria.fr>
2022-07-05 19:06     ` Conor.Dooley
2022-07-05 19:06       ` Conor.Dooley
2022-07-05 19:06       ` Conor.Dooley
2022-07-05 20:07       ` Sudeep Holla
2022-07-05 20:07         ` Sudeep Holla
2022-07-05 20:07         ` Sudeep Holla
2022-07-05 20:14         ` Conor.Dooley
2022-07-05 20:14           ` Conor.Dooley
2022-07-05 20:14           ` Conor.Dooley
2022-07-05 20:22           ` Sudeep Holla
2022-07-05 20:22             ` Sudeep Holla
2022-07-05 20:22             ` Sudeep Holla

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Ysha2AL60u8lb5zT@fedora \
    --to=darren@os.amperecomputing.com \
    --cc=conor.dooley@microchip.com \
    --cc=dietmar.eggemann@arm.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=ionela.voinescu@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=pierre.gondois@arm.com \
    --cc=rafael@kernel.org \
    --cc=robh+dt@kernel.org \
    --cc=sudeep.holla@arm.com \
    --cc=valentina.fernandezalanis@microchip.com \
    --cc=vincent.guittot@linaro.org \
    --cc=wangqing@vivo.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.