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From: Xin Li <xin3.li@intel.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org,
	brgerst@gmail.com, chang.seok.bae@intel.com, jgross@suse.com
Subject: [PATCH v6 1/5] x86/cpufeature: add the cpu feature bit for LKGS
Date: Wed, 11 Jan 2023 23:20:28 -0800	[thread overview]
Message-ID: <20230112072032.35626-2-xin3.li@intel.com> (raw)
In-Reply-To: <20230112072032.35626-1-xin3.li@intel.com>

From: "H. Peter Anvin (Intel)" <hpa@zytor.com>

Add the CPU feature bit for LKGS (Load "Kernel" GS).

LKGS instruction is introduced with Intel FRED (flexible return and
event delivery) specification. Search for the latest FRED spec in most
search engines by doing:
site:intel.com FRED (flexible return and event delivery) specification

LKGS behaves like the MOV to GS instruction except that it loads
the base address into the IA32_KERNEL_GS_BASE MSR instead of the
GS segment’s descriptor cache, which is exactly what Linux kernel
does to load a user level GS base.  Thus, with LKGS, there is no
need to SWAPGS away from the kernel GS base.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
---

Changes since v5:
* Recommend to search for the latest FRED spec instead of providing
  a FRED spec URL, which is likely to be unstable (Borislav Petkov).

Changes since v2:
* Add "" not to show "lkgs" in /proc/cpuinfo (Chang S. Bae).
---
 arch/x86/include/asm/cpufeatures.h       | 1 +
 tools/arch/x86/include/asm/cpufeatures.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 61012476d66e..4d93c60407fe 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -312,6 +312,7 @@
 #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
 #define X86_FEATURE_CMPCCXADD           (12*32+ 7) /* "" CMPccXADD instructions */
+#define X86_FEATURE_LKGS		(12*32+18) /* "" Load "kernel" (userspace) gs */
 #define X86_FEATURE_AMX_FP16		(12*32+21) /* "" AMX fp16 Support */
 #define X86_FEATURE_AVX_IFMA            (12*32+23) /* "" Support for VPMADD52[H,L]UQ */
 
diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h
index 61012476d66e..4d93c60407fe 100644
--- a/tools/arch/x86/include/asm/cpufeatures.h
+++ b/tools/arch/x86/include/asm/cpufeatures.h
@@ -312,6 +312,7 @@
 #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
 #define X86_FEATURE_CMPCCXADD           (12*32+ 7) /* "" CMPccXADD instructions */
+#define X86_FEATURE_LKGS		(12*32+18) /* "" Load "kernel" (userspace) gs */
 #define X86_FEATURE_AMX_FP16		(12*32+21) /* "" AMX fp16 Support */
 #define X86_FEATURE_AVX_IFMA            (12*32+23) /* "" Support for VPMADD52[H,L]UQ */
 
-- 
2.34.1


  reply	other threads:[~2023-01-12  7:44 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-12  7:20 [PATCH v6 0/5] x86: Enable LKGS instruction Xin Li
2023-01-12  7:20 ` Xin Li [this message]
2023-01-12 12:16   ` [tip: x86/cpu] x86/cpufeature: Add the CPU feature bit for LKGS tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 2/5] x86/opcode: add the LKGS instruction to x86-opcode-map Xin Li
2023-01-12 12:16   ` [tip: x86/cpu] x86/opcode: Add " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 3/5] x86/gsseg: make asm_load_gs_index() take an u16 Xin Li
2023-01-12 12:16   ` [tip: x86/cpu] x86/gsseg: Make " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 4/5] x86/gsseg: move load_gs_index() to its own new header file Xin Li
2023-01-12 12:16   ` [tip: x86/cpu] x86/gsseg: Move " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 5/5] x86/gsseg: use the LKGS instruction if available for load_gs_index() Xin Li
2023-01-13  9:36   ` [tip: x86/cpu] x86/gsseg: Use " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12 12:13 ` [PATCH v6 0/5] x86: Enable LKGS instruction Ingo Molnar
2023-01-12 14:57   ` Peter Zijlstra
2023-01-13 13:29     ` Ingo Molnar
2023-01-13 18:26       ` Li, Xin3

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