From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <ulf.hansson@linaro.org>, <linus.walleij@linaro.org>, <catalin.marinas@arm.com>, <will@kernel.org>, <shawnguo@kernel.org>, <arnd@arndb.de>, <marcel.ziswiler@toradex.com>, <dmitry.baryshkov@linaro.org>, <nfraprado@collabora.com>, <broonie@kernel.org>, <robimarko@gmail.com>, <quic_gurus@quicinc.com>, <bhupesh.sharma@linaro.org>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Cc: Kathiravan T <quic_kathirav@quicinc.com> Subject: [PATCH 01/10] dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl Date: Wed, 25 Jan 2023 16:15:11 +0530 [thread overview] Message-ID: <20230125104520.89684-2-quic_kathirav@quicinc.com> (raw) In-Reply-To: <20230125104520.89684-1-quic_kathirav@quicinc.com> From: Kathiravan T <quic_kathirav@quicinc.com> Add device tree bindings for IPQ5332 TLMM block. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> --- .../pinctrl/qcom,ipq5332-pinctrl.yaml | 134 ++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml new file mode 100644 index 000000000000..d101ee04b8b7 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5332-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5332 TLMM pin controller + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + +description: | + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5332 SoC. + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,ipq5332-tlmm + + reg: + maxItems: 1 + + interrupts: true + interrupt-controller: true + "#interrupt-cells": true + gpio-controller: true + "#gpio-cells": true + gpio-ranges: true + wakeup-parent: true + + gpio-reserved-ranges: + minItems: 1 + maxItems: 27 + + gpio-line-names: + maxItems: 53 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq5332-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq5332-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq5332-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$" + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + + enum: [ PTA_0, PTA_2, PTA_1, atest_char, atest_char0, atest_char1, + atest_char2, atest_char3, atest_tic, audio_pri, audio_pri0, + audio_pri1, audio_sec, audio_sec0, audio_sec1, blsp0_i2c, + blsp0_spi, blsp0_uart0, blsp0_uart1, blsp1_i2c0, blsp1_i2c1, + blsp1_spi0, blsp1_spi1, blsp1_uart0, blsp1_uart1, blsp1_uart2, + blsp2_i2c0, blsp2_i2c1, blsp2_spi, blsp2_spi0, blsp2_spi1, + core_voltage, cri_trng0, cri_trng1, cri_trng2, cri_trng3, + cxc_clk, cxc_data, dbg_out, gcc_plltest, gcc_tlmm, gpio, + lock_det, mac0, mac1, mdc0, mdc1, mdio0, mdio1, pc, pcie0_clk, + pcie0_wake, pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, + pll_test, prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, pwm0, + pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, + qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, + qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, + qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b, + qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, + qdss_tracedata_b, qspi_data, qspi_clk, qspi_cs, resout, rx0, + rx1, sdc_data, sdc_clk, sdc_cmd, tsens_max, wci0, wci1, wci10, + wci11, wci2, wci3, wci4, wci5, wci6, wci7, wci8, wci9, wsi_clk, + wsi_clk3, wsi_data, wsi_data3, wsis_reset, xfem0, xfem1, xfem2, + xfem3, xfem4, xfem5, xfem6, xfem7 ] + + bias-pull-down: true + bias-pull-up: true + bias-disable: true + drive-strength: true + input-enable: true + output-high: true + output-low: true + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq5332-tlmm"; + reg = <0x01000000 0x300000>; + gpio-controller; + #gpio-cells = <0x2>; + gpio-ranges = <&tlmm 0 0 53>; + interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <0x2>; + + serial0-state { + pins = "gpio18", "gpio19"; + function = "blsp0_uart0"; + drive-strength = <8>; + bias-pull-up; + }; + }; -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <ulf.hansson@linaro.org>, <linus.walleij@linaro.org>, <catalin.marinas@arm.com>, <will@kernel.org>, <shawnguo@kernel.org>, <arnd@arndb.de>, <marcel.ziswiler@toradex.com>, <dmitry.baryshkov@linaro.org>, <nfraprado@collabora.com>, <broonie@kernel.org>, <robimarko@gmail.com>, <quic_gurus@quicinc.com>, <bhupesh.sharma@linaro.org>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Cc: Kathiravan T <quic_kathirav@quicinc.com> Subject: [PATCH 01/10] dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl Date: Wed, 25 Jan 2023 16:15:11 +0530 [thread overview] Message-ID: <20230125104520.89684-2-quic_kathirav@quicinc.com> (raw) In-Reply-To: <20230125104520.89684-1-quic_kathirav@quicinc.com> From: Kathiravan T <quic_kathirav@quicinc.com> Add device tree bindings for IPQ5332 TLMM block. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> --- .../pinctrl/qcom,ipq5332-pinctrl.yaml | 134 ++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml new file mode 100644 index 000000000000..d101ee04b8b7 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5332-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5332 TLMM pin controller + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + +description: | + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5332 SoC. + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,ipq5332-tlmm + + reg: + maxItems: 1 + + interrupts: true + interrupt-controller: true + "#interrupt-cells": true + gpio-controller: true + "#gpio-cells": true + gpio-ranges: true + wakeup-parent: true + + gpio-reserved-ranges: + minItems: 1 + maxItems: 27 + + gpio-line-names: + maxItems: 53 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq5332-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq5332-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq5332-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$" + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + + enum: [ PTA_0, PTA_2, PTA_1, atest_char, atest_char0, atest_char1, + atest_char2, atest_char3, atest_tic, audio_pri, audio_pri0, + audio_pri1, audio_sec, audio_sec0, audio_sec1, blsp0_i2c, + blsp0_spi, blsp0_uart0, blsp0_uart1, blsp1_i2c0, blsp1_i2c1, + blsp1_spi0, blsp1_spi1, blsp1_uart0, blsp1_uart1, blsp1_uart2, + blsp2_i2c0, blsp2_i2c1, blsp2_spi, blsp2_spi0, blsp2_spi1, + core_voltage, cri_trng0, cri_trng1, cri_trng2, cri_trng3, + cxc_clk, cxc_data, dbg_out, gcc_plltest, gcc_tlmm, gpio, + lock_det, mac0, mac1, mdc0, mdc1, mdio0, mdio1, pc, pcie0_clk, + pcie0_wake, pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, + pll_test, prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, pwm0, + pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, + qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, + qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, + qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b, + qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, + qdss_tracedata_b, qspi_data, qspi_clk, qspi_cs, resout, rx0, + rx1, sdc_data, sdc_clk, sdc_cmd, tsens_max, wci0, wci1, wci10, + wci11, wci2, wci3, wci4, wci5, wci6, wci7, wci8, wci9, wsi_clk, + wsi_clk3, wsi_data, wsi_data3, wsis_reset, xfem0, xfem1, xfem2, + xfem3, xfem4, xfem5, xfem6, xfem7 ] + + bias-pull-down: true + bias-pull-up: true + bias-disable: true + drive-strength: true + input-enable: true + output-high: true + output-low: true + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq5332-tlmm"; + reg = <0x01000000 0x300000>; + gpio-controller; + #gpio-cells = <0x2>; + gpio-ranges = <&tlmm 0 0 53>; + interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <0x2>; + + serial0-state { + pins = "gpio18", "gpio19"; + function = "blsp0_uart0"; + drive-strength = <8>; + bias-pull-up; + }; + }; -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-25 10:46 UTC|newest] Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-25 10:45 [PATCH 00/10] Add minimal boot support for IPQ5332 Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy [this message] 2023-01-25 10:45 ` [PATCH 01/10] dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl Kathiravan Thirumoorthy 2023-01-25 11:10 ` Krzysztof Kozlowski 2023-01-25 11:10 ` Krzysztof Kozlowski 2023-01-25 15:49 ` Kathiravan Thirumoorthy 2023-01-25 15:49 ` Kathiravan Thirumoorthy 2023-01-25 16:20 ` Krzysztof Kozlowski 2023-01-25 16:20 ` Krzysztof Kozlowski 2023-01-25 16:38 ` Kathiravan Thirumoorthy 2023-01-25 16:38 ` Kathiravan Thirumoorthy 2023-01-25 10:45 ` [PATCH 02/10] pinctrl: qcom: Introduce IPQ5332 TLMM driver Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 10:45 ` [PATCH 03/10] clk: qcom: Add STROMER PLUS PLL type for IPQ5332 Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 20:35 ` Stephen Boyd 2023-01-25 20:35 ` Stephen Boyd 2023-01-25 10:45 ` [PATCH 04/10] dt-bindings: clock: Add Qualcomm IPQ5332 GCC Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 11:13 ` Krzysztof Kozlowski 2023-01-25 11:13 ` Krzysztof Kozlowski 2023-01-25 15:50 ` Kathiravan Thirumoorthy 2023-01-25 15:50 ` Kathiravan Thirumoorthy 2023-01-25 10:45 ` [PATCH 05/10] clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC Kathiravan Thirumoorthy 2023-01-25 11:14 ` Krzysztof Kozlowski 2023-01-25 11:14 ` Krzysztof Kozlowski 2023-01-25 15:53 ` Kathiravan Thirumoorthy 2023-01-25 15:53 ` Kathiravan Thirumoorthy 2023-01-25 20:54 ` Stephen Boyd 2023-01-25 20:54 ` Stephen Boyd 2023-01-26 16:45 ` Kathiravan Thirumoorthy 2023-01-26 16:45 ` Kathiravan Thirumoorthy 2023-01-25 10:45 ` [PATCH 06/10] dt-bindings: qcom: add ipq5332 boards Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 11:15 ` Krzysztof Kozlowski 2023-01-25 11:15 ` Krzysztof Kozlowski 2023-01-25 15:55 ` Kathiravan Thirumoorthy 2023-01-25 15:55 ` Kathiravan Thirumoorthy 2023-01-25 10:45 ` [PATCH 07/10] dt-bindings: firmware: document IPQ5332 SCM Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 11:16 ` Krzysztof Kozlowski 2023-01-25 11:16 ` Krzysztof Kozlowski 2023-01-25 15:55 ` Kathiravan Thirumoorthy 2023-01-25 15:55 ` Kathiravan Thirumoorthy 2023-01-25 10:45 ` [PATCH 08/10] dt-bindings: mmc: sdhci-msm: add IPQ5332 compatible Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 11:17 ` Krzysztof Kozlowski 2023-01-25 11:17 ` Krzysztof Kozlowski 2023-01-27 10:56 ` Ulf Hansson 2023-01-27 10:56 ` Ulf Hansson 2023-01-25 10:45 ` [PATCH 09/10] arm64: dts: qcom: add IPQ5332 SoC and MI01.2 board support Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy 2023-01-25 11:22 ` Krzysztof Kozlowski 2023-01-25 11:22 ` Krzysztof Kozlowski 2023-01-25 16:05 ` Kathiravan Thirumoorthy 2023-01-25 16:05 ` Kathiravan Thirumoorthy 2023-01-25 21:59 ` Konrad Dybcio 2023-01-25 21:59 ` Konrad Dybcio 2023-01-26 16:50 ` Kathiravan Thirumoorthy 2023-01-26 16:50 ` Kathiravan Thirumoorthy 2023-01-30 11:56 ` Kathiravan Thirumoorthy 2023-01-30 11:56 ` Kathiravan Thirumoorthy 2023-01-31 19:24 ` Krzysztof Kozlowski 2023-01-31 19:24 ` Krzysztof Kozlowski 2023-01-25 10:45 ` [PATCH 10/10] arm64: defconfig: Enable IPQ5332 SoC base configs Kathiravan Thirumoorthy 2023-01-25 10:45 ` Kathiravan Thirumoorthy
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