From: Konrad Dybcio <konrad.dybcio@linaro.org> To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio <konrad.dybcio@linaro.org>, Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Akhil P Oommen <quic_akhilpo@quicinc.com>, Chia-I Wu <olvaffe@gmail.com>, Douglas Anderson <dianders@chromium.org>, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/14] drm/msm/a6xx: Enable optional icc voting from OPP tables Date: Thu, 26 Jan 2023 16:16:15 +0100 [thread overview] Message-ID: <20230126151618.225127-12-konrad.dybcio@linaro.org> (raw) In-Reply-To: <20230126151618.225127-1-konrad.dybcio@linaro.org> On GMU-equipped GPUs, the GMU requests appropriate bandwidth votes for us. This is however not the case for the other GPUs. Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle bus voting as part of power level setting. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 62f504ed7ef5..6d6b71306ee5 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2335,5 +2335,9 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) msm_mmu_set_fault_handler(gpu->aspace->mmu, gpu, a6xx_fault_handler); + ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL); + if (ret) + return ERR_PTR(ret); + return gpu; } -- 2.39.1
WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@linaro.org> To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: freedreno@lists.freedesktop.org, Akhil P Oommen <quic_akhilpo@quicinc.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, dri-devel@lists.freedesktop.org, Douglas Anderson <dianders@chromium.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, marijn.suijten@somainline.org, Sean Paul <sean@poorly.run>, linux-kernel@vger.kernel.org Subject: [PATCH 11/14] drm/msm/a6xx: Enable optional icc voting from OPP tables Date: Thu, 26 Jan 2023 16:16:15 +0100 [thread overview] Message-ID: <20230126151618.225127-12-konrad.dybcio@linaro.org> (raw) In-Reply-To: <20230126151618.225127-1-konrad.dybcio@linaro.org> On GMU-equipped GPUs, the GMU requests appropriate bandwidth votes for us. This is however not the case for the other GPUs. Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle bus voting as part of power level setting. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 62f504ed7ef5..6d6b71306ee5 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2335,5 +2335,9 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) msm_mmu_set_fault_handler(gpu->aspace->mmu, gpu, a6xx_fault_handler); + ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL); + if (ret) + return ERR_PTR(ret); + return gpu; } -- 2.39.1
next prev parent reply other threads:[~2023-01-26 15:19 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-26 15:16 [PATCH 00/14] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio 2023-01-26 15:16 ` [PATCH 01/14] drm/msm/a6xx: De-staticize sptprac en/disable functions Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 02/14] drm/msm/a6xx: Extend UBWC config Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-02-01 9:30 ` Akhil P Oommen 2023-02-01 9:30 ` Akhil P Oommen 2023-02-01 10:51 ` Konrad Dybcio 2023-02-01 10:51 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 03/14] drm/msm/a6xx: Introduce GMU wrapper support Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 04/14] drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw init Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 05/14] drm/msm/adreno: Disable has_cached_coherent for A610/A619_holi Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 06/14] drm/msm/gpu: Use dev_pm_opp_set_rate for non-GMU GPUs Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-02-06 18:30 ` Konrad Dybcio 2023-02-06 18:30 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 07/14] drm/msm/a6xx: Add support for A619_holi Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 08/14] drm/msm/a6xx: Add A610 support Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 09/14] drm/msm/a6xx: Fix some A619 tunables Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-02-08 18:21 ` [Freedreno] " Jordan Crouse 2023-02-08 18:21 ` Jordan Crouse 2023-02-14 11:25 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 10/14] drm/msm/a6xx: Fix up A6XX protected registers Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio [this message] 2023-01-26 15:16 ` [PATCH 11/14] drm/msm/a6xx: Enable optional icc voting from OPP tables Konrad Dybcio 2023-01-26 15:16 ` [PATCH 12/14] drm/msm/a6xx: Use "else if" in GPU speedbin rev matching Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 13/14] drm/msm/a6xx: Add A619_holi speedbin support Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio 2023-01-27 14:19 ` Dmitry Baryshkov 2023-01-27 14:19 ` Dmitry Baryshkov 2023-01-27 14:20 ` Konrad Dybcio 2023-01-27 14:20 ` Konrad Dybcio 2023-01-27 14:22 ` Konrad Dybcio 2023-01-27 14:22 ` Konrad Dybcio 2023-01-26 15:16 ` [PATCH 14/14] drm/msm/a6xx: Add A610 " Konrad Dybcio 2023-01-26 15:16 ` Konrad Dybcio
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