From: Andrew Jones <ajones@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: "Jason A. Donenfeld" <Jason@zx2c4.com>,
Jisheng Zhang <jszhang@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Heiko Stuebner <heiko@sntech.de>,
Conor Dooley <conor.dooley@microchip.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
regressions@leemhuis.info, regressions@lists.linux.dev
Subject: Re: [PATCH] riscv: require alternatives framework when selecting FPU support
Date: Wed, 22 Mar 2023 20:26:10 +0100 [thread overview]
Message-ID: <20230322192610.sad42xau33ye5ayn@orel> (raw)
In-Reply-To: <1884bd96-2783-4556-bc57-8b733758baff@spud>
On Wed, Mar 22, 2023 at 03:17:13PM +0000, Conor Dooley wrote:
> On Wed, Mar 22, 2023 at 01:46:31PM +0100, Andrew Jones wrote:
> > On Wed, Mar 22, 2023 at 01:09:07PM +0100, Jason A. Donenfeld wrote:
> > > When moving switch_to's has_fpu() over to using riscv_has_extension_
> > > likely() rather than static branchs, the FPU code gained a dependency on
> > > the alternatives framework. If CONFIG_RISCV_ALTERNATIVE isn't selected
> > > when CONFIG_FPU is, then has_fpu() returns false, and switch_to does not
> > > work as intended. So select CONFIG_RISCV_ALTERNATIVE when CONFIG_FPU is
> > > selected.
> > >
> > > Fixes: 702e64550b12 ("riscv: fpu: switch has_fpu() to riscv_has_extension_likely()")
> > > Link: https://lore.kernel.org/all/ZBruFRwt3rUVngPu@zx2c4.com/
> > > Cc: Jisheng Zhang <jszhang@kernel.org>
> > > Cc: Andrew Jones <ajones@ventanamicro.com>
> > > Cc: Heiko Stuebner <heiko@sntech.de>
> > > Cc: Conor Dooley <conor.dooley@microchip.com>
>
> Thanks for fixing it!
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>
> > > Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
> > > ---
> > > arch/riscv/Kconfig | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > index c5e42cc37604..0f59350c699d 100644
> > > --- a/arch/riscv/Kconfig
> > > +++ b/arch/riscv/Kconfig
> > > @@ -467,6 +467,7 @@ config TOOLCHAIN_HAS_ZIHINTPAUSE
> > > config FPU
> > > bool "FPU support"
> > > default y
> > > + select RISCV_ALTERNATIVE
> > > help
> > > Say N here if you want to disable all floating-point related procedure
> > > in the kernel.
> > > --
> > > 2.40.0
> > >
> >
> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> >
> > I took a look to see if we missed anything else and see that we should
> > do the same patch for KVM. I'll send one.
> >
> > (It's tempting to just select RISCV_ALTERNATIVE from RISCV, but maybe we
> > can defer that wedding a bit longer.)
>
> At that point, the config option should just go away entirely, no?
Ah, yes, and that makes the idea even more attractive, as we could remove
several ifdefs.
Thanks,
drew
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: "Jason A. Donenfeld" <Jason@zx2c4.com>,
Jisheng Zhang <jszhang@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Heiko Stuebner <heiko@sntech.de>,
Conor Dooley <conor.dooley@microchip.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
regressions@leemhuis.info, regressions@lists.linux.dev
Subject: Re: [PATCH] riscv: require alternatives framework when selecting FPU support
Date: Wed, 22 Mar 2023 20:26:10 +0100 [thread overview]
Message-ID: <20230322192610.sad42xau33ye5ayn@orel> (raw)
In-Reply-To: <1884bd96-2783-4556-bc57-8b733758baff@spud>
On Wed, Mar 22, 2023 at 03:17:13PM +0000, Conor Dooley wrote:
> On Wed, Mar 22, 2023 at 01:46:31PM +0100, Andrew Jones wrote:
> > On Wed, Mar 22, 2023 at 01:09:07PM +0100, Jason A. Donenfeld wrote:
> > > When moving switch_to's has_fpu() over to using riscv_has_extension_
> > > likely() rather than static branchs, the FPU code gained a dependency on
> > > the alternatives framework. If CONFIG_RISCV_ALTERNATIVE isn't selected
> > > when CONFIG_FPU is, then has_fpu() returns false, and switch_to does not
> > > work as intended. So select CONFIG_RISCV_ALTERNATIVE when CONFIG_FPU is
> > > selected.
> > >
> > > Fixes: 702e64550b12 ("riscv: fpu: switch has_fpu() to riscv_has_extension_likely()")
> > > Link: https://lore.kernel.org/all/ZBruFRwt3rUVngPu@zx2c4.com/
> > > Cc: Jisheng Zhang <jszhang@kernel.org>
> > > Cc: Andrew Jones <ajones@ventanamicro.com>
> > > Cc: Heiko Stuebner <heiko@sntech.de>
> > > Cc: Conor Dooley <conor.dooley@microchip.com>
>
> Thanks for fixing it!
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>
> > > Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
> > > ---
> > > arch/riscv/Kconfig | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > index c5e42cc37604..0f59350c699d 100644
> > > --- a/arch/riscv/Kconfig
> > > +++ b/arch/riscv/Kconfig
> > > @@ -467,6 +467,7 @@ config TOOLCHAIN_HAS_ZIHINTPAUSE
> > > config FPU
> > > bool "FPU support"
> > > default y
> > > + select RISCV_ALTERNATIVE
> > > help
> > > Say N here if you want to disable all floating-point related procedure
> > > in the kernel.
> > > --
> > > 2.40.0
> > >
> >
> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> >
> > I took a look to see if we missed anything else and see that we should
> > do the same patch for KVM. I'll send one.
> >
> > (It's tempting to just select RISCV_ALTERNATIVE from RISCV, but maybe we
> > can defer that wedding a bit longer.)
>
> At that point, the config option should just go away entirely, no?
Ah, yes, and that makes the idea even more attractive, as we could remove
several ifdefs.
Thanks,
drew
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linux-riscv@lists.infradead.org
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next prev parent reply other threads:[~2023-03-22 19:26 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-28 17:28 [PATCH v5 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 01/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 02/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 03/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 04/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 05/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 06/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-03-22 12:01 ` Jason A. Donenfeld
2023-03-22 12:01 ` Jason A. Donenfeld
2023-03-22 12:09 ` [PATCH] riscv: require alternatives framework when selecting FPU support Jason A. Donenfeld
2023-03-22 12:09 ` Jason A. Donenfeld
2023-03-22 12:46 ` Andrew Jones
2023-03-22 12:46 ` Andrew Jones
2023-03-22 15:17 ` Conor Dooley
2023-03-22 15:17 ` Conor Dooley
2023-03-22 19:26 ` Andrew Jones [this message]
2023-03-22 19:26 ` Andrew Jones
2023-03-22 19:44 ` Conor Dooley
2023-03-22 19:44 ` Conor Dooley
2023-03-22 20:05 ` Conor Dooley
2023-03-22 20:05 ` Conor Dooley
2023-03-22 20:19 ` Jason A. Donenfeld
2023-03-22 20:19 ` Jason A. Donenfeld
2023-03-23 14:49 ` Conor Dooley
2023-03-23 14:49 ` Conor Dooley
2023-03-23 15:56 ` Jason A. Donenfeld
2023-03-23 15:56 ` Jason A. Donenfeld
2023-03-23 22:19 ` Conor Dooley
2023-03-23 22:19 ` Conor Dooley
2023-01-28 17:28 ` [PATCH v5 07/13] riscv: module: move find_section to module.h Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 08/13] riscv: module: Add ADD16 and SUB16 rela types Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-02-02 23:39 ` [PATCH v5 00/13] riscv: improve boot time isa extensions handling Palmer Dabbelt
2023-02-02 23:39 ` Palmer Dabbelt
2023-02-02 23:40 ` patchwork-bot+linux-riscv
2023-02-02 23:40 ` patchwork-bot+linux-riscv
2023-02-12 15:43 ` Guenter Roeck
2023-02-12 15:43 ` Guenter Roeck
2023-02-12 15:59 ` Conor Dooley
2023-02-12 15:59 ` Conor Dooley
2023-02-12 16:33 ` Conor Dooley
2023-02-12 16:33 ` Conor Dooley
2023-02-12 17:06 ` Conor Dooley
2023-02-12 17:06 ` Conor Dooley
2023-02-12 18:06 ` Conor Dooley
2023-02-12 18:06 ` Conor Dooley
2023-02-12 18:14 ` Guenter Roeck
2023-02-12 18:14 ` Guenter Roeck
2023-02-12 18:20 ` Conor Dooley
2023-02-12 18:20 ` Conor Dooley
2023-02-12 18:38 ` Guenter Roeck
2023-02-12 18:38 ` Guenter Roeck
2023-02-12 18:45 ` Conor Dooley
2023-02-12 18:45 ` Conor Dooley
2023-02-12 20:27 ` Guenter Roeck
2023-02-12 20:27 ` Guenter Roeck
2023-02-12 20:39 ` Conor Dooley
2023-02-12 20:39 ` Conor Dooley
2023-02-12 22:21 ` Guenter Roeck
2023-02-12 22:21 ` Guenter Roeck
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