From: Timur Tabi <timur@codeaurora.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
anjiandi@codeaurora.org,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>
Subject: Re: [PATCH 1/2] [v5] pinctrl: qcom: disable GPIO groups with no pins
Date: Thu, 19 Oct 2017 17:44:59 -0500 [thread overview]
Message-ID: <819a0c67-3494-030d-3166-748081509c83@codeaurora.org> (raw)
In-Reply-To: <CACRpkdYYp5TSM1QV-f+FmbwzY_ittgW-4MuXiZ9NW694GoMwKQ@mail.gmail.com>
On 10/07/2017 06:07 AM, Linus Walleij wrote:
> I mean that you add
> unsigned long *line_valid_mask;
> to struct gpio_chip using the same type of logic
> as .irq_valid_mask. The mask should be optional.
>
> Then the operation gpiod_get[_index]() will FAIL if the
> line is not valid.
>
> There is no need to check on every operation, there should
> be no way to get a handle on the pin any other way.
>
> All new code should be using descriptors at this point so we
> only need to design for that case.
I think I'm missing something, because I implemented what you're asking
for, but whenever I try to expose a GPIO from sysfs (e.g. echo 37 >
/sys/class/gpio/export), gpiod_get_index() is not called. The only
thing preventing the GPIO from being exported is the ->request callback:
static int msm_gpio_request(struct gpio_chip *chip, unsigned int offset)
{
struct msm_pinctrl *pctrl = gpiochip_get_data(chip);
const struct msm_pingroup *g = &pctrl->soc->groups[offset];
if (!g->npins)
return -ENODEV;
What operation is supposed to trigger a call to gpiod_get_index?
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
WARNING: multiple messages have this Message-ID (diff)
From: timur@codeaurora.org (Timur Tabi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] [v5] pinctrl: qcom: disable GPIO groups with no pins
Date: Thu, 19 Oct 2017 17:44:59 -0500 [thread overview]
Message-ID: <819a0c67-3494-030d-3166-748081509c83@codeaurora.org> (raw)
In-Reply-To: <CACRpkdYYp5TSM1QV-f+FmbwzY_ittgW-4MuXiZ9NW694GoMwKQ@mail.gmail.com>
On 10/07/2017 06:07 AM, Linus Walleij wrote:
> I mean that you add
> unsigned long *line_valid_mask;
> to struct gpio_chip using the same type of logic
> as .irq_valid_mask. The mask should be optional.
>
> Then the operation gpiod_get[_index]() will FAIL if the
> line is not valid.
>
> There is no need to check on every operation, there should
> be no way to get a handle on the pin any other way.
>
> All new code should be using descriptors at this point so we
> only need to design for that case.
I think I'm missing something, because I implemented what you're asking
for, but whenever I try to expose a GPIO from sysfs (e.g. echo 37 >
/sys/class/gpio/export), gpiod_get_index() is not called. The only
thing preventing the GPIO from being exported is the ->request callback:
static int msm_gpio_request(struct gpio_chip *chip, unsigned int offset)
{
struct msm_pinctrl *pctrl = gpiochip_get_data(chip);
const struct msm_pingroup *g = &pctrl->soc->groups[offset];
if (!g->npins)
return -ENODEV;
What operation is supposed to trigger a call to gpiod_get_index?
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2017-10-19 22:45 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-07 15:33 [PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs Timur Tabi
2017-09-07 15:33 ` Timur Tabi
2017-09-07 15:33 ` [PATCH 1/2] [v5] pinctrl: qcom: disable GPIO groups with no pins Timur Tabi
2017-09-07 15:33 ` Timur Tabi
2017-10-02 17:44 ` Bjorn Andersson
2017-10-02 17:44 ` Bjorn Andersson
2017-10-02 20:47 ` Timur Tabi
2017-10-02 20:47 ` Timur Tabi
2017-10-07 11:07 ` Linus Walleij
2017-10-07 11:07 ` Linus Walleij
2017-10-13 23:35 ` Timur Tabi
2017-10-13 23:35 ` Timur Tabi
2017-10-19 22:44 ` Timur Tabi [this message]
2017-10-19 22:44 ` Timur Tabi
2017-10-16 8:01 ` Thierry Reding
2017-10-16 8:01 ` Thierry Reding
2017-10-16 13:52 ` Timur Tabi
2017-10-16 13:52 ` Timur Tabi
2017-09-07 15:33 ` [PATCH 2/2] [v3] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002 Timur Tabi
2017-09-07 15:33 ` Timur Tabi
2017-09-08 12:50 ` [PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs Linus Walleij
2017-09-08 12:50 ` Linus Walleij
2017-09-13 17:09 ` Timur Tabi
2017-09-13 17:09 ` Timur Tabi
2017-09-19 7:04 ` Stephen Boyd
2017-09-19 7:04 ` Stephen Boyd
2017-09-19 8:15 ` Linus Walleij
2017-09-19 8:15 ` Linus Walleij
2017-09-19 12:32 ` Timur Tabi
2017-09-19 12:32 ` Timur Tabi
2017-09-20 11:43 ` Linus Walleij
2017-09-20 11:43 ` Linus Walleij
2017-09-20 13:04 ` Timur Tabi
2017-09-20 13:04 ` Timur Tabi
2017-09-21 12:08 ` Linus Walleij
2017-09-21 12:08 ` Linus Walleij
2017-09-21 12:12 ` Timur Tabi
2017-09-21 12:12 ` Timur Tabi
2017-09-22 13:29 ` Linus Walleij
2017-09-22 13:29 ` Linus Walleij
2017-09-22 13:37 ` Timur Tabi
2017-09-22 13:37 ` Timur Tabi
2017-10-03 22:03 ` Stephen Boyd
2017-10-03 22:03 ` Stephen Boyd
2017-10-03 22:12 ` Timur Tabi
2017-10-03 22:12 ` Timur Tabi
2017-10-04 21:50 ` Stephen Boyd
2017-10-04 21:50 ` Stephen Boyd
2017-10-04 22:41 ` Timur Tabi
2017-10-04 22:41 ` Timur Tabi
2017-10-05 21:30 ` Stephen Boyd
2017-10-05 21:30 ` Stephen Boyd
2017-10-11 7:51 ` Linus Walleij
2017-10-11 7:51 ` Linus Walleij
2017-10-12 7:39 ` Stephen Boyd
2017-10-12 7:39 ` Stephen Boyd
2017-10-14 22:43 ` Linus Walleij
2017-10-14 22:43 ` Linus Walleij
2017-10-16 13:42 ` Timur Tabi
2017-10-16 13:42 ` Timur Tabi
2017-10-13 23:26 ` Timur Tabi
2017-10-13 23:26 ` Timur Tabi
2017-10-15 20:18 ` Thierry Reding
2017-10-15 20:18 ` Thierry Reding
2017-10-15 21:09 ` Timur Tabi
2017-10-15 21:09 ` Timur Tabi
2017-10-02 16:02 ` Timur Tabi
2017-10-02 16:02 ` Timur Tabi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=819a0c67-3494-030d-3166-748081509c83@codeaurora.org \
--to=timur@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=anjiandi@codeaurora.org \
--cc=bjorn.andersson@linaro.org \
--cc=david.brown@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.