From: Peter Oh <peter.oh@eero.com>
To: Adrian Chadd <adrian@freebsd.org>
Cc: Zhi Chen <zhichen@codeaurora.org>,
ath10k <ath10k@lists.infradead.org>,
linux-wireless@vger.kernel.org
Subject: Re: [PATCH RFC] Revert "ath10k: fix DMA related firmware crashes on multiple devices"
Date: Tue, 29 Oct 2019 23:04:32 -0700 [thread overview]
Message-ID: <8211c499-ec34-d1de-221e-e037e1fd0332@eero.com> (raw)
In-Reply-To: <CAJ-VmonXbUQ=Gv9fBbpN+ez25c3Pz+xxLoL67etMdC0Q+bwyXg@mail.gmail.com>
On 10/22/19 11:24 AM, Adrian Chadd wrote:
> On Tue, 22 Oct 2019 at 10:17, Peter Oh <peter.oh@eero.com> wrote:
>>
>> On 10/22/19 1:57 AM, Zhi Chen wrote:
>>> This reverts commit 76d164f582150fd0259ec0fcbc485470bcd8033e.
>>> PCIe hung issue was observed on multiple platforms. The issue was reproduced
>>> when DUT was configured as AP and associated with 50+ STAs.
>>>
>>> With PCIe protocol analyzer, we can see DMA Read crossing 4KB boundary when
>>> issue happened. It broke PCIe spec and caused PCIe stuck.
Can you elaborate how 64 bytes DMA size breaks PCIe spec?
>> How can you say value 0 (I believe it's 64 bytes) DMA burst size causes
>> the symptom and 1 fixes it?
>
> +1 to this question.
>
> Also, shouldn't the DMA engine be doing what the firmware says? Is the
> firmware/copy engine actually somehow bursting / prefetching across a
> 4K page boundary?
>
> Surely this is something that can be fixed in software/firmware by
> correctly configuring up buffer size/offsets?
>
>
>
> -adrian
WARNING: multiple messages have this Message-ID (diff)
From: Peter Oh <peter.oh@eero.com>
To: Adrian Chadd <adrian@freebsd.org>
Cc: Zhi Chen <zhichen@codeaurora.org>,
linux-wireless@vger.kernel.org,
ath10k <ath10k@lists.infradead.org>
Subject: Re: [PATCH RFC] Revert "ath10k: fix DMA related firmware crashes on multiple devices"
Date: Tue, 29 Oct 2019 23:04:32 -0700 [thread overview]
Message-ID: <8211c499-ec34-d1de-221e-e037e1fd0332@eero.com> (raw)
In-Reply-To: <CAJ-VmonXbUQ=Gv9fBbpN+ez25c3Pz+xxLoL67etMdC0Q+bwyXg@mail.gmail.com>
On 10/22/19 11:24 AM, Adrian Chadd wrote:
> On Tue, 22 Oct 2019 at 10:17, Peter Oh <peter.oh@eero.com> wrote:
>>
>> On 10/22/19 1:57 AM, Zhi Chen wrote:
>>> This reverts commit 76d164f582150fd0259ec0fcbc485470bcd8033e.
>>> PCIe hung issue was observed on multiple platforms. The issue was reproduced
>>> when DUT was configured as AP and associated with 50+ STAs.
>>>
>>> With PCIe protocol analyzer, we can see DMA Read crossing 4KB boundary when
>>> issue happened. It broke PCIe spec and caused PCIe stuck.
Can you elaborate how 64 bytes DMA size breaks PCIe spec?
>> How can you say value 0 (I believe it's 64 bytes) DMA burst size causes
>> the symptom and 1 fixes it?
>
> +1 to this question.
>
> Also, shouldn't the DMA engine be doing what the firmware says? Is the
> firmware/copy engine actually somehow bursting / prefetching across a
> 4K page boundary?
>
> Surely this is something that can be fixed in software/firmware by
> correctly configuring up buffer size/offsets?
>
>
>
> -adrian
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next prev parent reply other threads:[~2019-10-30 6:04 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-22 8:57 [PATCH RFC] Revert "ath10k: fix DMA related firmware crashes on multiple devices" Zhi Chen
2019-10-22 8:57 ` Zhi Chen
2019-10-22 10:07 ` Tom Psyborg
2019-10-22 10:07 ` Tom Psyborg
2019-10-30 2:44 ` zhichen
2019-10-30 2:44 ` zhichen
2019-11-06 10:01 ` Tom Psyborg
2019-11-06 10:01 ` Tom Psyborg
2019-11-07 5:35 ` zhichen
2019-11-07 5:35 ` zhichen
2019-10-22 17:16 ` Peter Oh
2019-10-22 17:16 ` Peter Oh
2019-10-22 18:24 ` Adrian Chadd
2019-10-22 18:24 ` Adrian Chadd
2019-10-30 6:04 ` Peter Oh [this message]
2019-10-30 6:04 ` Peter Oh
2019-10-30 6:28 ` zhichen
2019-10-30 6:28 ` zhichen
2019-10-30 6:16 ` zhichen
2019-10-30 6:16 ` zhichen
2019-10-30 23:01 ` Peter Oh
2019-10-30 23:01 ` Peter Oh
2019-11-03 15:36 ` Tom Psyborg
2019-11-03 15:36 ` Tom Psyborg
2019-11-04 18:41 ` Peter Oh
2019-11-04 18:41 ` Peter Oh
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