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From: Matthias Brugger <matthias.bgg@gmail.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
	Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: Will Deacon <will@kernel.org>, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	iommu@lists.linux-foundation.org, youlin.pei@mediatek.com,
	Nicolas Boichat <drinkcat@chromium.org>,
	anan.sun@mediatek.com, cui.zhang@mediatek.com,
	chao.hao@mediatek.com, ming-fan.chen@mediatek.com
Subject: Re: [PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file
Date: Sun, 12 Jul 2020 20:06:17 +0200	[thread overview]
Message-ID: <9e21288c-07da-88b0-2dbb-bd9a2a4d529b@gmail.com> (raw)
In-Reply-To: <20200711064846.16007-2-yong.wu@mediatek.com>



On 11/07/2020 08:48, Yong Wu wrote:
> Put all the macros about smi larb/port togethers, this is a preparing
> patch for extending LARB_NR and adding new dom-id support.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>   include/dt-bindings/memory/mt2712-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt6779-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8173-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8183-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mtk-smi-larb-port.h | 15 +++++++++++++++
>   5 files changed, 19 insertions(+), 4 deletions(-)
>   create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h
> 
> diff --git a/include/dt-bindings/memory/mt2712-larb-port.h b/include/dt-bindings/memory/mt2712-larb-port.h
> index 6f9aa7349cef..b6b2c6bf4459 100644
> --- a/include/dt-bindings/memory/mt2712-larb-port.h
> +++ b/include/dt-bindings/memory/mt2712-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT2712_H
>   #define __DTS_IOMMU_PORT_MT2712_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt6779-larb-port.h b/include/dt-bindings/memory/mt6779-larb-port.h
> index 2ad0899fbf2f..60f57f54393e 100644
> --- a/include/dt-bindings/memory/mt6779-larb-port.h
> +++ b/include/dt-bindings/memory/mt6779-larb-port.h
> @@ -7,7 +7,7 @@
>   #ifndef _DTS_IOMMU_PORT_MT6779_H_
>   #define _DTS_IOMMU_PORT_MT6779_H_
>   
> -#define MTK_M4U_ID(larb, port)		 (((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			 0
>   #define M4U_LARB1_ID			 1
> diff --git a/include/dt-bindings/memory/mt8173-larb-port.h b/include/dt-bindings/memory/mt8173-larb-port.h
> index 9f31ccfeca21..d8c99c946053 100644
> --- a/include/dt-bindings/memory/mt8173-larb-port.h
> +++ b/include/dt-bindings/memory/mt8173-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8173_H
>   #define __DTS_IOMMU_PORT_MT8173_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt8183-larb-port.h b/include/dt-bindings/memory/mt8183-larb-port.h
> index 2c579f305162..275c095a6fd6 100644
> --- a/include/dt-bindings/memory/mt8183-larb-port.h
> +++ b/include/dt-bindings/memory/mt8183-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8183_H
>   #define __DTS_IOMMU_PORT_MT8183_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h b/include/dt-bindings/memory/mtk-smi-larb-port.h
> new file mode 100644
> index 000000000000..2ec7fe5ce4e9
> --- /dev/null
> +++ b/include/dt-bindings/memory/mtk-smi-larb-port.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2020 MediaTek Inc.
> + * Author: Yong Wu <yong.wu@mediatek.com>
> + */
> +#ifndef __DTS_MTK_IOMMU_PORT_H_
> +#define __DTS_MTK_IOMMU_PORT_H_
> +
> +#define MTK_LARB_NR_MAX			16

include/soc/mediatek/smi.h has the very same define.
Should smi.h include this file?

Regards,
Matthias

> +
> +#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#define MTK_M4U_TO_LARB(id)		(((id) >> 5) & 0xf)
> +#define MTK_M4U_TO_PORT(id)		((id) & 0x1f)
> +
> +#endif
> 

WARNING: multiple messages have this Message-ID (diff)
From: Matthias Brugger <matthias.bgg@gmail.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
	Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
	chao.hao@mediatek.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, ming-fan.chen@mediatek.com,
	anan.sun@mediatek.com, Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file
Date: Sun, 12 Jul 2020 20:06:17 +0200	[thread overview]
Message-ID: <9e21288c-07da-88b0-2dbb-bd9a2a4d529b@gmail.com> (raw)
In-Reply-To: <20200711064846.16007-2-yong.wu@mediatek.com>



On 11/07/2020 08:48, Yong Wu wrote:
> Put all the macros about smi larb/port togethers, this is a preparing
> patch for extending LARB_NR and adding new dom-id support.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>   include/dt-bindings/memory/mt2712-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt6779-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8173-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8183-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mtk-smi-larb-port.h | 15 +++++++++++++++
>   5 files changed, 19 insertions(+), 4 deletions(-)
>   create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h
> 
> diff --git a/include/dt-bindings/memory/mt2712-larb-port.h b/include/dt-bindings/memory/mt2712-larb-port.h
> index 6f9aa7349cef..b6b2c6bf4459 100644
> --- a/include/dt-bindings/memory/mt2712-larb-port.h
> +++ b/include/dt-bindings/memory/mt2712-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT2712_H
>   #define __DTS_IOMMU_PORT_MT2712_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt6779-larb-port.h b/include/dt-bindings/memory/mt6779-larb-port.h
> index 2ad0899fbf2f..60f57f54393e 100644
> --- a/include/dt-bindings/memory/mt6779-larb-port.h
> +++ b/include/dt-bindings/memory/mt6779-larb-port.h
> @@ -7,7 +7,7 @@
>   #ifndef _DTS_IOMMU_PORT_MT6779_H_
>   #define _DTS_IOMMU_PORT_MT6779_H_
>   
> -#define MTK_M4U_ID(larb, port)		 (((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			 0
>   #define M4U_LARB1_ID			 1
> diff --git a/include/dt-bindings/memory/mt8173-larb-port.h b/include/dt-bindings/memory/mt8173-larb-port.h
> index 9f31ccfeca21..d8c99c946053 100644
> --- a/include/dt-bindings/memory/mt8173-larb-port.h
> +++ b/include/dt-bindings/memory/mt8173-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8173_H
>   #define __DTS_IOMMU_PORT_MT8173_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt8183-larb-port.h b/include/dt-bindings/memory/mt8183-larb-port.h
> index 2c579f305162..275c095a6fd6 100644
> --- a/include/dt-bindings/memory/mt8183-larb-port.h
> +++ b/include/dt-bindings/memory/mt8183-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8183_H
>   #define __DTS_IOMMU_PORT_MT8183_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h b/include/dt-bindings/memory/mtk-smi-larb-port.h
> new file mode 100644
> index 000000000000..2ec7fe5ce4e9
> --- /dev/null
> +++ b/include/dt-bindings/memory/mtk-smi-larb-port.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2020 MediaTek Inc.
> + * Author: Yong Wu <yong.wu@mediatek.com>
> + */
> +#ifndef __DTS_MTK_IOMMU_PORT_H_
> +#define __DTS_MTK_IOMMU_PORT_H_
> +
> +#define MTK_LARB_NR_MAX			16

include/soc/mediatek/smi.h has the very same define.
Should smi.h include this file?

Regards,
Matthias

> +
> +#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#define MTK_M4U_TO_LARB(id)		(((id) >> 5) & 0xf)
> +#define MTK_M4U_TO_PORT(id)		((id) & 0x1f)
> +
> +#endif
> 
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Matthias Brugger <matthias.bgg@gmail.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
	Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
	chao.hao@mediatek.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, ming-fan.chen@mediatek.com,
	anan.sun@mediatek.com, Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file
Date: Sun, 12 Jul 2020 20:06:17 +0200	[thread overview]
Message-ID: <9e21288c-07da-88b0-2dbb-bd9a2a4d529b@gmail.com> (raw)
In-Reply-To: <20200711064846.16007-2-yong.wu@mediatek.com>



On 11/07/2020 08:48, Yong Wu wrote:
> Put all the macros about smi larb/port togethers, this is a preparing
> patch for extending LARB_NR and adding new dom-id support.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>   include/dt-bindings/memory/mt2712-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt6779-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8173-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8183-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mtk-smi-larb-port.h | 15 +++++++++++++++
>   5 files changed, 19 insertions(+), 4 deletions(-)
>   create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h
> 
> diff --git a/include/dt-bindings/memory/mt2712-larb-port.h b/include/dt-bindings/memory/mt2712-larb-port.h
> index 6f9aa7349cef..b6b2c6bf4459 100644
> --- a/include/dt-bindings/memory/mt2712-larb-port.h
> +++ b/include/dt-bindings/memory/mt2712-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT2712_H
>   #define __DTS_IOMMU_PORT_MT2712_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt6779-larb-port.h b/include/dt-bindings/memory/mt6779-larb-port.h
> index 2ad0899fbf2f..60f57f54393e 100644
> --- a/include/dt-bindings/memory/mt6779-larb-port.h
> +++ b/include/dt-bindings/memory/mt6779-larb-port.h
> @@ -7,7 +7,7 @@
>   #ifndef _DTS_IOMMU_PORT_MT6779_H_
>   #define _DTS_IOMMU_PORT_MT6779_H_
>   
> -#define MTK_M4U_ID(larb, port)		 (((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			 0
>   #define M4U_LARB1_ID			 1
> diff --git a/include/dt-bindings/memory/mt8173-larb-port.h b/include/dt-bindings/memory/mt8173-larb-port.h
> index 9f31ccfeca21..d8c99c946053 100644
> --- a/include/dt-bindings/memory/mt8173-larb-port.h
> +++ b/include/dt-bindings/memory/mt8173-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8173_H
>   #define __DTS_IOMMU_PORT_MT8173_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt8183-larb-port.h b/include/dt-bindings/memory/mt8183-larb-port.h
> index 2c579f305162..275c095a6fd6 100644
> --- a/include/dt-bindings/memory/mt8183-larb-port.h
> +++ b/include/dt-bindings/memory/mt8183-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8183_H
>   #define __DTS_IOMMU_PORT_MT8183_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h b/include/dt-bindings/memory/mtk-smi-larb-port.h
> new file mode 100644
> index 000000000000..2ec7fe5ce4e9
> --- /dev/null
> +++ b/include/dt-bindings/memory/mtk-smi-larb-port.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2020 MediaTek Inc.
> + * Author: Yong Wu <yong.wu@mediatek.com>
> + */
> +#ifndef __DTS_MTK_IOMMU_PORT_H_
> +#define __DTS_MTK_IOMMU_PORT_H_
> +
> +#define MTK_LARB_NR_MAX			16

include/soc/mediatek/smi.h has the very same define.
Should smi.h include this file?

Regards,
Matthias

> +
> +#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#define MTK_M4U_TO_LARB(id)		(((id) >> 5) & 0xf)
> +#define MTK_M4U_TO_PORT(id)		((id) & 0x1f)
> +
> +#endif
> 

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Matthias Brugger <matthias.bgg@gmail.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
	Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
	chao.hao@mediatek.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, ming-fan.chen@mediatek.com,
	anan.sun@mediatek.com, Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file
Date: Sun, 12 Jul 2020 20:06:17 +0200	[thread overview]
Message-ID: <9e21288c-07da-88b0-2dbb-bd9a2a4d529b@gmail.com> (raw)
In-Reply-To: <20200711064846.16007-2-yong.wu@mediatek.com>



On 11/07/2020 08:48, Yong Wu wrote:
> Put all the macros about smi larb/port togethers, this is a preparing
> patch for extending LARB_NR and adding new dom-id support.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>   include/dt-bindings/memory/mt2712-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt6779-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8173-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mt8183-larb-port.h  |  2 +-
>   include/dt-bindings/memory/mtk-smi-larb-port.h | 15 +++++++++++++++
>   5 files changed, 19 insertions(+), 4 deletions(-)
>   create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h
> 
> diff --git a/include/dt-bindings/memory/mt2712-larb-port.h b/include/dt-bindings/memory/mt2712-larb-port.h
> index 6f9aa7349cef..b6b2c6bf4459 100644
> --- a/include/dt-bindings/memory/mt2712-larb-port.h
> +++ b/include/dt-bindings/memory/mt2712-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT2712_H
>   #define __DTS_IOMMU_PORT_MT2712_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt6779-larb-port.h b/include/dt-bindings/memory/mt6779-larb-port.h
> index 2ad0899fbf2f..60f57f54393e 100644
> --- a/include/dt-bindings/memory/mt6779-larb-port.h
> +++ b/include/dt-bindings/memory/mt6779-larb-port.h
> @@ -7,7 +7,7 @@
>   #ifndef _DTS_IOMMU_PORT_MT6779_H_
>   #define _DTS_IOMMU_PORT_MT6779_H_
>   
> -#define MTK_M4U_ID(larb, port)		 (((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			 0
>   #define M4U_LARB1_ID			 1
> diff --git a/include/dt-bindings/memory/mt8173-larb-port.h b/include/dt-bindings/memory/mt8173-larb-port.h
> index 9f31ccfeca21..d8c99c946053 100644
> --- a/include/dt-bindings/memory/mt8173-larb-port.h
> +++ b/include/dt-bindings/memory/mt8173-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8173_H
>   #define __DTS_IOMMU_PORT_MT8173_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mt8183-larb-port.h b/include/dt-bindings/memory/mt8183-larb-port.h
> index 2c579f305162..275c095a6fd6 100644
> --- a/include/dt-bindings/memory/mt8183-larb-port.h
> +++ b/include/dt-bindings/memory/mt8183-larb-port.h
> @@ -6,7 +6,7 @@
>   #ifndef __DTS_IOMMU_PORT_MT8183_H
>   #define __DTS_IOMMU_PORT_MT8183_H
>   
> -#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#include <dt-bindings/memory/mtk-smi-larb-port.h>
>   
>   #define M4U_LARB0_ID			0
>   #define M4U_LARB1_ID			1
> diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h b/include/dt-bindings/memory/mtk-smi-larb-port.h
> new file mode 100644
> index 000000000000..2ec7fe5ce4e9
> --- /dev/null
> +++ b/include/dt-bindings/memory/mtk-smi-larb-port.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2020 MediaTek Inc.
> + * Author: Yong Wu <yong.wu@mediatek.com>
> + */
> +#ifndef __DTS_MTK_IOMMU_PORT_H_
> +#define __DTS_MTK_IOMMU_PORT_H_
> +
> +#define MTK_LARB_NR_MAX			16

include/soc/mediatek/smi.h has the very same define.
Should smi.h include this file?

Regards,
Matthias

> +
> +#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))
> +#define MTK_M4U_TO_LARB(id)		(((id) >> 5) & 0xf)
> +#define MTK_M4U_TO_PORT(id)		((id) & 0x1f)
> +
> +#endif
> 

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  reply	other threads:[~2020-07-12 18:06 UTC|newest]

Thread overview: 167+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-11  6:48 [PATCH 00/21] MT8192 IOMMU support Yong Wu
2020-07-11  6:48 ` Yong Wu
2020-07-11  6:48 ` Yong Wu
2020-07-11  6:48 ` Yong Wu
2020-07-11  6:48 ` [PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-12 18:06   ` Matthias Brugger [this message]
2020-07-12 18:06     ` Matthias Brugger
2020-07-12 18:06     ` Matthias Brugger
2020-07-12 18:06     ` Matthias Brugger
2020-07-13  5:43     ` Pi-Hsun Shih
2020-07-13  5:43       ` Pi-Hsun Shih
2020-07-13  5:43       ` Pi-Hsun Shih
2020-07-13  5:43       ` Pi-Hsun Shih
2020-07-13  6:28       ` Yong Wu
2020-07-13  6:28         ` Yong Wu
2020-07-13  6:28         ` Yong Wu
2020-07-13  6:28         ` Yong Wu
2020-07-13  6:27     ` [SPAM]Re: " Yong Wu
2020-07-13  6:27       ` Yong Wu
2020-07-13  6:27       ` Yong Wu
2020-07-20 22:58   ` Rob Herring
2020-07-20 22:58     ` Rob Herring
2020-07-20 22:58     ` Rob Herring
2020-07-20 22:58     ` Rob Herring
2020-07-11  6:48 ` [PATCH 02/21] dt-binding: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-20 22:59   ` Rob Herring
2020-07-20 22:59     ` Rob Herring
2020-07-20 22:59     ` Rob Herring
2020-07-20 22:59     ` Rob Herring
2020-07-11  6:48 ` [PATCH 03/21] dt-binding: memory: mediatek: Add domain definition Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-13  5:36   ` Pi-Hsun Shih
2020-07-13  5:36     ` Pi-Hsun Shih
2020-07-13  5:36     ` Pi-Hsun Shih
2020-07-13  5:36     ` Pi-Hsun Shih
2020-07-13  6:54     ` Yong Wu
2020-07-13  6:54       ` Yong Wu
2020-07-13  6:54       ` Yong Wu
2020-07-13  6:54       ` Yong Wu
2020-07-20 23:16   ` Rob Herring
2020-07-20 23:16     ` Rob Herring
2020-07-20 23:16     ` Rob Herring
2020-07-20 23:16     ` Rob Herring
2020-07-21  3:27     ` Yong Wu
2020-07-21  3:27       ` Yong Wu
2020-07-21  3:27       ` Yong Wu
2020-07-21  3:27       ` Yong Wu
2020-07-11  6:48 ` [PATCH 05/21] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 06/21] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-13  0:38   ` Nicolas Boichat
2020-07-13  0:38     ` Nicolas Boichat
2020-07-13  0:38     ` Nicolas Boichat
2020-07-13  0:38     ` Nicolas Boichat
2020-07-13  6:52     ` Yong Wu
2020-07-13  6:52       ` Yong Wu
2020-07-13  6:52       ` Yong Wu
2020-07-13  6:52       ` Yong Wu
2020-07-11  6:48 ` [PATCH 07/21] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 08/21] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 09/21] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 10/21] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 11/21] iommu/mediatek: Add power-domain operation Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-13  7:03   ` Pi-Hsun Shih
2020-07-13  7:03     ` Pi-Hsun Shih
2020-07-13  7:03     ` Pi-Hsun Shih
2020-07-13  7:03     ` Pi-Hsun Shih
2020-07-14  9:33     ` Yong Wu
2020-07-14  9:33       ` Yong Wu
2020-07-14  9:33       ` Yong Wu
2020-07-14  9:33       ` Yong Wu
2020-07-27  8:49   ` chao hao
2020-07-27  8:49     ` chao hao
2020-07-27  8:49     ` chao hao
2020-07-27  8:49     ` chao hao
2020-08-07  2:13     ` Yong Wu
2020-08-07  2:13       ` Yong Wu
2020-08-07  2:13       ` Yong Wu
2020-08-07  2:13       ` Yong Wu
2020-07-11  6:48 ` [PATCH 12/21] iommu/mediatek: Add iova reserved function Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-13  7:33   ` Pi-Hsun Shih
2020-07-13  7:33     ` Pi-Hsun Shih
2020-07-13  7:33     ` Pi-Hsun Shih
2020-07-13  7:33     ` Pi-Hsun Shih
2020-07-14  9:32     ` Yong Wu
2020-07-14  9:32       ` Yong Wu
2020-07-14  9:32       ` Yong Wu
2020-07-14  9:32       ` Yong Wu
2020-07-11  6:48 ` [PATCH 13/21] iommu/mediatek: Make MTK_IOMMU depend on ARM64 Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 14/21] iommu/mediatek: Add single domain Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 15/21] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 16/21] iommu/mediatek: Support up to 34bit iova in tlb invalid Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 17/21] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 18/21] iommu/mediatek: Add support for multi domain Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-23 20:47   ` Rob Herring
2020-07-23 20:47     ` Rob Herring
2020-07-23 20:47     ` Rob Herring
2020-07-23 20:47     ` Rob Herring
2020-07-27  6:41     ` Yong Wu
2020-07-27  6:41       ` Yong Wu
2020-07-27  6:41       ` Yong Wu
2020-07-27  6:41       ` Yong Wu
2020-07-11  6:48 ` [PATCH 19/21] iommu/mediatek: Adjust the structure Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 20/21] iommu/mediatek: Add mt8192 support Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48 ` [PATCH 21/21] memory: mtk-smi: " Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu
2020-07-11  6:48   ` Yong Wu

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