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From: Fu Wei <fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Cc: Christopher Covington
	<cov-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	"Rafael J. Wysocki" <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org>,
	Len Brown <lenb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Daniel Lezcano
	<daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
	Lorenzo Pieralisi
	<lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>,
	Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>,
	Hanjun Guo <hanjun.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Linaro ACPI Mailman List
	<linaro-acpi-cunTk1MwBs8s++Sfvej+rw@public.gmane.org>,
	Linux Kernel Mailing List
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	ACPI Devel Maling List
	<linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	rruigrok-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, "Abdulhamid,
	Harb" <harba-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Timur Tabi <timur-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	G Gregory
	<graeme.gregory-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Al Stone <al.stone-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Jon Masters <jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.
Date: Thu, 26 Jan 2017 13:55:53 +0800	[thread overview]
Message-ID: <CADyBb7sL0-CW=xiHyCEv7vxGz0cjfCGSkt6-XvAOC6ZGuY3_CQ@mail.gmail.com> (raw)
In-Reply-To: <20170125173516.GA25470@leverpostej>

Hi Mark, Christopher,

On 26 January 2017 at 01:36, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> wrote:
> On Wed, Jan 25, 2017 at 10:38:01AM -0500, Christopher Covington wrote:
>> On 01/25/2017 01:46 AM, Fu Wei wrote:
>> > On 25 January 2017 at 01:24, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> wrote:
>> >> On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org wrote:
>> >>> From: Fu Wei <fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>
>> > And for CNTFRQ(in CNTCTLBase and CNTBaseN) , we can NOT access it in
>> > Linux kernel (EL1),
>> > Because ARMv8 ARM says:
>> > In a system that implements both Secure and Non-secure states, this
>> > register is only accessible by Secure accesses.
>> > That means we still need to get the frequency of the system counter
>> > from CNTFRQ_EL0 in MMIO timer code.
>> > This have been proved when I tested this driver on foundation model, I
>> > got "0" when I access CNTFRQ from Linux kernel (Non-secure EL1)
>>
>> That sounds like a firmware problem. Firmware in EL3 is supposed to write
>> the value into CNTFRQ.
>
> Definitely. FW *should* program the CNTFRQ_EL0 CPU registers and any
> MMIO CNTFRQ registers.

Many thanks for the explanation. This might be the problem. Maybe we
can check the UEFI :-)

>
>> If you're not currently using any firmware, I'd
>> recommend the bootwrapper on models/simulators/emulators.
>>
>> http://git.kernel.org/cgit/linux/kernel/git/mark/boot-wrapper-aarch64.git/tree/arch/aarch64/boot.S#n48
>
> Unfortunately, the boot-wrapper only programs the CNTFRQ_EL0 CPU system
> registers, and does not program any MMIO CNTFRQ registers.
>
> IIRC the models it was originally written for didn't have any (and we
> had no DT binding until far later...). Luckily the model DTs do not
> expose any MMIO timer addresses to the kernel currently.

But according to another document(ARMv8-A Foundation Platform User
Guide  ARM DUI0677K), Table 3-2 ARMv8-A Foundation Platform memory
map,
we may have two frames in the Generic timer block, right?


>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat
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WARNING: multiple messages have this Message-ID (diff)
From: Fu Wei <fu.wei@linaro.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Christopher Covington <cov@codeaurora.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Len Brown <lenb@kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	linux-arm-kernel@lists.infradead.org,
	Linaro ACPI Mailman List <linaro-acpi@lists.linaro.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	rruigrok@codeaurora.org, "Abdulhamid,
	Harb" <harba@codeaurora.org>, Timur Tabi <timur@codeaurora.org>,
	G Gregory <graeme.gregory@linaro.org>,
	Al Stone <al.stone@linaro.org>, Jon Masters <jcm@redhat.com>,
	Wei Huang <wei@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
	Leo Duran <leo.duran@amd.com>, Wim Van Sebroeck <wim@iguana.be>,
	Guenter Roeck <linux@roeck-us.net>,
	linux-watchdog@vger.kernel.org, Tomasz Nowicki <tn@semihalf.com>,
	Christoffer Dall <christoffer.dall@linaro.org>,
	Julien Grall <julien.grall@arm.com>
Subject: Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.
Date: Thu, 26 Jan 2017 13:55:53 +0800	[thread overview]
Message-ID: <CADyBb7sL0-CW=xiHyCEv7vxGz0cjfCGSkt6-XvAOC6ZGuY3_CQ@mail.gmail.com> (raw)
In-Reply-To: <20170125173516.GA25470@leverpostej>

Hi Mark, Christopher,

On 26 January 2017 at 01:36, Mark Rutland <mark.rutland@arm.com> wrote:
> On Wed, Jan 25, 2017 at 10:38:01AM -0500, Christopher Covington wrote:
>> On 01/25/2017 01:46 AM, Fu Wei wrote:
>> > On 25 January 2017 at 01:24, Mark Rutland <mark.rutland@arm.com> wrote:
>> >> On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu.wei@linaro.org wrote:
>> >>> From: Fu Wei <fu.wei@linaro.org>
>
>> > And for CNTFRQ(in CNTCTLBase and CNTBaseN) , we can NOT access it in
>> > Linux kernel (EL1),
>> > Because ARMv8 ARM says:
>> > In a system that implements both Secure and Non-secure states, this
>> > register is only accessible by Secure accesses.
>> > That means we still need to get the frequency of the system counter
>> > from CNTFRQ_EL0 in MMIO timer code.
>> > This have been proved when I tested this driver on foundation model, I
>> > got "0" when I access CNTFRQ from Linux kernel (Non-secure EL1)
>>
>> That sounds like a firmware problem. Firmware in EL3 is supposed to write
>> the value into CNTFRQ.
>
> Definitely. FW *should* program the CNTFRQ_EL0 CPU registers and any
> MMIO CNTFRQ registers.

Many thanks for the explanation. This might be the problem. Maybe we
can check the UEFI :-)

>
>> If you're not currently using any firmware, I'd
>> recommend the bootwrapper on models/simulators/emulators.
>>
>> http://git.kernel.org/cgit/linux/kernel/git/mark/boot-wrapper-aarch64.git/tree/arch/aarch64/boot.S#n48
>
> Unfortunately, the boot-wrapper only programs the CNTFRQ_EL0 CPU system
> registers, and does not program any MMIO CNTFRQ registers.
>
> IIRC the models it was originally written for didn't have any (and we
> had no DT binding until far later...). Luckily the model DTs do not
> expose any MMIO timer addresses to the kernel currently.

But according to another document(ARMv8-A Foundation Platform User
Guide  ARM DUI0677K), Table 3-2 ARMv8-A Foundation Platform memory
map,
we may have two frames in the Generic timer block, right?


>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

WARNING: multiple messages have this Message-ID (diff)
From: fu.wei@linaro.org (Fu Wei)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.
Date: Thu, 26 Jan 2017 13:55:53 +0800	[thread overview]
Message-ID: <CADyBb7sL0-CW=xiHyCEv7vxGz0cjfCGSkt6-XvAOC6ZGuY3_CQ@mail.gmail.com> (raw)
In-Reply-To: <20170125173516.GA25470@leverpostej>

Hi Mark, Christopher,

On 26 January 2017 at 01:36, Mark Rutland <mark.rutland@arm.com> wrote:
> On Wed, Jan 25, 2017 at 10:38:01AM -0500, Christopher Covington wrote:
>> On 01/25/2017 01:46 AM, Fu Wei wrote:
>> > On 25 January 2017 at 01:24, Mark Rutland <mark.rutland@arm.com> wrote:
>> >> On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu.wei at linaro.org wrote:
>> >>> From: Fu Wei <fu.wei@linaro.org>
>
>> > And for CNTFRQ(in CNTCTLBase and CNTBaseN) , we can NOT access it in
>> > Linux kernel (EL1),
>> > Because ARMv8 ARM says:
>> > In a system that implements both Secure and Non-secure states, this
>> > register is only accessible by Secure accesses.
>> > That means we still need to get the frequency of the system counter
>> > from CNTFRQ_EL0 in MMIO timer code.
>> > This have been proved when I tested this driver on foundation model, I
>> > got "0" when I access CNTFRQ from Linux kernel (Non-secure EL1)
>>
>> That sounds like a firmware problem. Firmware in EL3 is supposed to write
>> the value into CNTFRQ.
>
> Definitely. FW *should* program the CNTFRQ_EL0 CPU registers and any
> MMIO CNTFRQ registers.

Many thanks for the explanation. This might be the problem. Maybe we
can check the UEFI :-)

>
>> If you're not currently using any firmware, I'd
>> recommend the bootwrapper on models/simulators/emulators.
>>
>> http://git.kernel.org/cgit/linux/kernel/git/mark/boot-wrapper-aarch64.git/tree/arch/aarch64/boot.S#n48
>
> Unfortunately, the boot-wrapper only programs the CNTFRQ_EL0 CPU system
> registers, and does not program any MMIO CNTFRQ registers.
>
> IIRC the models it was originally written for didn't have any (and we
> had no DT binding until far later...). Luckily the model DTs do not
> expose any MMIO timer addresses to the kernel currently.

But according to another document(ARMv8-A Foundation Platform User
Guide  ARM DUI0677K), Table 3-2 ARMv8-A Foundation Platform memory
map,
we may have two frames in the Generic timer block, right?


>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

  reply	other threads:[~2017-01-26  5:55 UTC|newest]

Thread overview: 134+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-18 13:25 [PATCH v20 00/17] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer fu.wei
2017-01-18 13:25 ` fu.wei at linaro.org
2017-01-18 13:25 ` [PATCH v20 01/17] clocksource/drivers/arm_arch_timer: Improve printk relevant code fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25 ` [PATCH v20 02/17] clocksource/drivers/arm_arch_timer: Rename the timer type macros fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 03/17] clocksource/drivers/arm_arch_timer: Rename the PPI enum and its values fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25 ` [PATCH v20 04/17] clocksource/drivers/arm_arch_timer: Move enums and defines to header file fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 05/17] clocksource/drivers/arm_arch_timer: Add a new enum for spi type fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 06/17] clocksource/drivers/arm_arch_timer: rework PPI determination fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 07/17] clocksource/drivers/arm_arch_timer: Separate out device-tree code from arch_timer_detect_rate fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
     [not found]   ` <20170118132541.8989-9-fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-01-19  8:02     ` Hanjun Guo
2017-01-19  8:02       ` Hanjun Guo
2017-01-19  8:02       ` Hanjun Guo
     [not found]       ` <cafa8c7a-9c7c-51ba-5566-0cfe1fe6f764-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-01-19  9:44         ` Fu Wei
2017-01-19  9:44           ` Fu Wei
2017-01-19  9:44           ` Fu Wei
2017-01-19 12:41           ` Hanjun Guo
2017-01-19 12:41             ` Hanjun Guo
2017-01-19 12:41             ` Hanjun Guo
2017-01-19 12:41             ` Hanjun Guo
2017-01-24 17:24   ` Mark Rutland
2017-01-24 17:24     ` Mark Rutland
2017-01-25  6:46     ` Fu Wei
2017-01-25  6:46       ` Fu Wei
2017-01-25  6:46       ` Fu Wei
2017-01-25  7:23       ` Fu Wei
2017-01-25  7:23         ` Fu Wei
2017-01-25  7:23         ` Fu Wei
2017-01-25 15:38       ` Christopher Covington
2017-01-25 15:38         ` Christopher Covington
2017-01-25 15:38         ` Christopher Covington
2017-01-25 17:36         ` Mark Rutland
2017-01-25 17:36           ` Mark Rutland
2017-01-25 17:36           ` Mark Rutland
2017-01-26  5:55           ` Fu Wei [this message]
2017-01-26  5:55             ` Fu Wei
2017-01-26  5:55             ` Fu Wei
2017-01-25 17:25       ` Mark Rutland
2017-01-25 17:25         ` Mark Rutland
2017-01-25 17:25         ` Mark Rutland
2017-01-26  5:49         ` Fu Wei
2017-01-26  5:49           ` Fu Wei
2017-01-26  5:49           ` Fu Wei
2017-01-30 17:49           ` Mark Rutland
2017-01-30 17:49             ` Mark Rutland
2017-01-30 17:49             ` Mark Rutland
2017-01-31 11:42             ` Mark Rutland
2017-01-31 11:42               ` Mark Rutland
2017-01-31 11:42               ` Mark Rutland
2017-01-31 18:43             ` Fu Wei
2017-01-31 18:43               ` Fu Wei
2017-01-31 18:43               ` Fu Wei
2017-01-31 18:49               ` Mark Rutland
2017-01-31 18:49                 ` Mark Rutland
2017-01-31 18:49                 ` Mark Rutland
2017-01-31 19:07                 ` Fu Wei
2017-01-31 19:07                   ` Fu Wei
2017-01-31 19:07                   ` Fu Wei
2017-01-18 13:25 ` [PATCH v20 09/17] clocksource/drivers/arm_arch_timer: Refactor arch_timer_needs_probing fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 10/17] clocksource/drivers/arm_arch_timer: Move arch_timer_needs_of_probing into DT init call fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 11/17] clocksource/drivers/arm_arch_timer: Introduce some new structs to prepare for GTDT fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-19  8:28   ` Hanjun Guo
2017-01-19  8:28     ` Hanjun Guo
2017-01-19  9:47     ` Fu Wei
2017-01-19  9:47       ` Fu Wei
2017-01-19  9:47       ` Fu Wei
2017-01-18 13:25 ` [PATCH v20 12/17] clocksource/drivers/arm_arch_timer: Refactor MMIO timer probing fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 13/17] acpi/arm64: Add GTDT table parse driver fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-19  9:11   ` Hanjun Guo
2017-01-19  9:11     ` Hanjun Guo
     [not found]     ` <e69d80d1-0954-b1be-817e-c0be6fc24b77-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-01-19 10:32       ` Fu Wei
2017-01-19 10:32         ` Fu Wei
2017-01-19 10:32         ` Fu Wei
2017-01-19 11:16         ` Mark Rutland
2017-01-19 11:16           ` Mark Rutland
2017-01-19 11:16           ` Mark Rutland
2017-01-19 12:28           ` Fu Wei
2017-01-19 12:28             ` Fu Wei
2017-01-19 12:28             ` Fu Wei
2017-01-18 13:25 ` [PATCH v20 14/17] clocksource/drivers/arm_arch_timer: Simplify ACPI support code fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 15/17] acpi/arm64: Add memory-mapped timer support in GTDT driver fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25 ` [PATCH v20 16/17] clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
     [not found]   ` <20170118132541.8989-17-fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-01-19  9:16     ` Hanjun Guo
2017-01-19  9:16       ` Hanjun Guo
2017-01-19  9:16       ` Hanjun Guo
2017-01-19 10:02       ` Fu Wei
2017-01-19 10:02         ` Fu Wei
2017-01-19 10:02         ` Fu Wei
2017-01-19 12:42         ` Hanjun Guo
2017-01-19 12:42           ` Hanjun Guo
2017-01-19 12:42           ` Hanjun Guo
2017-01-18 13:25 ` [PATCH v20 17/17] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver fu.wei
2017-01-18 13:25   ` fu.wei at linaro.org
2017-01-18 13:25   ` fu.wei
2017-01-18 13:25   ` fu.wei
2017-01-19  9:20 ` [PATCH v20 00/17] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer Hanjun Guo
2017-01-19  9:20   ` Hanjun Guo
2017-01-19  9:20   ` Hanjun Guo
2017-01-19 11:06   ` Fu Wei
2017-01-19 11:06     ` Fu Wei
2017-01-19 11:06     ` Fu Wei
2017-01-23 18:54 ` Mark Rutland
2017-01-23 18:54   ` Mark Rutland
2017-01-24  5:11   ` Fu Wei
2017-01-24  5:11     ` Fu Wei
2017-01-24  5:11     ` Fu Wei

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