From: Chen-Yu Tsai <wens@csie.org> To: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Mike Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@codeaurora.org>, Chen-Yu Tsai <wens@csie.org>, linux-clk <linux-clk@vger.kernel.org>, Hans de Goede <hdegoede@redhat.com>, Andre Przywara <andre.przywara@arm.com>, Rob Herring <robh+dt@kernel.org>, Vishnu Patekar <vishnupatekar0510@gmail.com>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, Boris Brezillon <boris.brezillon@free-electrons.com> Subject: Re: [PATCH 06/16] clk: sunxi-ng: Add divider table clock Date: Sun, 22 May 2016 00:30:19 +0800 [thread overview] Message-ID: <CAGb2v66eMndSwAGs-Nmx6f1ct+JdQMh7JLdVa4geP2YYb4tsog@mail.gmail.com> (raw) In-Reply-To: <1462737711-10017-7-git-send-email-maxime.ripard@free-electrons.com> Hi, On Mon, May 9, 2016 at 4:01 AM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > Add support for clocks based on a divider tables. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > --- > drivers/clk/sunxi-ng/Makefile | 1 + > drivers/clk/sunxi-ng/ccu_div_table.c | 117 +++++++++++++++++++++++++++++++++++ > drivers/clk/sunxi-ng/ccu_div_table.h | 75 ++++++++++++++++++++++ > 3 files changed, 193 insertions(+) > create mode 100644 drivers/clk/sunxi-ng/ccu_div_table.c > create mode 100644 drivers/clk/sunxi-ng/ccu_div_table.h > > diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile > index aa5c411ff8ea..f20c6c8f217c 100644 > --- a/drivers/clk/sunxi-ng/Makefile > +++ b/drivers/clk/sunxi-ng/Makefile > @@ -1,6 +1,7 @@ > obj-y += ccu_common.o > obj-y += ccu_reset.o > > +obj-y += ccu_div_table.o > obj-y += ccu_fixed_factor.o > obj-y += ccu_gate.o > obj-y += ccu_mux.o > diff --git a/drivers/clk/sunxi-ng/ccu_div_table.c b/drivers/clk/sunxi-ng/ccu_div_table.c > new file mode 100644 > index 000000000000..cbfff0bd47e3 > --- /dev/null > +++ b/drivers/clk/sunxi-ng/ccu_div_table.c > @@ -0,0 +1,117 @@ > +/* > + * Copyright (C) 2016 Maxime Ripard > + * Maxime Ripard <maxime.ripard@free-electrons.com> > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + */ > + > +#include <linux/clk-provider.h> > + > +#include "ccu_div_table.h" > +#include "ccu_gate.h" > + > +static void ccu_div_table_find_best(unsigned long parent, unsigned long rate, > + struct ccu_div_table *ct, > + unsigned int *index) > +{ > + unsigned long best_rate = 0; > + unsigned int best_index = 0; > + unsigned int _index; > + > + for (_index = 0; _index <= ct->num_divs; _index++) { > + unsigned long tmp_rate = parent / ct->table[_index]; > + > + if (tmp_rate > rate) > + continue; > + > + if ((rate - tmp_rate) < (rate - best_rate)) { > + best_rate = tmp_rate; > + best_index = _index; > + } > + } > + > + *index = best_index; > +} You can drop this function and use the CCF helpers (mentioned below) instead. > + > +static void ccu_div_table_disable(struct clk_hw *hw) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + > + return ccu_gate_helper_disable(&ct->common, ct->enable); > +} > + > +static int ccu_div_table_enable(struct clk_hw *hw) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + > + return ccu_gate_helper_enable(&ct->common, ct->enable); > +} > + > +static int ccu_div_table_is_enabled(struct clk_hw *hw) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + > + return ccu_gate_helper_is_enabled(&ct->common, ct->enable); > +} > + > +static unsigned long ccu_div_table_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + unsigned long div; > + u32 reg; > + > + reg = readl(ct->common.base + ct->common.reg); > + > + div = reg >> ct->div.shift; > + div &= (1 << ct->div.width) - 1; > + > + return parent_rate / ct->table[div]; CCF provides divider_recalc_rate(). > +} > + > +static long ccu_div_table_round_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long *parent_rate) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + unsigned int index; > + > + ccu_div_table_find_best(*parent_rate, rate, > + ct, &index); > + > + return *parent_rate / ct->table[index]; CCF provides divider_round_rate(). > +} > + > +static int ccu_div_table_set_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long parent_rate) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + unsigned long flags; > + unsigned int index; > + u32 reg; > + > + ccu_div_table_find_best(parent_rate, rate, ct, &index); CCF provides divider_get_val(). > + > + spin_lock_irqsave(ct->common.lock, flags); > + > + reg = readl(ct->common.base + ct->common.reg); > + reg &= ~GENMASK(ct->div.width + ct->div.shift, ct->div.shift); > + writel(reg | ((ct->table[index]) << ct->div.shift), > + ct->common.base + ct->common.reg); > + > + spin_unlock_irqrestore(ct->common.lock, flags); > + > + return 0; > +} > + > +const struct clk_ops ccu_div_table_ops = { > + .disable = ccu_div_table_disable, > + .enable = ccu_div_table_enable, > + .is_enabled = ccu_div_table_is_enabled, > + > + .recalc_rate = ccu_div_table_recalc_rate, > + .round_rate = ccu_div_table_round_rate, > + .set_rate = ccu_div_table_set_rate, > +}; > diff --git a/drivers/clk/sunxi-ng/ccu_div_table.h b/drivers/clk/sunxi-ng/ccu_div_table.h > new file mode 100644 > index 000000000000..bd7da49087ed > --- /dev/null > +++ b/drivers/clk/sunxi-ng/ccu_div_table.h > @@ -0,0 +1,75 @@ > +/* > + * Copyright (c) 2016 Maxime Ripard. All rights reserved. > + * > + * This software is licensed under the terms of the GNU General Public > + * License version 2, as published by the Free Software Foundation, and > + * may be copied, distributed, and modified under those terms. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#ifndef _CCU_DIV_TABLE_H_ > +#define _CCU_DIV_TABLE_H_ > + > +#include <linux/clk-provider.h> > + > +#include "ccu_common.h" > +#include "ccu_factor.h" > + > +struct ccu_div_table { > + u32 enable; > + > + u8 *table; I suggest using struct clk_div_table instead, to be able to use the CCF helpers. > + int num_divs; This field won't be needed then, but you should add a divider flags field. Regards ChenYu > + > + struct ccu_factor div; > + struct ccu_common common; > +}; > + > +#define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ > + _shift, _width, \ > + _table, _flags) \ > + struct ccu_div_table _struct = { \ > + .table = _table, \ > + .num_divs = ARRAY_SIZE(_table), \ > + .div = SUNXI_CLK_FACTOR(_shift, _width), \ > + .common = { \ > + .reg = _reg, \ > + .hw.init = SUNXI_HW_INIT(_name, \ > + _parent, \ > + &ccu_div_table_ops, \ > + _flags), \ > + } \ > + } > + > +#define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ > + _shift, _width, \ > + _table, _gate, _flags) \ > + struct ccu_div_table _struct = { \ > + .enable = _gate, \ > + .table = _table, \ > + .num_divs = ARRAY_SIZE(_table), \ > + .div = SUNXI_CLK_FACTOR(_shift, _width), \ > + .common = { \ > + .reg = _reg, \ > + .features = CCU_FEATURE_GATE, \ > + .hw.init = SUNXI_HW_INIT(_name, \ > + _parent, \ > + &ccu_div_table_ops, \ > + _flags), \ > + } \ > + } > + > +static inline struct ccu_div_table *hw_to_ccu_div_table(struct clk_hw *hw) > +{ > + struct ccu_common *common = hw_to_ccu_common(hw); > + > + return container_of(common, struct ccu_div_table, common); > +} > + > +extern const struct clk_ops ccu_div_table_ops; > + > +#endif /* _CCU_DIV_H_ */ > -- > 2.8.2 >
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 06/16] clk: sunxi-ng: Add divider table clock Date: Sun, 22 May 2016 00:30:19 +0800 [thread overview] Message-ID: <CAGb2v66eMndSwAGs-Nmx6f1ct+JdQMh7JLdVa4geP2YYb4tsog@mail.gmail.com> (raw) In-Reply-To: <1462737711-10017-7-git-send-email-maxime.ripard@free-electrons.com> Hi, On Mon, May 9, 2016 at 4:01 AM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > Add support for clocks based on a divider tables. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > --- > drivers/clk/sunxi-ng/Makefile | 1 + > drivers/clk/sunxi-ng/ccu_div_table.c | 117 +++++++++++++++++++++++++++++++++++ > drivers/clk/sunxi-ng/ccu_div_table.h | 75 ++++++++++++++++++++++ > 3 files changed, 193 insertions(+) > create mode 100644 drivers/clk/sunxi-ng/ccu_div_table.c > create mode 100644 drivers/clk/sunxi-ng/ccu_div_table.h > > diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile > index aa5c411ff8ea..f20c6c8f217c 100644 > --- a/drivers/clk/sunxi-ng/Makefile > +++ b/drivers/clk/sunxi-ng/Makefile > @@ -1,6 +1,7 @@ > obj-y += ccu_common.o > obj-y += ccu_reset.o > > +obj-y += ccu_div_table.o > obj-y += ccu_fixed_factor.o > obj-y += ccu_gate.o > obj-y += ccu_mux.o > diff --git a/drivers/clk/sunxi-ng/ccu_div_table.c b/drivers/clk/sunxi-ng/ccu_div_table.c > new file mode 100644 > index 000000000000..cbfff0bd47e3 > --- /dev/null > +++ b/drivers/clk/sunxi-ng/ccu_div_table.c > @@ -0,0 +1,117 @@ > +/* > + * Copyright (C) 2016 Maxime Ripard > + * Maxime Ripard <maxime.ripard@free-electrons.com> > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + */ > + > +#include <linux/clk-provider.h> > + > +#include "ccu_div_table.h" > +#include "ccu_gate.h" > + > +static void ccu_div_table_find_best(unsigned long parent, unsigned long rate, > + struct ccu_div_table *ct, > + unsigned int *index) > +{ > + unsigned long best_rate = 0; > + unsigned int best_index = 0; > + unsigned int _index; > + > + for (_index = 0; _index <= ct->num_divs; _index++) { > + unsigned long tmp_rate = parent / ct->table[_index]; > + > + if (tmp_rate > rate) > + continue; > + > + if ((rate - tmp_rate) < (rate - best_rate)) { > + best_rate = tmp_rate; > + best_index = _index; > + } > + } > + > + *index = best_index; > +} You can drop this function and use the CCF helpers (mentioned below) instead. > + > +static void ccu_div_table_disable(struct clk_hw *hw) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + > + return ccu_gate_helper_disable(&ct->common, ct->enable); > +} > + > +static int ccu_div_table_enable(struct clk_hw *hw) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + > + return ccu_gate_helper_enable(&ct->common, ct->enable); > +} > + > +static int ccu_div_table_is_enabled(struct clk_hw *hw) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + > + return ccu_gate_helper_is_enabled(&ct->common, ct->enable); > +} > + > +static unsigned long ccu_div_table_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + unsigned long div; > + u32 reg; > + > + reg = readl(ct->common.base + ct->common.reg); > + > + div = reg >> ct->div.shift; > + div &= (1 << ct->div.width) - 1; > + > + return parent_rate / ct->table[div]; CCF provides divider_recalc_rate(). > +} > + > +static long ccu_div_table_round_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long *parent_rate) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + unsigned int index; > + > + ccu_div_table_find_best(*parent_rate, rate, > + ct, &index); > + > + return *parent_rate / ct->table[index]; CCF provides divider_round_rate(). > +} > + > +static int ccu_div_table_set_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long parent_rate) > +{ > + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); > + unsigned long flags; > + unsigned int index; > + u32 reg; > + > + ccu_div_table_find_best(parent_rate, rate, ct, &index); CCF provides divider_get_val(). > + > + spin_lock_irqsave(ct->common.lock, flags); > + > + reg = readl(ct->common.base + ct->common.reg); > + reg &= ~GENMASK(ct->div.width + ct->div.shift, ct->div.shift); > + writel(reg | ((ct->table[index]) << ct->div.shift), > + ct->common.base + ct->common.reg); > + > + spin_unlock_irqrestore(ct->common.lock, flags); > + > + return 0; > +} > + > +const struct clk_ops ccu_div_table_ops = { > + .disable = ccu_div_table_disable, > + .enable = ccu_div_table_enable, > + .is_enabled = ccu_div_table_is_enabled, > + > + .recalc_rate = ccu_div_table_recalc_rate, > + .round_rate = ccu_div_table_round_rate, > + .set_rate = ccu_div_table_set_rate, > +}; > diff --git a/drivers/clk/sunxi-ng/ccu_div_table.h b/drivers/clk/sunxi-ng/ccu_div_table.h > new file mode 100644 > index 000000000000..bd7da49087ed > --- /dev/null > +++ b/drivers/clk/sunxi-ng/ccu_div_table.h > @@ -0,0 +1,75 @@ > +/* > + * Copyright (c) 2016 Maxime Ripard. All rights reserved. > + * > + * This software is licensed under the terms of the GNU General Public > + * License version 2, as published by the Free Software Foundation, and > + * may be copied, distributed, and modified under those terms. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#ifndef _CCU_DIV_TABLE_H_ > +#define _CCU_DIV_TABLE_H_ > + > +#include <linux/clk-provider.h> > + > +#include "ccu_common.h" > +#include "ccu_factor.h" > + > +struct ccu_div_table { > + u32 enable; > + > + u8 *table; I suggest using struct clk_div_table instead, to be able to use the CCF helpers. > + int num_divs; This field won't be needed then, but you should add a divider flags field. Regards ChenYu > + > + struct ccu_factor div; > + struct ccu_common common; > +}; > + > +#define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ > + _shift, _width, \ > + _table, _flags) \ > + struct ccu_div_table _struct = { \ > + .table = _table, \ > + .num_divs = ARRAY_SIZE(_table), \ > + .div = SUNXI_CLK_FACTOR(_shift, _width), \ > + .common = { \ > + .reg = _reg, \ > + .hw.init = SUNXI_HW_INIT(_name, \ > + _parent, \ > + &ccu_div_table_ops, \ > + _flags), \ > + } \ > + } > + > +#define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ > + _shift, _width, \ > + _table, _gate, _flags) \ > + struct ccu_div_table _struct = { \ > + .enable = _gate, \ > + .table = _table, \ > + .num_divs = ARRAY_SIZE(_table), \ > + .div = SUNXI_CLK_FACTOR(_shift, _width), \ > + .common = { \ > + .reg = _reg, \ > + .features = CCU_FEATURE_GATE, \ > + .hw.init = SUNXI_HW_INIT(_name, \ > + _parent, \ > + &ccu_div_table_ops, \ > + _flags), \ > + } \ > + } > + > +static inline struct ccu_div_table *hw_to_ccu_div_table(struct clk_hw *hw) > +{ > + struct ccu_common *common = hw_to_ccu_common(hw); > + > + return container_of(common, struct ccu_div_table, common); > +} > + > +extern const struct clk_ops ccu_div_table_ops; > + > +#endif /* _CCU_DIV_H_ */ > -- > 2.8.2 >
next prev parent reply other threads:[~2016-05-21 16:30 UTC|newest] Thread overview: 128+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-08 20:01 [PATCH 00/16] clk: sunxi: introduce "modern" clock support Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 01/16] clk: fix critical clock locking Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-09 22:11 ` Stephen Boyd 2016-05-09 22:11 ` Stephen Boyd 2016-05-13 7:50 ` Maxime Ripard 2016-05-13 7:50 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 02/16] clk: sunxi-ng: Add common infrastructure Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-09 10:01 ` Chen-Yu Tsai 2016-05-09 10:01 ` Chen-Yu Tsai 2016-05-15 18:31 ` Maxime Ripard 2016-05-15 18:31 ` Maxime Ripard 2016-05-16 7:02 ` Chen-Yu Tsai 2016-05-16 7:02 ` Chen-Yu Tsai 2016-05-16 8:02 ` Jean-Francois Moine 2016-05-16 8:02 ` Jean-Francois Moine 2016-05-16 20:15 ` Maxime Ripard 2016-05-16 20:15 ` Maxime Ripard 2016-05-17 6:54 ` Jean-Francois Moine 2016-05-17 6:54 ` Jean-Francois Moine 2016-05-18 19:59 ` Maxime Ripard 2016-05-18 19:59 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 03/16] clk: sunxi-ng: Add fixed factor clock support Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-09 10:05 ` Chen-Yu Tsai 2016-05-09 10:05 ` Chen-Yu Tsai 2016-05-16 13:15 ` Jean-Francois Moine 2016-05-16 13:15 ` Jean-Francois Moine 2016-05-16 21:08 ` Maxime Ripard 2016-05-16 21:08 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 04/16] clk: sunxi-ng: Add gate " Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 05/16] clk: sunxi-ng: Add mux " Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-21 16:18 ` Chen-Yu Tsai 2016-05-21 16:18 ` Chen-Yu Tsai 2016-05-22 19:20 ` Maxime Ripard 2016-05-22 19:20 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 06/16] clk: sunxi-ng: Add divider table clock Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-21 16:30 ` Chen-Yu Tsai [this message] 2016-05-21 16:30 ` Chen-Yu Tsai 2016-05-08 20:01 ` [PATCH 07/16] clk: sunxi-ng: Add phase clock support Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-21 16:43 ` Chen-Yu Tsai 2016-05-21 16:43 ` Chen-Yu Tsai 2016-05-23 17:01 ` Maxime Ripard 2016-05-23 17:01 ` Maxime Ripard 2016-05-24 9:01 ` Chen-Yu Tsai 2016-05-24 9:01 ` Chen-Yu Tsai 2016-05-08 20:01 ` [PATCH 08/16] clk: sunxi-ng: Add M-factor " Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-11 6:46 ` Jean-Francois Moine 2016-05-11 6:46 ` Jean-Francois Moine 2016-05-15 18:51 ` Maxime Ripard 2016-05-15 18:51 ` Maxime Ripard 2016-05-21 17:09 ` Chen-Yu Tsai 2016-05-21 17:09 ` Chen-Yu Tsai 2016-05-22 19:22 ` Maxime Ripard 2016-05-22 19:22 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 09/16] clk: sunxi-ng: Add P-factor " Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 10/16] clk: sunxi-ng: Add M-P factor " Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-23 13:45 ` Chen-Yu Tsai 2016-05-23 13:45 ` Chen-Yu Tsai 2016-05-23 17:18 ` Maxime Ripard 2016-05-23 17:18 ` Maxime Ripard 2016-05-24 4:14 ` Chen-Yu Tsai 2016-05-24 4:14 ` Chen-Yu Tsai 2016-05-24 21:07 ` Maxime Ripard 2016-05-24 21:07 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 11/16] clk: sunxi-ng: Add N-K-factor " Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-23 13:58 ` Chen-Yu Tsai 2016-05-23 13:58 ` Chen-Yu Tsai 2016-05-08 20:01 ` [PATCH 12/16] clk: sunxi-ng: Add N-M-factor " Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-09 7:24 ` Jean-Francois Moine 2016-05-09 7:24 ` Jean-Francois Moine 2016-05-15 19:04 ` Maxime Ripard 2016-05-15 19:04 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 13/16] clk: sunxi-ng: Add N-K-M Factor clock Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-11 8:45 ` Jean-Francois Moine 2016-05-11 8:45 ` Jean-Francois Moine 2016-05-15 19:08 ` Maxime Ripard 2016-05-15 19:08 ` Maxime Ripard 2016-05-23 14:10 ` Chen-Yu Tsai 2016-05-23 14:10 ` Chen-Yu Tsai 2016-05-08 20:01 ` [PATCH 14/16] clk: sunxi-ng: Add N-K-M-P factor clock Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-11 8:49 ` Jean-Francois Moine 2016-05-11 8:49 ` Jean-Francois Moine 2016-05-23 14:36 ` Chen-Yu Tsai 2016-05-23 14:36 ` Chen-Yu Tsai 2016-05-30 7:57 ` Maxime Ripard 2016-05-30 7:57 ` Maxime Ripard 2016-05-08 20:01 ` [PATCH 15/16] clk: sunxi-ng: Add H3 clocks Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard 2016-05-09 7:39 ` Jean-Francois Moine 2016-05-09 7:39 ` Jean-Francois Moine 2016-05-15 19:18 ` Maxime Ripard 2016-05-15 19:18 ` Maxime Ripard 2016-05-13 9:45 ` Jean-Francois Moine 2016-05-13 9:45 ` Jean-Francois Moine 2016-05-18 14:02 ` Maxime Ripard 2016-05-18 14:02 ` Maxime Ripard 2016-05-18 16:23 ` Jean-Francois Moine 2016-05-18 16:23 ` Jean-Francois Moine 2016-05-18 16:27 ` Jean-Francois Moine 2016-05-18 16:27 ` Jean-Francois Moine 2016-05-16 13:47 ` Jean-Francois Moine 2016-05-16 13:47 ` Jean-Francois Moine 2016-05-18 21:20 ` Maxime Ripard 2016-05-18 21:20 ` Maxime Ripard 2016-05-30 16:15 ` Chen-Yu Tsai 2016-05-30 16:15 ` Chen-Yu Tsai 2016-06-01 19:19 ` Maxime Ripard 2016-06-01 19:19 ` Maxime Ripard 2016-06-03 6:42 ` Chen-Yu Tsai 2016-06-03 6:42 ` Chen-Yu Tsai 2016-06-03 6:55 ` Chen-Yu Tsai 2016-06-03 6:55 ` Chen-Yu Tsai 2016-05-08 20:01 ` [PATCH 16/16] ARM: dt: sun8i: switch the H3 to the new CCU driver Maxime Ripard 2016-05-08 20:01 ` Maxime Ripard
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