From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Brad Larson <blarson@amd.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, arnd@arndb.de, brendan.higgins@linux.dev, briannorris@chromium.org, brijeshkumar.singh@amd.com, catalin.marinas@arm.com, davidgow@google.com, gsomlo@gmail.com, gerg@linux-m68k.org, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, lee.jones@linaro.org, broonie@kernel.org, yamada.masahiro@socionext.com, p.zabel@pengutronix.de, piotrs@cadence.com, p.yadav@ti.com, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, fancer.lancer@gmail.com, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, will@kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v12 13/15] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Date: Thu, 23 Mar 2023 12:42:02 +0200 [thread overview] Message-ID: <CAHp75VfRr_O2=vr4-5dG0nUpkCXPHtxD2z7tP-ryMM8N+RNv_g@mail.gmail.com> (raw) In-Reply-To: <20230323000657.28664-14-blarson@amd.com> On Thu, Mar 23, 2023 at 2:10 AM Brad Larson <blarson@amd.com> wrote: > > Add support for AMD Pensando Elba SoC which explicitly > controls byte-lane enables on writes. > > Select MMC_SDHCI_IO_ACCESSORS for MMC_SDHCI_CADENCE which > allows Elba SoC sdhci_elba_ops to overwrite the SDHCI > IO memory accessors > +/* Elba control register bits [6:3] are byte-lane enables */ > +#define ELBA_BYTE_ENABLE_MASK(x) ((x) << 3) > +static void elba_priv_writel(struct sdhci_cdns_priv *priv, u32 val, > + void __iomem *reg) > +{ > + unsigned long flags; > + > + spin_lock_irqsave(&priv->wrlock, flags); > + writel(ELBA_BYTE_ENABLE_MASK(0xf), priv->ctl_addr); GENMASK(3, 0) ? > + writel(val, reg); > + spin_unlock_irqrestore(&priv->wrlock, flags); > +} ... > + byte_enables = GENMASK(1, 0) << (reg & 0x3); unsigned u32 shift = reg & GENMASK(1, 0); byte_enables = GENMASK(1, 0) << shift; ? ... > + byte_enables = BIT(0) << (reg & 0x3); In a similar way? unsigned u32 shift = reg & GENMASK(1, 0); byte_enables = BIT(0) << shift; -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Brad Larson <blarson@amd.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, arnd@arndb.de, brendan.higgins@linux.dev, briannorris@chromium.org, brijeshkumar.singh@amd.com, catalin.marinas@arm.com, davidgow@google.com, gsomlo@gmail.com, gerg@linux-m68k.org, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, lee.jones@linaro.org, broonie@kernel.org, yamada.masahiro@socionext.com, p.zabel@pengutronix.de, piotrs@cadence.com, p.yadav@ti.com, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, fancer.lancer@gmail.com, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, will@kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v12 13/15] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Date: Thu, 23 Mar 2023 12:42:02 +0200 [thread overview] Message-ID: <CAHp75VfRr_O2=vr4-5dG0nUpkCXPHtxD2z7tP-ryMM8N+RNv_g@mail.gmail.com> (raw) In-Reply-To: <20230323000657.28664-14-blarson@amd.com> On Thu, Mar 23, 2023 at 2:10 AM Brad Larson <blarson@amd.com> wrote: > > Add support for AMD Pensando Elba SoC which explicitly > controls byte-lane enables on writes. > > Select MMC_SDHCI_IO_ACCESSORS for MMC_SDHCI_CADENCE which > allows Elba SoC sdhci_elba_ops to overwrite the SDHCI > IO memory accessors > +/* Elba control register bits [6:3] are byte-lane enables */ > +#define ELBA_BYTE_ENABLE_MASK(x) ((x) << 3) > +static void elba_priv_writel(struct sdhci_cdns_priv *priv, u32 val, > + void __iomem *reg) > +{ > + unsigned long flags; > + > + spin_lock_irqsave(&priv->wrlock, flags); > + writel(ELBA_BYTE_ENABLE_MASK(0xf), priv->ctl_addr); GENMASK(3, 0) ? > + writel(val, reg); > + spin_unlock_irqrestore(&priv->wrlock, flags); > +} ... > + byte_enables = GENMASK(1, 0) << (reg & 0x3); unsigned u32 shift = reg & GENMASK(1, 0); byte_enables = GENMASK(1, 0) << shift; ? ... > + byte_enables = BIT(0) << (reg & 0x3); In a similar way? unsigned u32 shift = reg & GENMASK(1, 0); byte_enables = BIT(0) << shift; -- With Best Regards, Andy Shevchenko
next prev parent reply other threads:[~2023-03-23 10:43 UTC|newest] Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-23 0:06 [PATCH v12 00/15] Support AMD Pensando Elba SoC Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 01/15] dt-bindings: arm: add AMD Pensando boards Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 6:36 ` Krzysztof Kozlowski 2023-03-23 6:36 ` Krzysztof Kozlowski 2023-03-23 0:06 ` [PATCH v12 03/15] dt-bindings: spi: cdns: Add compatible for " Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 04/15] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 05/15] dt-bindings: soc: amd: amd,pensando-elba-ctrl: Add Pensando SoC Controller Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 06/15] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 07/15] arm64: Add config for AMD Pensando SoC platforms Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 08/15] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 09/15] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 10/15] spi: dw: Add support " Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 11/15] mmc: sdhci-cadence: Enable device specific override of writel() Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 12/15] mmc: sdhci-cadence: Support device specific init during probe Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 0:06 ` [PATCH v12 13/15] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 10:42 ` Andy Shevchenko [this message] 2023-03-23 10:42 ` Andy Shevchenko 2023-03-23 0:06 ` [PATCH v12 14/15] mmc: sdhci-cadence: Support mmc hardware reset Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 9:04 ` Philipp Zabel 2023-03-23 9:04 ` Philipp Zabel 2023-03-23 0:06 ` [PATCH v12 15/15] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson 2023-03-23 0:06 ` Brad Larson 2023-03-23 11:06 ` Andy Shevchenko 2023-03-23 11:06 ` Andy Shevchenko 2023-03-31 22:26 ` Brad Larson 2023-03-31 22:26 ` Brad Larson
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