From: Daniel Vetter <daniel@ffwll.ch>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>,
Jason Ekstrand <jason.ekstrand@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [Intel-gfx] [RFC PATCH 00/97] Basic GuC submission support in the i915
Date: Wed, 2 Jun 2021 20:57:02 +0200 [thread overview]
Message-ID: <CAKMK7uHT2mPTyX9QiTBFP2Lt28vV3JcJLPAx_hMdTtyLJ=DZ2g@mail.gmail.com> (raw)
In-Reply-To: <d76ab0ec-4f0c-19ed-adaa-ed227af63c0e@linux.intel.com>
On Wed, Jun 2, 2021 at 5:27 PM Tvrtko Ursulin
<tvrtko.ursulin@linux.intel.com> wrote:
> On 25/05/2021 17:45, Matthew Brost wrote:
> > On Tue, May 25, 2021 at 11:32:26AM +0100, Tvrtko Ursulin wrote:
> >> * Context pinning code with it's magical two adds, subtract and cmpxchg is
> >> dodgy as well.
> >
> > Daniele tried to remove this and it proved quite difficult + created
> > even more races in the backend code. This was prior to the pre-pin and
> > post-unpin code which makes this even more difficult to fix as I believe
> > these functions would need to be removed first. Not saying we can't
> > revisit this someday but I personally really like it - it is a clever
> > way to avoid reentering the pin / unpin code while asynchronous things
> > are happening rather than some complex locking scheme. Lastly, this code
> > has proved incredibly stable as I don't think we've had to fix a single
> > thing in this area since we've been using this code internally.
>
> Pretty much same as above. The code like:
>
> static inline void __intel_context_unpin(struct intel_context *ce)
> {
> if (!ce->ops->sched_disable) {
> __intel_context_do_unpin(ce, 1);
> } else {
> while (!atomic_add_unless(&ce->pin_count, -1, 1)) {
> if (atomic_cmpxchg(&ce->pin_count, 1, 2) == 1) {
> ce->ops->sched_disable(ce);
> break;
> }
> }
> }
> }
>
> That's pretty much impenetrable for me and the only thing I can think of
> here is **ALARM** must be broken! See what others think..
pin_count is a hand-rolled mutex, except not actually a real one, and
it's absolutely hiliarous in it's various incarnations (there's one
each on i915_vm, vma, obj and probably a few more).
Not the worst one I've seen by far in the code we've merged already.
Minimally this needs a comment here and in the struct next to
@pin_count to explain where all this is abused, which would already
make it better than most of the in-tree ones.
As part of the ttm conversion we have a plan to sunset the "pin_count
as a lock" stuff, depending how bad that goes we might need to split
up the task for each struct that has such a pin_count.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel@ffwll.ch>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Jason Ekstrand <jason.ekstrand@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [Intel-gfx] [RFC PATCH 00/97] Basic GuC submission support in the i915
Date: Wed, 2 Jun 2021 20:57:02 +0200 [thread overview]
Message-ID: <CAKMK7uHT2mPTyX9QiTBFP2Lt28vV3JcJLPAx_hMdTtyLJ=DZ2g@mail.gmail.com> (raw)
In-Reply-To: <d76ab0ec-4f0c-19ed-adaa-ed227af63c0e@linux.intel.com>
On Wed, Jun 2, 2021 at 5:27 PM Tvrtko Ursulin
<tvrtko.ursulin@linux.intel.com> wrote:
> On 25/05/2021 17:45, Matthew Brost wrote:
> > On Tue, May 25, 2021 at 11:32:26AM +0100, Tvrtko Ursulin wrote:
> >> * Context pinning code with it's magical two adds, subtract and cmpxchg is
> >> dodgy as well.
> >
> > Daniele tried to remove this and it proved quite difficult + created
> > even more races in the backend code. This was prior to the pre-pin and
> > post-unpin code which makes this even more difficult to fix as I believe
> > these functions would need to be removed first. Not saying we can't
> > revisit this someday but I personally really like it - it is a clever
> > way to avoid reentering the pin / unpin code while asynchronous things
> > are happening rather than some complex locking scheme. Lastly, this code
> > has proved incredibly stable as I don't think we've had to fix a single
> > thing in this area since we've been using this code internally.
>
> Pretty much same as above. The code like:
>
> static inline void __intel_context_unpin(struct intel_context *ce)
> {
> if (!ce->ops->sched_disable) {
> __intel_context_do_unpin(ce, 1);
> } else {
> while (!atomic_add_unless(&ce->pin_count, -1, 1)) {
> if (atomic_cmpxchg(&ce->pin_count, 1, 2) == 1) {
> ce->ops->sched_disable(ce);
> break;
> }
> }
> }
> }
>
> That's pretty much impenetrable for me and the only thing I can think of
> here is **ALARM** must be broken! See what others think..
pin_count is a hand-rolled mutex, except not actually a real one, and
it's absolutely hiliarous in it's various incarnations (there's one
each on i915_vm, vma, obj and probably a few more).
Not the worst one I've seen by far in the code we've merged already.
Minimally this needs a comment here and in the struct next to
@pin_count to explain where all this is abused, which would already
make it better than most of the in-tree ones.
As part of the ttm conversion we have a plan to sunset the "pin_count
as a lock" stuff, depending how bad that goes we might need to split
up the task for each struct that has such a pin_count.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-06-02 18:57 UTC|newest]
Thread overview: 504+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-06 19:13 [RFC PATCH 00/97] Basic GuC submission support in the i915 Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:12 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2021-05-06 19:13 ` [RFC PATCH 01/97] drm/i915/gt: Move engine setup out of set_default_submission Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-19 0:25 ` Matthew Brost
2021-05-19 0:25 ` [Intel-gfx] " Matthew Brost
2021-05-25 8:44 ` Tvrtko Ursulin
2021-05-25 8:44 ` Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 02/97] drm/i915/gt: Move submission_method into intel_gt Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-19 3:10 ` Matthew Brost
2021-05-19 3:10 ` [Intel-gfx] " Matthew Brost
2021-05-25 8:44 ` Tvrtko Ursulin
2021-05-25 8:44 ` Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 03/97] drm/i915/gt: Move CS interrupt handler to the backend Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-19 3:31 ` Matthew Brost
2021-05-19 3:31 ` [Intel-gfx] " Matthew Brost
2021-05-25 8:45 ` Tvrtko Ursulin
2021-05-25 8:45 ` Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 04/97] drm/i915/guc: skip disabling CTBs before sanitizing the GuC Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-20 16:47 ` Matthew Brost
2021-05-20 16:47 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 05/97] drm/i915/guc: use probe_error log for CT enablement failure Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 10:30 ` Michal Wajdeczko
2021-05-24 10:30 ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 06/97] drm/i915/guc: enable only the user interrupt when using GuC submission Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 0:31 ` Matthew Brost
2021-05-25 0:31 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 07/97] drm/i915/guc: Remove sample_forcewake h2g action Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 10:48 ` Michal Wajdeczko
2021-05-24 10:48 ` [Intel-gfx] " Michal Wajdeczko
2021-05-25 0:36 ` Matthew Brost
2021-05-25 0:36 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 08/97] drm/i915/guc: Keep strict GuC ABI definitions Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 23:52 ` Michał Winiarski
2021-05-24 23:52 ` [Intel-gfx] " Michał Winiarski
2021-05-06 19:13 ` [RFC PATCH 09/97] drm/i915/guc: Stop using fence/status from CTB descriptor Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 2:38 ` Matthew Brost
2021-05-25 2:38 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 10/97] drm/i915: Promote ptrdiff() to i915_utils.h Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 0:42 ` Matthew Brost
2021-05-25 0:42 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 11/97] drm/i915/guc: Only rely on own CTB size Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 2:47 ` Matthew Brost
2021-05-25 2:47 ` [Intel-gfx] " Matthew Brost
2021-05-25 12:48 ` Michal Wajdeczko
2021-05-25 12:48 ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 12/97] drm/i915/guc: Don't repeat CTB layout calculations Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 2:53 ` Matthew Brost
2021-05-25 2:53 ` [Intel-gfx] " Matthew Brost
2021-05-25 13:07 ` Michal Wajdeczko
2021-05-25 13:07 ` [Intel-gfx] " Michal Wajdeczko
2021-05-25 16:56 ` Matthew Brost
2021-05-25 16:56 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 13/97] drm/i915/guc: Replace CTB array with explicit members Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 3:15 ` Matthew Brost
2021-05-25 3:15 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 14/97] drm/i915/guc: Update sizes of CTB buffers Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 2:56 ` Matthew Brost
2021-05-25 2:56 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 15/97] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 18:08 ` Matthew Brost
2021-05-25 18:08 ` [Intel-gfx] " Matthew Brost
2021-05-25 19:37 ` Michal Wajdeczko
2021-05-25 19:37 ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 16/97] drm/i915/guc: Start protecting access to CTB descriptors Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 3:21 ` Matthew Brost
2021-05-25 3:21 ` [Intel-gfx] " Matthew Brost
2021-05-25 13:10 ` Michal Wajdeczko
2021-05-25 3:21 ` Matthew Brost
2021-05-25 3:21 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 17/97] drm/i915/guc: Stop using mutex while sending CTB messages Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 16:14 ` Matthew Brost
2021-05-25 16:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 18/97] drm/i915/guc: Don't receive all G2H messages in irq handler Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 18:15 ` Matthew Brost
2021-05-25 18:15 ` [Intel-gfx] " Matthew Brost
2021-05-25 19:43 ` Michal Wajdeczko
2021-05-25 19:43 ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 19/97] drm/i915/guc: Always copy CT message to new allocation Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 18:25 ` Matthew Brost
2021-05-25 18:25 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 20/97] drm/i915/guc: Introduce unified HXG messages Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-11 15:16 ` Daniel Vetter
2021-05-11 15:16 ` [Intel-gfx] " Daniel Vetter
2021-05-11 17:59 ` Matthew Brost
2021-05-11 17:59 ` [Intel-gfx] " Matthew Brost
2021-05-11 22:11 ` Michal Wajdeczko
2021-05-11 22:11 ` [Intel-gfx] " Michal Wajdeczko
2021-05-12 8:40 ` Daniel Vetter
2021-05-12 8:40 ` [Intel-gfx] " Daniel Vetter
2021-05-06 19:13 ` [RFC PATCH 21/97] drm/i915/guc: Update MMIO based communication Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 22/97] drm/i915/guc: Update CTB response status Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 23/97] drm/i915/guc: Support per context scheduling policies Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 1:15 ` Matthew Brost
2021-05-25 1:15 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 24/97] drm/i915/guc: Add flag for mark broken CTB Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-27 19:44 ` Matthew Brost
2021-05-27 19:44 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 25/97] drm/i915/guc: New definition of the CTB descriptor Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 26/97] drm/i915/guc: New definition of the CTB registration action Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 27/97] drm/i915/guc: New CTB based communication Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 28/97] drm/i915/guc: Kill guc_clients.ct_pool Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 1:01 ` Matthew Brost
2021-05-25 1:01 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 29/97] drm/i915/guc: Update firmware to v60.1.2 Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 30/97] drm/i915/uc: turn on GuC/HuC auto mode by default Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 11:00 ` Michal Wajdeczko
2021-05-24 11:00 ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 31/97] drm/i915/guc: Early initialization of GuC send registers Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-26 20:28 ` Matthew Brost
2021-05-26 20:28 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 32/97] drm/i915: Introduce i915_sched_engine object Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-11 15:18 ` Daniel Vetter
2021-05-11 15:18 ` [Intel-gfx] " Daniel Vetter
2021-05-11 17:56 ` Matthew Brost
2021-05-11 17:56 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 33/97] drm/i915: Engine relative MMIO Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 9:05 ` Tvrtko Ursulin
2021-05-25 9:05 ` Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 34/97] drm/i915/guc: Use guc_class instead of engine_class in fw interface Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-26 20:41 ` Matthew Brost
2021-05-26 20:41 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 35/97] drm/i915/guc: Improve error message for unsolicited CT response Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 11:59 ` Michal Wajdeczko
2021-05-24 11:59 ` [Intel-gfx] " Michal Wajdeczko
2021-05-25 17:32 ` Matthew Brost
2021-05-25 17:32 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 36/97] drm/i915/guc: Add non blocking CTB send function Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 12:21 ` Michal Wajdeczko
2021-05-24 12:21 ` [Intel-gfx] " Michal Wajdeczko
2021-05-25 17:30 ` Matthew Brost
2021-05-25 17:30 ` [Intel-gfx] " Matthew Brost
2021-05-25 9:21 ` Tvrtko Ursulin
2021-05-25 9:21 ` Tvrtko Ursulin
2021-05-25 17:21 ` Matthew Brost
2021-05-25 17:21 ` Matthew Brost
2021-05-26 8:57 ` Tvrtko Ursulin
2021-05-26 8:57 ` Tvrtko Ursulin
2021-05-26 18:10 ` Matthew Brost
2021-05-26 18:10 ` Matthew Brost
2021-05-27 10:02 ` Tvrtko Ursulin
2021-05-27 10:02 ` Tvrtko Ursulin
2021-05-27 14:35 ` Matthew Brost
2021-05-27 14:35 ` Matthew Brost
2021-05-27 15:11 ` Tvrtko Ursulin
2021-05-27 15:11 ` Tvrtko Ursulin
2021-06-07 17:31 ` Matthew Brost
2021-06-07 17:31 ` Matthew Brost
2021-06-08 8:39 ` Tvrtko Ursulin
2021-06-08 8:39 ` Tvrtko Ursulin
2021-06-08 8:46 ` Daniel Vetter
2021-06-08 8:46 ` Daniel Vetter
2021-06-09 23:10 ` Matthew Brost
2021-06-09 23:10 ` Matthew Brost
2021-06-10 15:27 ` Daniel Vetter
2021-06-10 15:27 ` Daniel Vetter
2021-06-24 16:38 ` Matthew Brost
2021-06-24 16:38 ` Matthew Brost
2021-06-24 17:25 ` Daniel Vetter
2021-06-24 17:25 ` Daniel Vetter
2021-06-09 13:58 ` Michal Wajdeczko
2021-06-09 13:58 ` Michal Wajdeczko
2021-06-09 23:05 ` Matthew Brost
2021-06-09 23:05 ` Matthew Brost
2021-06-09 14:14 ` Michal Wajdeczko
2021-06-09 14:14 ` Michal Wajdeczko
2021-06-09 23:13 ` Matthew Brost
2021-06-09 23:13 ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 37/97] drm/i915/guc: Add stall timer to " Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 12:58 ` Michal Wajdeczko
2021-05-24 12:58 ` [Intel-gfx] " Michal Wajdeczko
2021-05-24 18:35 ` Matthew Brost
2021-05-24 18:35 ` [Intel-gfx] " Matthew Brost
2021-05-25 14:15 ` Michal Wajdeczko
2021-05-25 14:15 ` [Intel-gfx] " Michal Wajdeczko
2021-05-25 16:54 ` Matthew Brost
2021-05-25 16:54 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 38/97] drm/i915/guc: Optimize CTB writes and reads Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 13:31 ` Michal Wajdeczko
2021-05-24 13:31 ` [Intel-gfx] " Michal Wajdeczko
2021-05-25 17:39 ` Matthew Brost
2021-05-25 17:39 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 39/97] drm/i915/guc: Increase size of CTB buffers Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 13:43 ` Michal Wajdeczko
2021-05-24 13:43 ` Michal Wajdeczko
2021-05-24 18:40 ` Matthew Brost
2021-05-24 18:40 ` Matthew Brost
2021-05-25 9:24 ` Tvrtko Ursulin
2021-05-25 9:24 ` Tvrtko Ursulin
2021-05-25 17:15 ` Matthew Brost
2021-05-25 17:15 ` Matthew Brost
2021-05-26 9:30 ` Tvrtko Ursulin
2021-05-26 9:30 ` Tvrtko Ursulin
2021-05-26 18:20 ` Matthew Brost
2021-05-26 18:20 ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 40/97] drm/i915/guc: Module load failure test for CT buffer creation Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-24 13:45 ` Michal Wajdeczko
2021-05-24 13:45 ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 41/97] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 42/97] drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 43/97] drm/i915/guc: Add lrc descriptor context lookup array Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-11 15:26 ` Daniel Vetter
2021-05-11 15:26 ` [Intel-gfx] " Daniel Vetter
2021-05-11 17:01 ` Matthew Brost
2021-05-11 17:01 ` [Intel-gfx] " Matthew Brost
2021-05-11 17:43 ` Daniel Vetter
2021-05-11 17:43 ` [Intel-gfx] " Daniel Vetter
2021-05-11 19:34 ` Matthew Brost
2021-05-11 19:34 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 44/97] drm/i915/guc: Implement GuC submission tasklet Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-25 9:43 ` Tvrtko Ursulin
2021-05-25 9:43 ` Tvrtko Ursulin
2021-05-25 17:10 ` Matthew Brost
2021-05-25 17:10 ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 45/97] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost
2021-05-06 19:13 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 46/97] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-29 20:32 ` Michal Wajdeczko
2021-05-29 20:32 ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:14 ` [RFC PATCH 47/97] drm/i915/guc: Insert fence on context when deregistering Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 48/97] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 49/97] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-11 15:37 ` Daniel Vetter
2021-05-11 15:37 ` [Intel-gfx] " Daniel Vetter
2021-05-11 16:31 ` Matthew Brost
2021-05-11 16:31 ` [Intel-gfx] " Matthew Brost
2021-05-26 10:26 ` Tvrtko Ursulin
2021-05-26 10:26 ` Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 50/97] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 51/97] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 52/97] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 53/97] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-25 9:52 ` Tvrtko Ursulin
2021-05-25 9:52 ` Tvrtko Ursulin
2021-05-25 17:01 ` Matthew Brost
2021-05-25 17:01 ` Matthew Brost
2021-05-26 9:25 ` Tvrtko Ursulin
2021-05-26 9:25 ` Tvrtko Ursulin
2021-05-26 18:15 ` Matthew Brost
2021-05-26 18:15 ` Matthew Brost
2021-05-27 8:41 ` Tvrtko Ursulin
2021-05-27 8:41 ` Tvrtko Ursulin
2021-05-27 14:38 ` Matthew Brost
2021-05-27 14:38 ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 54/97] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 55/97] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-07 5:56 ` kernel test robot
2021-05-25 10:06 ` Tvrtko Ursulin
2021-05-25 10:06 ` Tvrtko Ursulin
2021-05-25 17:07 ` Matthew Brost
2021-05-25 17:07 ` Matthew Brost
2021-05-26 9:21 ` Tvrtko Ursulin
2021-05-26 9:21 ` Tvrtko Ursulin
2021-05-26 18:18 ` Matthew Brost
2021-05-26 18:18 ` Matthew Brost
2021-05-27 9:02 ` Tvrtko Ursulin
2021-05-27 9:02 ` Tvrtko Ursulin
2021-05-27 14:37 ` Matthew Brost
2021-05-27 14:37 ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 56/97] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 57/97] drm/i915/guc: Add several request trace points Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 58/97] drm/i915: Add intel_context tracing Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 59/97] drm/i915/guc: GuC virtual engines Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 60/97] drm/i915: Track 'serial' counts for " Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-25 10:16 ` Tvrtko Ursulin
2021-05-25 10:16 ` Tvrtko Ursulin
2021-05-25 17:52 ` Matthew Brost
2021-05-25 17:52 ` Matthew Brost
2021-05-26 8:40 ` Tvrtko Ursulin
2021-05-26 8:40 ` Tvrtko Ursulin
2021-05-26 18:45 ` John Harrison
2021-05-26 18:45 ` John Harrison
2021-05-27 8:53 ` Tvrtko Ursulin
2021-05-27 8:53 ` Tvrtko Ursulin
2021-05-27 17:01 ` John Harrison
2021-05-27 17:01 ` John Harrison
2021-06-01 9:31 ` Tvrtko Ursulin
2021-06-01 9:31 ` Tvrtko Ursulin
2021-06-02 1:20 ` John Harrison
2021-06-02 1:20 ` John Harrison
2021-06-02 12:04 ` Tvrtko Ursulin
2021-06-02 12:04 ` Tvrtko Ursulin
2021-06-02 12:09 ` Tvrtko Ursulin
2021-06-02 12:09 ` Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 61/97] drm/i915: Hold reference to intel_context over life of i915_request Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-06-02 12:18 ` Tvrtko Ursulin
2021-06-02 12:18 ` Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 62/97] drm/i915/guc: Disable bonding extension with GuC submission Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 63/97] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-06-02 13:31 ` Tvrtko Ursulin
2021-06-02 13:31 ` Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 64/97] drm/i915/guc: Reset implementation for new GuC interface Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-06-02 14:33 ` Tvrtko Ursulin
2021-06-02 14:33 ` Tvrtko Ursulin
2021-06-04 3:17 ` Matthew Brost
2021-06-04 3:17 ` Matthew Brost
2021-06-04 8:16 ` Daniel Vetter
2021-06-04 8:16 ` Daniel Vetter
2021-06-04 18:02 ` Matthew Brost
2021-06-04 18:02 ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 65/97] drm/i915: Reset GPU immediately if submission is disabled Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-06-02 14:36 ` Tvrtko Ursulin
2021-06-02 14:36 ` Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 66/97] drm/i915/guc: Add disable interrupts to guc sanitize Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-11 8:16 ` [drm/i915/guc] 07336fb545: WARNING:at_drivers/gpu/drm/i915/gt/uc/intel_uc.c:#__uc_sanitize[i915] kernel test robot
2021-05-11 8:16 ` kernel test robot
2021-05-11 8:16 ` [Intel-gfx] " kernel test robot
2021-05-11 8:16 ` kernel test robot
2021-05-06 19:14 ` [RFC PATCH 67/97] drm/i915/guc: Suspend/resume implementation for new interface Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 68/97] drm/i915/guc: Handle context reset notification Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-11 16:25 ` Daniel Vetter
2021-05-11 16:25 ` Daniel Vetter
2021-05-06 19:14 ` [RFC PATCH 69/97] drm/i915/guc: Handle engine reset failure notification Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 70/97] drm/i915/guc: Enable the timer expired interrupt for GuC Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 71/97] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 72/97] drm/i915/guc: Don't complain about reset races Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 73/97] drm/i915/guc: Enable GuC engine reset Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 74/97] drm/i915/guc: Capture error state on context reset Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-11 16:28 ` Daniel Vetter
2021-05-11 16:28 ` Daniel Vetter
2021-05-11 17:12 ` Matthew Brost
2021-05-11 17:12 ` Matthew Brost
2021-05-11 17:45 ` Daniel Vetter
2021-05-11 17:45 ` Daniel Vetter
2021-05-06 19:14 ` [RFC PATCH 75/97] drm/i915/guc: Fix for error capture after full GPU reset with GuC Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 76/97] drm/i915/guc: Hook GuC scheduling policies up Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 77/97] drm/i915/guc: Connect reset modparam updates to GuC policy flags Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 78/97] drm/i915/guc: Include scheduling policies in the debugfs state dump Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 79/97] drm/i915/guc: Don't call ring_is_idle in GuC submission Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 80/97] drm/i915/guc: Implement banned contexts for " Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 81/97] drm/i915/guc: Allow flexible number of context ids Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 82/97] drm/i915/guc: Connect the number of guc_ids to debugfs Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 83/97] drm/i915/guc: Don't return -EAGAIN to user when guc_ids exhausted Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-07 6:06 ` kernel test robot
2021-05-06 19:14 ` [RFC PATCH 84/97] drm/i915/guc: Don't allow requests not ready to consume all guc_ids Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 85/97] drm/i915/guc: Introduce guc_submit_engine object Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 86/97] drm/i915/guc: Add golden context to GuC ADS Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 87/97] drm/i915/guc: Implement GuC priority management Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 88/97] drm/i915/guc: Support request cancellation Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 89/97] drm/i915/guc: Check return of __xa_store when registering a context Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 90/97] drm/i915/guc: Non-static lrc descriptor registration buffer Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 91/97] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 92/97] drm/i915: Add GT PM delayed worker Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 93/97] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 94/97] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 95/97] drm/i915/guc: Selftest for GuC flow control Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 96/97] drm/i915/guc: Update GuC documentation Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 97/97] drm/i915/guc: Unblock GuC submission on Gen11+ Matthew Brost
2021-05-06 19:14 ` [Intel-gfx] " Matthew Brost
2021-05-09 17:12 ` [RFC PATCH 00/97] Basic GuC submission support in the i915 Martin Peres
2021-05-09 17:12 ` [Intel-gfx] " Martin Peres
2021-05-09 23:11 ` Jason Ekstrand
2021-05-09 23:11 ` [Intel-gfx] " Jason Ekstrand
2021-05-10 13:55 ` Martin Peres
2021-05-10 13:55 ` [Intel-gfx] " Martin Peres
2021-05-10 16:25 ` Jason Ekstrand
2021-05-10 16:25 ` [Intel-gfx] " Jason Ekstrand
2021-05-11 8:01 ` Martin Peres
2021-05-11 8:01 ` [Intel-gfx] " Martin Peres
2021-05-10 16:33 ` Daniel Vetter
2021-05-10 16:33 ` [Intel-gfx] " Daniel Vetter
2021-05-10 18:30 ` Francisco Jerez
2021-05-10 18:30 ` Francisco Jerez
2021-05-11 8:06 ` Martin Peres
2021-05-11 8:06 ` [Intel-gfx] " Martin Peres
2021-05-11 15:26 ` Bloomfield, Jon
2021-05-11 15:26 ` [Intel-gfx] " Bloomfield, Jon
2021-05-11 16:39 ` Matthew Brost
2021-05-11 16:39 ` [Intel-gfx] " Matthew Brost
2021-05-12 6:26 ` Martin Peres
2021-05-12 6:26 ` [Intel-gfx] " Martin Peres
2021-05-14 16:31 ` Jason Ekstrand
2021-05-14 16:31 ` [Intel-gfx] " Jason Ekstrand
2021-05-25 15:37 ` Alex Deucher
2021-05-25 15:37 ` [Intel-gfx] " Alex Deucher
2021-05-11 2:58 ` Dixit, Ashutosh
2021-05-11 2:58 ` [Intel-gfx] " Dixit, Ashutosh
2021-05-11 7:47 ` Martin Peres
2021-05-11 7:47 ` [Intel-gfx] " Martin Peres
2021-05-14 11:11 ` Tvrtko Ursulin
2021-05-14 11:11 ` Tvrtko Ursulin
2021-05-14 16:36 ` Jason Ekstrand
2021-05-14 16:36 ` Jason Ekstrand
2021-05-14 16:46 ` Matthew Brost
2021-05-14 16:46 ` Matthew Brost
2021-05-14 16:41 ` Matthew Brost
2021-05-14 16:41 ` Matthew Brost
2021-05-25 10:32 ` Tvrtko Ursulin
2021-05-25 10:32 ` Tvrtko Ursulin
2021-05-25 16:45 ` Matthew Brost
2021-05-25 16:45 ` Matthew Brost
2021-06-02 15:27 ` Tvrtko Ursulin
2021-06-02 15:27 ` Tvrtko Ursulin
2021-06-02 18:57 ` Daniel Vetter [this message]
2021-06-02 18:57 ` Daniel Vetter
2021-06-03 3:41 ` Matthew Brost
2021-06-03 3:41 ` Matthew Brost
2021-06-03 4:47 ` Daniel Vetter
2021-06-03 4:47 ` Daniel Vetter
2021-06-03 9:49 ` Tvrtko Ursulin
2021-06-03 9:49 ` Tvrtko Ursulin
2021-06-03 10:52 ` Tvrtko Ursulin
2021-06-03 10:52 ` Tvrtko Ursulin
2021-06-03 4:10 ` Matthew Brost
2021-06-03 4:10 ` Matthew Brost
2021-06-03 8:51 ` Tvrtko Ursulin
2021-06-03 8:51 ` Tvrtko Ursulin
2021-06-03 16:34 ` Matthew Brost
2021-06-03 16:34 ` Matthew Brost
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