From: Rob Herring <robh+dt@kernel.org> To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Cc: Linuxarm <linuxarm@huawei.com>, mauro.chehab@huawei.com, Binghui Wang <wangbinghui@hisilicon.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Jingoo Han <jingoohan1@gmail.com>, Xiaowei Song <songxiaowei@hisilicon.com>, devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, PCI <linux-pci@vger.kernel.org>, linux-phy@lists.infradead.org Subject: Re: [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work Date: Tue, 3 Aug 2021 16:11:42 -0600 [thread overview] Message-ID: <CAL_JsqLjw=+szXWJjGe86tMc51NA-5j=jVSXUAWuKeZRuJNJUg@mail.gmail.com> (raw) In-Reply-To: <cover.1627965261.git.mchehab+huawei@kernel.org> On Mon, Aug 2, 2021 at 10:39 PM Mauro Carvalho Chehab <mchehab+huawei@kernel.org> wrote: > > Hi Rob, > > That's the third version of the DT bindings for Kirin 970 PCIE and its > corresponding PHY. > > It is identical to v2, except by: > - pcie@7,0 { // Lane 7: Ethernet > + pcie@7,0 { // Lane 6: Ethernet Can you check whether you have DT node links in sysfs for the PCI devices? If you don't, then something is wrong still in the topology or the PCI core is failing to set the DT node pointer in struct device. Though you don't rely on that currently, we want the topology to match. It's possible this never worked on arm/arm64 as mainly powerpc relied on this. I'd like some way to validate the DT matches the PCI topology. We could have a tool that generates the DT structure based on the PCI topology. > at Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml > > IMO, the best would be to merge this series via your tree, as it > depends on the patch converting the DT bindings for the PCIe DWC > driver. Yes, agreed. Rob
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh+dt@kernel.org> To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Cc: Linuxarm <linuxarm@huawei.com>, mauro.chehab@huawei.com, Binghui Wang <wangbinghui@hisilicon.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Jingoo Han <jingoohan1@gmail.com>, Xiaowei Song <songxiaowei@hisilicon.com>, devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, PCI <linux-pci@vger.kernel.org>, linux-phy@lists.infradead.org Subject: Re: [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work Date: Tue, 3 Aug 2021 16:11:42 -0600 [thread overview] Message-ID: <CAL_JsqLjw=+szXWJjGe86tMc51NA-5j=jVSXUAWuKeZRuJNJUg@mail.gmail.com> (raw) In-Reply-To: <cover.1627965261.git.mchehab+huawei@kernel.org> On Mon, Aug 2, 2021 at 10:39 PM Mauro Carvalho Chehab <mchehab+huawei@kernel.org> wrote: > > Hi Rob, > > That's the third version of the DT bindings for Kirin 970 PCIE and its > corresponding PHY. > > It is identical to v2, except by: > - pcie@7,0 { // Lane 7: Ethernet > + pcie@7,0 { // Lane 6: Ethernet Can you check whether you have DT node links in sysfs for the PCI devices? If you don't, then something is wrong still in the topology or the PCI core is failing to set the DT node pointer in struct device. Though you don't rely on that currently, we want the topology to match. It's possible this never worked on arm/arm64 as mainly powerpc relied on this. I'd like some way to validate the DT matches the PCI topology. We could have a tool that generates the DT structure based on the PCI topology. > at Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml > > IMO, the best would be to merge this series via your tree, as it > depends on the patch converting the DT bindings for the PCIe DWC > driver. Yes, agreed. Rob -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2021-08-03 22:11 UTC|newest] Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-03 4:38 [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work Mauro Carvalho Chehab 2021-08-03 4:38 ` Mauro Carvalho Chehab 2021-08-03 4:38 ` [PATCH v3 1/4] dt-bindings: PCI: kirin: Fix compatible string Mauro Carvalho Chehab 2021-08-03 22:22 ` Rob Herring 2021-08-03 4:38 ` [PATCH v3 2/4] dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml Mauro Carvalho Chehab 2021-08-03 22:27 ` Rob Herring 2021-08-03 4:38 ` [PATCH v3 3/4] dt-bindings: PCI: kirin: Add support for Kirin970 Mauro Carvalho Chehab 2021-08-03 4:38 ` [PATCH v3 4/4] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY Mauro Carvalho Chehab 2021-08-03 4:38 ` Mauro Carvalho Chehab 2021-08-03 22:29 ` Rob Herring 2021-08-03 22:29 ` Rob Herring 2021-08-03 22:11 ` Rob Herring [this message] 2021-08-03 22:11 ` [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work Rob Herring 2021-08-04 6:50 ` Mauro Carvalho Chehab 2021-08-04 6:50 ` Mauro Carvalho Chehab 2021-08-04 16:28 ` Rob Herring 2021-08-04 16:28 ` Rob Herring 2021-08-05 7:46 ` Mauro Carvalho Chehab 2021-08-05 7:46 ` Mauro Carvalho Chehab 2021-08-05 7:58 ` Mauro Carvalho Chehab 2021-08-05 7:58 ` Mauro Carvalho Chehab 2021-08-06 16:23 ` Rob Herring 2021-08-06 16:23 ` Rob Herring 2021-08-10 9:42 ` Mauro Carvalho Chehab 2021-08-10 9:42 ` Mauro Carvalho Chehab 2021-08-10 13:44 ` Rob Herring 2021-08-10 13:44 ` Rob Herring 2021-08-10 14:20 ` Mauro Carvalho Chehab 2021-08-10 14:20 ` Mauro Carvalho Chehab 2021-08-10 17:13 ` Rob Herring 2021-08-10 17:13 ` Rob Herring 2021-08-10 17:52 ` Rob Herring 2021-08-10 17:52 ` Rob Herring 2021-08-11 7:11 ` Mauro Carvalho Chehab 2021-08-11 7:11 ` Mauro Carvalho Chehab 2021-08-11 6:46 ` Mauro Carvalho Chehab 2021-08-11 6:46 ` Mauro Carvalho Chehab 2021-08-12 3:13 ` Rob Herring 2021-08-12 3:13 ` Rob Herring 2021-08-12 7:48 ` Mauro Carvalho Chehab 2021-08-12 7:48 ` Mauro Carvalho Chehab
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