From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Dirk Behme <dirk.behme@de.bosch.com>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
linux-spi <linux-spi@vger.kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Subject: Re: [PATCH 1/8] spi: sh-msiof: Add sleep before master transfer for test
Date: Thu, 7 Sep 2017 10:11:02 +0200 [thread overview]
Message-ID: <CAMuHMdV5vQsS5RgykMptRxDb1wgS9YryBQu7xgGHXactjGGWFA@mail.gmail.com> (raw)
In-Reply-To: <20170906070507.26223-2-dirk.behme@de.bosch.com>
Hi Dirk,
On Wed, Sep 6, 2017 at 9:05 AM, Dirk Behme <dirk.behme@de.bosch.com> wrote:
> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
>
> This patch is for debug of transfer between master and slave.
> Since the slave needs to complete a preparation in data transfer
> before the master working, the sleep wait is put before
> the data transfer of the master.
>
> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
IMHO this is a pure debug patch, not intended for upstream.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2017-09-07 8:11 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-06 7:04 [PATCH 0/8] spi: sh-msiof: Import some BSP patches Dirk Behme
2017-09-06 7:05 ` [PATCH 1/8] spi: sh-msiof: Add sleep before master transfer for test Dirk Behme
2017-09-07 7:04 ` Vladimir Zapolskiy
2017-09-07 7:04 ` Vladimir Zapolskiy
2017-09-07 7:16 ` Dirk Behme
2017-09-07 7:16 ` Dirk Behme
2017-09-07 8:11 ` Geert Uytterhoeven [this message]
2017-09-07 8:26 ` Dirk Behme
2017-09-07 8:26 ` Dirk Behme
2017-09-06 7:05 ` [PATCH 2/8] spi: sh-msiof: Fix DMA transfer size check Dirk Behme
2017-09-07 8:31 ` Geert Uytterhoeven
2017-09-07 8:33 ` Dirk Behme
2017-09-07 8:39 ` Geert Uytterhoeven
2017-09-07 8:39 ` Geert Uytterhoeven
2017-09-07 8:42 ` Dirk Behme
2017-09-07 8:59 ` Geert Uytterhoeven
2017-09-07 9:05 ` Dirk Behme
2017-09-07 9:05 ` Dirk Behme
2017-09-07 9:12 ` Geert Uytterhoeven
2017-09-07 9:12 ` Geert Uytterhoeven
2018-01-03 17:25 ` Geert Uytterhoeven
2018-01-03 17:25 ` Geert Uytterhoeven
2018-01-04 7:19 ` Dirk Behme
2018-01-04 8:24 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 3/8] spi: sh-msiof: Fix MSIOF address for DMAC Dirk Behme
2017-09-06 7:05 ` Dirk Behme
2017-09-06 9:22 ` Geert Uytterhoeven
2017-09-06 10:09 ` Dirk Behme
2017-09-06 10:09 ` Dirk Behme
2017-09-06 10:42 ` Geert Uytterhoeven
2017-09-06 10:59 ` Dirk Behme
2017-09-06 10:59 ` Dirk Behme
2017-09-06 11:01 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 4/8] spi: sh-msiof: Fix DMA completion Dirk Behme
2017-09-07 8:33 ` Geert Uytterhoeven
2017-09-07 8:33 ` Geert Uytterhoeven
2017-09-07 8:41 ` Dirk Behme
2017-09-07 8:41 ` Dirk Behme
2017-09-06 7:05 ` [PATCH 5/8] spi: sh-msiof: Wait for Tx FIFO empty after DMA Dirk Behme
2017-09-06 17:57 ` Sergei Shtylyov
2017-09-07 8:34 ` Geert Uytterhoeven
2017-09-07 8:34 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 6/8] spi: sh-msiof: Add MSIOF parent clock changing function for R-Car Gen3 Dirk Behme
2017-09-07 8:38 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 7/8] spi: sh-msiof: Fix gpio function Dirk Behme
2017-09-06 7:05 ` Dirk Behme
2017-09-07 8:24 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 8/8] spi: sh-msiof: Add registers reset Dirk Behme
2017-09-06 7:05 ` Dirk Behme
2017-09-06 18:11 ` Sergei Shtylyov
2017-09-07 8:11 ` Geert Uytterhoeven
2017-09-07 8:11 ` Geert Uytterhoeven
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