From: Dirk Behme <dirk.behme@de.bosch.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
linux-spi <linux-spi@vger.kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Ryo Kataoka <ryo.kataoka.wt@renesas.com>,
Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Subject: Re: [PATCH 4/8] spi: sh-msiof: Fix DMA completion
Date: Thu, 7 Sep 2017 10:41:13 +0200 [thread overview]
Message-ID: <40ef3c01-983d-b80d-59d4-085a7b7d8f13@de.bosch.com> (raw)
In-Reply-To: <CAMuHMdW=AA03BLMXO8EpBBx3gdd13VPrjhL1gsEgZR2msYBkcQ@mail.gmail.com>
On 07.09.2017 10:33, Geert Uytterhoeven wrote:
> Hi Dirk,
>
> On Wed, Sep 6, 2017 at 9:05 AM, Dirk Behme <dirk.behme@de.bosch.com> wrote:
>> From: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
>>
>> When reception DMA completes before transmission DMA, next transmission
>> DMA may not be able to start. This patch adds wait_for_completion_timeout()
>> to both of reception DMA and transmission DMA.
>>
>> If the driver waits only for the Rx DMA completion, the Tx DMA completion
>> thread of DMA Engine may be still processing.
>>
>> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
>> [reword commit message]
>> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
>> [adjust context]
>> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
>
> Is this still needed after "[PATCH 5/8] spi: sh-msiof: Wait for Tx
> FIFO empty after DMA"?
Do you have a proposal for nice test cases you like to see covered?
Best regards
Dirk
WARNING: multiple messages have this Message-ID (diff)
From: Dirk Behme <dirk.behme-V5te9oGctAVWk0Htik3J/w@public.gmane.org>
To: Geert Uytterhoeven <geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>
Cc: Linux-Renesas
<linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-spi <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Geert Uytterhoeven
<geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>,
Ryo Kataoka
<ryo.kataoka.wt-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>,
Hiromitsu Yamasaki
<hiromitsu.yamasaki.ym-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
Subject: Re: [PATCH 4/8] spi: sh-msiof: Fix DMA completion
Date: Thu, 7 Sep 2017 10:41:13 +0200 [thread overview]
Message-ID: <40ef3c01-983d-b80d-59d4-085a7b7d8f13@de.bosch.com> (raw)
In-Reply-To: <CAMuHMdW=AA03BLMXO8EpBBx3gdd13VPrjhL1gsEgZR2msYBkcQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On 07.09.2017 10:33, Geert Uytterhoeven wrote:
> Hi Dirk,
>
> On Wed, Sep 6, 2017 at 9:05 AM, Dirk Behme <dirk.behme-V5te9oGctAVWk0Htik3J/w@public.gmane.org> wrote:
>> From: Ryo Kataoka <ryo.kataoka.wt-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
>>
>> When reception DMA completes before transmission DMA, next transmission
>> DMA may not be able to start. This patch adds wait_for_completion_timeout()
>> to both of reception DMA and transmission DMA.
>>
>> If the driver waits only for the Rx DMA completion, the Tx DMA completion
>> thread of DMA Engine may be still processing.
>>
>> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
>> [reword commit message]
>> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
>> [adjust context]
>> Signed-off-by: Dirk Behme <dirk.behme-V5te9oGctAVWk0Htik3J/w@public.gmane.org>
>
> Is this still needed after "[PATCH 5/8] spi: sh-msiof: Wait for Tx
> FIFO empty after DMA"?
Do you have a proposal for nice test cases you like to see covered?
Best regards
Dirk
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next prev parent reply other threads:[~2017-09-07 8:41 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-06 7:04 [PATCH 0/8] spi: sh-msiof: Import some BSP patches Dirk Behme
2017-09-06 7:05 ` [PATCH 1/8] spi: sh-msiof: Add sleep before master transfer for test Dirk Behme
2017-09-07 7:04 ` Vladimir Zapolskiy
2017-09-07 7:04 ` Vladimir Zapolskiy
2017-09-07 7:16 ` Dirk Behme
2017-09-07 7:16 ` Dirk Behme
2017-09-07 8:11 ` Geert Uytterhoeven
2017-09-07 8:26 ` Dirk Behme
2017-09-07 8:26 ` Dirk Behme
2017-09-06 7:05 ` [PATCH 2/8] spi: sh-msiof: Fix DMA transfer size check Dirk Behme
2017-09-07 8:31 ` Geert Uytterhoeven
2017-09-07 8:33 ` Dirk Behme
2017-09-07 8:39 ` Geert Uytterhoeven
2017-09-07 8:39 ` Geert Uytterhoeven
2017-09-07 8:42 ` Dirk Behme
2017-09-07 8:59 ` Geert Uytterhoeven
2017-09-07 9:05 ` Dirk Behme
2017-09-07 9:05 ` Dirk Behme
2017-09-07 9:12 ` Geert Uytterhoeven
2017-09-07 9:12 ` Geert Uytterhoeven
2018-01-03 17:25 ` Geert Uytterhoeven
2018-01-03 17:25 ` Geert Uytterhoeven
2018-01-04 7:19 ` Dirk Behme
2018-01-04 8:24 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 3/8] spi: sh-msiof: Fix MSIOF address for DMAC Dirk Behme
2017-09-06 7:05 ` Dirk Behme
2017-09-06 9:22 ` Geert Uytterhoeven
2017-09-06 10:09 ` Dirk Behme
2017-09-06 10:09 ` Dirk Behme
2017-09-06 10:42 ` Geert Uytterhoeven
2017-09-06 10:59 ` Dirk Behme
2017-09-06 10:59 ` Dirk Behme
2017-09-06 11:01 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 4/8] spi: sh-msiof: Fix DMA completion Dirk Behme
2017-09-07 8:33 ` Geert Uytterhoeven
2017-09-07 8:33 ` Geert Uytterhoeven
2017-09-07 8:41 ` Dirk Behme [this message]
2017-09-07 8:41 ` Dirk Behme
2017-09-06 7:05 ` [PATCH 5/8] spi: sh-msiof: Wait for Tx FIFO empty after DMA Dirk Behme
2017-09-06 17:57 ` Sergei Shtylyov
2017-09-07 8:34 ` Geert Uytterhoeven
2017-09-07 8:34 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 6/8] spi: sh-msiof: Add MSIOF parent clock changing function for R-Car Gen3 Dirk Behme
2017-09-07 8:38 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 7/8] spi: sh-msiof: Fix gpio function Dirk Behme
2017-09-06 7:05 ` Dirk Behme
2017-09-07 8:24 ` Geert Uytterhoeven
2017-09-06 7:05 ` [PATCH 8/8] spi: sh-msiof: Add registers reset Dirk Behme
2017-09-06 7:05 ` Dirk Behme
2017-09-06 18:11 ` Sergei Shtylyov
2017-09-07 8:11 ` Geert Uytterhoeven
2017-09-07 8:11 ` Geert Uytterhoeven
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