From: Ulf Hansson <ulf.hansson@linaro.org>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
linux-sunxi <linux-sunxi@googlegroups.com>,
"# 4.0+" <stable@vger.kernel.org>
Subject: Re: [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode
Date: Mon, 17 Jul 2017 12:37:41 +0200 [thread overview]
Message-ID: <CAPDyKFq0xgZCuow41-VsN+5bORt_pBAqZ_ZAajWG-TcCPxvRSA@mail.gmail.com> (raw)
In-Reply-To: <20170714064302.20383-5-wens@csie.org>
+stable
On 14 July 2017 at 08:42, Chen-Yu Tsai <wens@csie.org> wrote:
> The register for the "new timing mode" also has bit fields for setting
> output and sample timing phases. According to comments in Allwinner's
> BSP kernel, the default values are good enough.
>
> Keep the default values already in the hardware when setting new timing
> mode, instead of overwriting the whole register.
>
> Fixes: 9a37e53e451e ("mmc: sunxi: Enable the new timings for the A64 MMC
> controllers")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Thanks, applied for fixes and added a stable tag.
Kind regards
Uffe
> ---
> drivers/mmc/host/sunxi-mmc.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
> index d6fa2214aaae..0fb4e4c119e1 100644
> --- a/drivers/mmc/host/sunxi-mmc.c
> +++ b/drivers/mmc/host/sunxi-mmc.c
> @@ -793,8 +793,12 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
> }
> mmc_writel(host, REG_CLKCR, rval);
>
> - if (host->cfg->needs_new_timings)
> - mmc_writel(host, REG_SD_NTSR, SDXC_2X_TIMING_MODE);
> + if (host->cfg->needs_new_timings) {
> + /* Don't touch the delay bits */
> + rval = mmc_readl(host, REG_SD_NTSR);
> + rval |= SDXC_2X_TIMING_MODE;
> + mmc_writel(host, REG_SD_NTSR, rval);
> + }
>
> ret = sunxi_mmc_clk_set_phase(host, ios, rate);
> if (ret)
> --
> 2.13.2
>
WARNING: multiple messages have this Message-ID (diff)
From: Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-clk <linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>,
"# 4.0+" <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode
Date: Mon, 17 Jul 2017 12:37:41 +0200 [thread overview]
Message-ID: <CAPDyKFq0xgZCuow41-VsN+5bORt_pBAqZ_ZAajWG-TcCPxvRSA@mail.gmail.com> (raw)
In-Reply-To: <20170714064302.20383-5-wens-jdAy2FN1RRM@public.gmane.org>
+stable
On 14 July 2017 at 08:42, Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org> wrote:
> The register for the "new timing mode" also has bit fields for setting
> output and sample timing phases. According to comments in Allwinner's
> BSP kernel, the default values are good enough.
>
> Keep the default values already in the hardware when setting new timing
> mode, instead of overwriting the whole register.
>
> Fixes: 9a37e53e451e ("mmc: sunxi: Enable the new timings for the A64 MMC
> controllers")
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Thanks, applied for fixes and added a stable tag.
Kind regards
Uffe
> ---
> drivers/mmc/host/sunxi-mmc.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
> index d6fa2214aaae..0fb4e4c119e1 100644
> --- a/drivers/mmc/host/sunxi-mmc.c
> +++ b/drivers/mmc/host/sunxi-mmc.c
> @@ -793,8 +793,12 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
> }
> mmc_writel(host, REG_CLKCR, rval);
>
> - if (host->cfg->needs_new_timings)
> - mmc_writel(host, REG_SD_NTSR, SDXC_2X_TIMING_MODE);
> + if (host->cfg->needs_new_timings) {
> + /* Don't touch the delay bits */
> + rval = mmc_readl(host, REG_SD_NTSR);
> + rval |= SDXC_2X_TIMING_MODE;
> + mmc_writel(host, REG_SD_NTSR, rval);
> + }
>
> ret = sunxi_mmc_clk_set_phase(host, ios, rate);
> if (ret)
> --
> 2.13.2
>
WARNING: multiple messages have this Message-ID (diff)
From: ulf.hansson@linaro.org (Ulf Hansson)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode
Date: Mon, 17 Jul 2017 12:37:41 +0200 [thread overview]
Message-ID: <CAPDyKFq0xgZCuow41-VsN+5bORt_pBAqZ_ZAajWG-TcCPxvRSA@mail.gmail.com> (raw)
In-Reply-To: <20170714064302.20383-5-wens@csie.org>
+stable
On 14 July 2017 at 08:42, Chen-Yu Tsai <wens@csie.org> wrote:
> The register for the "new timing mode" also has bit fields for setting
> output and sample timing phases. According to comments in Allwinner's
> BSP kernel, the default values are good enough.
>
> Keep the default values already in the hardware when setting new timing
> mode, instead of overwriting the whole register.
>
> Fixes: 9a37e53e451e ("mmc: sunxi: Enable the new timings for the A64 MMC
> controllers")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Thanks, applied for fixes and added a stable tag.
Kind regards
Uffe
> ---
> drivers/mmc/host/sunxi-mmc.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
> index d6fa2214aaae..0fb4e4c119e1 100644
> --- a/drivers/mmc/host/sunxi-mmc.c
> +++ b/drivers/mmc/host/sunxi-mmc.c
> @@ -793,8 +793,12 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
> }
> mmc_writel(host, REG_CLKCR, rval);
>
> - if (host->cfg->needs_new_timings)
> - mmc_writel(host, REG_SD_NTSR, SDXC_2X_TIMING_MODE);
> + if (host->cfg->needs_new_timings) {
> + /* Don't touch the delay bits */
> + rval = mmc_readl(host, REG_SD_NTSR);
> + rval |= SDXC_2X_TIMING_MODE;
> + mmc_writel(host, REG_SD_NTSR, rval);
> + }
>
> ret = sunxi_mmc_clk_set_phase(host, ios, rate);
> if (ret)
> --
> 2.13.2
>
next prev parent reply other threads:[~2017-07-17 10:37 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-14 6:42 [PATCH 00/11] ARM: sun8i: a83t: Add support for MMC controllers Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` [PATCH 01/11] ARM: dts: sun8i: a83t: Switch to CCU device tree binding macros Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-17 9:06 ` Maxime Ripard
2017-07-17 9:06 ` Maxime Ripard
2017-07-17 9:06 ` Maxime Ripard
2017-07-14 6:42 ` [PATCH 02/11] clk: sunxi-ng: Add interface to query or configure MMC timing modes Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-17 9:09 ` Maxime Ripard
2017-07-17 9:09 ` Maxime Ripard
2017-07-17 9:09 ` Maxime Ripard
2017-07-14 6:42 ` [PATCH 03/11] clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-17 9:14 ` Maxime Ripard
2017-07-17 9:14 ` Maxime Ripard
2017-07-17 9:14 ` Maxime Ripard
2017-07-17 10:12 ` Chen-Yu Tsai
2017-07-17 10:12 ` Chen-Yu Tsai
2017-07-17 10:12 ` Chen-Yu Tsai
2017-07-18 14:47 ` Maxime Ripard
2017-07-18 14:47 ` Maxime Ripard
2017-07-14 6:42 ` [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 9:16 ` Ulf Hansson
2017-07-14 9:16 ` Ulf Hansson
2017-07-14 9:16 ` Ulf Hansson
2017-07-14 9:16 ` Ulf Hansson
2017-07-14 9:44 ` Chen-Yu Tsai
2017-07-14 9:44 ` Chen-Yu Tsai
2017-07-14 9:44 ` Chen-Yu Tsai
2017-07-14 9:44 ` Chen-Yu Tsai
2017-07-17 9:14 ` Maxime Ripard
2017-07-17 9:14 ` Maxime Ripard
2017-07-17 9:14 ` Maxime Ripard
2017-07-17 10:37 ` Ulf Hansson [this message]
2017-07-17 10:37 ` Ulf Hansson
2017-07-17 10:37 ` Ulf Hansson
2017-07-17 10:37 ` Ulf Hansson
2017-07-14 6:42 ` [PATCH 05/11] mmc: sunxi: Support controllers that can use both old and new timings Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 9:26 ` Ulf Hansson
2017-07-14 9:26 ` Ulf Hansson
2017-07-14 9:26 ` Ulf Hansson
2017-07-14 9:26 ` Ulf Hansson
2017-07-14 9:40 ` Chen-Yu Tsai
2017-07-14 9:40 ` Chen-Yu Tsai
2017-07-14 9:40 ` Chen-Yu Tsai
2017-07-14 9:40 ` Chen-Yu Tsai
2017-07-14 9:57 ` Ulf Hansson
2017-07-14 9:57 ` Ulf Hansson
2017-07-14 9:57 ` Ulf Hansson
2017-07-17 9:20 ` Maxime Ripard
2017-07-17 9:20 ` Maxime Ripard
2017-07-17 9:20 ` Maxime Ripard
2017-07-17 9:20 ` Maxime Ripard
2017-07-17 9:17 ` Maxime Ripard
2017-07-17 9:17 ` Maxime Ripard
2017-07-17 9:17 ` Maxime Ripard
2017-07-19 8:59 ` Chen-Yu Tsai
2017-07-19 8:59 ` Chen-Yu Tsai
2017-07-19 8:59 ` Chen-Yu Tsai
2017-07-19 11:28 ` Maxime Ripard
2017-07-19 11:28 ` Maxime Ripard
2017-07-19 11:28 ` Maxime Ripard
2017-07-17 13:10 ` kbuild test robot
2017-07-17 13:10 ` kbuild test robot
2017-07-17 13:10 ` kbuild test robot
2017-07-14 6:42 ` [PATCH 06/11] mmc: sunxi: Support MMC DDR52 transfer mode with new timing mode Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` [PATCH 07/11] mmc: sunxi: Add support for A83T eMMC (MMC2) Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-17 18:51 ` Rob Herring
2017-07-17 18:51 ` Rob Herring
2017-07-14 6:42 ` [PATCH 08/11] ARM: dts: sun8i: a83t: Add MMC controller device nodes Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-14 6:42 ` Chen-Yu Tsai
2017-07-17 9:22 ` Maxime Ripard
2017-07-17 9:22 ` Maxime Ripard
2017-07-17 9:22 ` Maxime Ripard
2017-07-14 6:43 ` [PATCH 09/11] ARM: dts: sun8i: a83t: Add pingroup for 8-bit eMMC on mmc2 Chen-Yu Tsai
2017-07-14 6:43 ` Chen-Yu Tsai
2017-07-14 6:43 ` Chen-Yu Tsai
2017-07-14 6:43 ` [PATCH 10/11] ARM: dts: sun8i: a83t: cubietruck-plus: Enable micro-SD card and eMMC Chen-Yu Tsai
2017-07-14 6:43 ` Chen-Yu Tsai
2017-07-14 6:43 ` Chen-Yu Tsai
2017-07-14 6:43 ` [PATCH 11/11] ARM: dts: sun8i: a83t: h8homlet: Enable micro-SD card and onboard eMMC Chen-Yu Tsai
2017-07-14 6:43 ` Chen-Yu Tsai
2017-07-14 6:43 ` Chen-Yu Tsai
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