From: Thierry Reding <thierry.reding@gmail.com>
To: Peter Geis <pgwipeout@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Sameer Pujar <spujar@nvidia.com>,
Mohan Kumar <mkumard@nvidia.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org,
Ion Agorria <ion@agorria.com>
Subject: Re: [PATCH v2 1/2] clk: tegra30: Add hda clock default rates to clock driver
Date: Tue, 12 Jan 2021 13:58:28 +0100 [thread overview]
Message-ID: <X/2c9BiqgURAJWCa@ulmo> (raw)
In-Reply-To: <20210108135913.2421585-2-pgwipeout@gmail.com>
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On Fri, Jan 08, 2021 at 01:59:12PM +0000, Peter Geis wrote:
> Current implementation defaults the hda clocks to clk_m. This causes hda
> to run too slow to operate correctly. Fix this by defaulting to pll_p and
> setting the frequency to the correct rate.
>
> This matches upstream t124 and downstream t30.
>
> Acked-by: Jon Hunter <jonathanh@nvidia.com>
> Tested-by: Ion Agorria <ion@agorria.com>
> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> ---
> drivers/clk/tegra/clk-tegra30.c | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Thierry Reding <treding@nvidia.com>
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Peter Geis <pgwipeout@gmail.com>
Cc: alsa-devel@alsa-project.org,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Sameer Pujar <spujar@nvidia.com>, Stephen Boyd <sboyd@kernel.org>,
linux-kernel@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org, Takashi Iwai <tiwai@suse.com>,
Ion Agorria <ion@agorria.com>,
linux-tegra@vger.kernel.org, Mohan Kumar <mkumard@nvidia.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>
Subject: Re: [PATCH v2 1/2] clk: tegra30: Add hda clock default rates to clock driver
Date: Tue, 12 Jan 2021 13:58:28 +0100 [thread overview]
Message-ID: <X/2c9BiqgURAJWCa@ulmo> (raw)
In-Reply-To: <20210108135913.2421585-2-pgwipeout@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 595 bytes --]
On Fri, Jan 08, 2021 at 01:59:12PM +0000, Peter Geis wrote:
> Current implementation defaults the hda clocks to clk_m. This causes hda
> to run too slow to operate correctly. Fix this by defaulting to pll_p and
> setting the frequency to the correct rate.
>
> This matches upstream t124 and downstream t30.
>
> Acked-by: Jon Hunter <jonathanh@nvidia.com>
> Tested-by: Ion Agorria <ion@agorria.com>
> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> ---
> drivers/clk/tegra/clk-tegra30.c | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Thierry Reding <treding@nvidia.com>
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next prev parent reply other threads:[~2021-01-12 12:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-08 13:59 [PATCH v2 0/2] fix tegra-hda on tegra30 devices Peter Geis
2021-01-08 13:59 ` Peter Geis
2021-01-08 13:59 ` [PATCH v2 1/2] clk: tegra30: Add hda clock default rates to clock driver Peter Geis
2021-01-08 13:59 ` Peter Geis
2021-01-08 15:13 ` Sameer Pujar
2021-01-08 15:13 ` Sameer Pujar
2021-01-12 12:58 ` Thierry Reding [this message]
2021-01-12 12:58 ` Thierry Reding
2021-01-08 13:59 ` [PATCH v2 2/2] ALSA: hda/tegra: fix tegra-hda on tegra30 soc Peter Geis
2021-01-08 13:59 ` Peter Geis
2021-01-08 15:15 ` Sameer Pujar
2021-01-08 15:15 ` Sameer Pujar
2021-01-12 12:58 ` Thierry Reding
2021-01-12 12:58 ` Thierry Reding
2021-01-12 8:22 ` [PATCH v2 0/2] fix tegra-hda on tegra30 devices Takashi Iwai
2021-01-12 8:22 ` Takashi Iwai
2021-01-12 13:00 ` Thierry Reding
2021-01-12 13:00 ` Thierry Reding
2021-01-12 13:46 ` Takashi Iwai
2021-01-12 13:46 ` Takashi Iwai
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