All of lore.kernel.org
 help / color / mirror / Atom feed
From: Johan Hovold <johan@kernel.org>
To: Abel Vesa <abel.vesa@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"vkoul@kernel.org" <vkoul@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Johan Hovold" <johan+linaro@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 10/11] PCI: qcom: Add SM8550 PCIe support
Date: Wed, 8 Feb 2023 17:58:35 +0100	[thread overview]
Message-ID: <Y+PUuy0qbO9EWOXb@hovoldconsulting.com> (raw)
In-Reply-To: <20230206212619.3218741-11-abel.vesa@linaro.org>

On Mon, Feb 06, 2023 at 11:26:18PM +0200, Abel Vesa wrote:
> Add compatible for both PCIe found on SM8550.
> Also add the noc_aggr and cnoc_sf_axi clocks needed by the SM8550.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
> ---

> @@ -1237,17 +1239,17 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
>  	if (ret < 0)
>  		goto err_disable_regulators;
>  
> -	ret = reset_control_assert(res->pci_reset);
> -	if (ret < 0) {
> -		dev_err(dev, "cannot assert pci reset\n");
> +	ret = reset_control_assert(res->rst);
> +	if (ret) {
> +		dev_err(dev, "reset assert failed (%d)\n", ret);
>  		goto err_disable_clocks;
>  	}
>  
>  	usleep_range(1000, 1500);
>  
> -	ret = reset_control_deassert(res->pci_reset);
> -	if (ret < 0) {
> -		dev_err(dev, "cannot deassert pci reset\n");
> +	ret = reset_control_deassert(res->rst);
> +	if (ret) {
> +		dev_err(dev, "reset deassert failed (%d)\n", ret);
>  		goto err_disable_clocks;
>  	}

I'd still like to know if it's indeed ok the deassert the 'pci' reset
before the new 'link_down' reset here which is what this code currently
would do (i.e. same order as for assert, while if you had used the bulk
reset API it would have deasserted in the reverse order).

Other than that:

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Johan Hovold <johan@kernel.org>
To: Abel Vesa <abel.vesa@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"vkoul@kernel.org" <vkoul@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Johan Hovold" <johan+linaro@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 10/11] PCI: qcom: Add SM8550 PCIe support
Date: Wed, 8 Feb 2023 17:58:35 +0100	[thread overview]
Message-ID: <Y+PUuy0qbO9EWOXb@hovoldconsulting.com> (raw)
In-Reply-To: <20230206212619.3218741-11-abel.vesa@linaro.org>

On Mon, Feb 06, 2023 at 11:26:18PM +0200, Abel Vesa wrote:
> Add compatible for both PCIe found on SM8550.
> Also add the noc_aggr and cnoc_sf_axi clocks needed by the SM8550.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
> ---

> @@ -1237,17 +1239,17 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
>  	if (ret < 0)
>  		goto err_disable_regulators;
>  
> -	ret = reset_control_assert(res->pci_reset);
> -	if (ret < 0) {
> -		dev_err(dev, "cannot assert pci reset\n");
> +	ret = reset_control_assert(res->rst);
> +	if (ret) {
> +		dev_err(dev, "reset assert failed (%d)\n", ret);
>  		goto err_disable_clocks;
>  	}
>  
>  	usleep_range(1000, 1500);
>  
> -	ret = reset_control_deassert(res->pci_reset);
> -	if (ret < 0) {
> -		dev_err(dev, "cannot deassert pci reset\n");
> +	ret = reset_control_deassert(res->rst);
> +	if (ret) {
> +		dev_err(dev, "reset deassert failed (%d)\n", ret);
>  		goto err_disable_clocks;
>  	}

I'd still like to know if it's indeed ok the deassert the 'pci' reset
before the new 'link_down' reset here which is what this code currently
would do (i.e. same order as for assert, while if you had used the bulk
reset API it would have deasserted in the reverse order).

Other than that:

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2023-02-08 16:58 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-06 21:26 [PATCH v8 00/11] sm8550: Add PCIe HC and PHY support Abel Vesa
2023-02-06 21:26 ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 01/11] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 02/11] phy: qcom-qmp: pcs: Add v6 register offsets Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 03/11] phy: qcom-qmp: pcs: Add v6.20 " Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 04/11] phy: qcom-qmp: pcs-pcie: Add v6 " Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 05/11] phy: qcom-qmp: pcs-pcie: Add v6.20 " Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 06/11] phy: qcom-qmp: qserdes-txrx: " Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 07/11] phy: qcom-qmp: qserdes-lane-shared: Add v6 " Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 08/11] phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-08 16:48   ` Johan Hovold
2023-02-08 16:48     ` Johan Hovold
2023-02-06 21:26 ` [PATCH v8 09/11] dt-bindings: PCI: qcom: Add SM8550 compatible Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-06 21:26 ` [PATCH v8 10/11] PCI: qcom: Add SM8550 PCIe support Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-08 16:58   ` Johan Hovold [this message]
2023-02-08 16:58     ` Johan Hovold
2023-02-06 21:26 ` [PATCH v8 11/11] arm64: dts: qcom: sm8550: Fix PCIe PHYs and controllers nodes Abel Vesa
2023-02-06 21:26   ` Abel Vesa
2023-02-08 17:02   ` Johan Hovold
2023-02-08 17:02     ` Johan Hovold

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Y+PUuy0qbO9EWOXb@hovoldconsulting.com \
    --to=johan@kernel.org \
    --cc=abel.vesa@linaro.org \
    --cc=agross@kernel.org \
    --cc=andersson@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=johan+linaro@kernel.org \
    --cc=kishon@kernel.org \
    --cc=konrad.dybcio@linaro.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=kw@linux.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=mani@kernel.org \
    --cc=robh@kernel.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.