Re: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI controller

From: Mark Brown <broonie@kernel.org>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: nandhini.srikandan@intel.com,
	Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	robh+dt@kernel.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	mgross@linux.intel.com, kris.pan@intel.com,
	kenchappa.demakkanavar@intel.com, furong.zhou@intel.com,
	mallikarjunappa.sangannavar@intel.com, mahesh.r.vaidya@intel.com,
	rashmi.a@intel.com
Subject: Re: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI controller
Date: Thu, 11 Nov 2021 15:01:12 +0000	[thread overview]
Message-ID: <YY0wOBoT7X//GfQ8@sirena.org.uk> (raw)
In-Reply-To: <20211111143108.pxovseqvm2ywmoc2@mobilestation>

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On Thu, Nov 11, 2021 at 05:31:08PM +0300, Serge Semin wrote:

> BTW Mark, why not to have a generic DT-property which would set that
> flag automatically by the SPI-core subsystem seeing it's indeed a
> client device-property? For instance there can be some property like
> "spi-cs-toggle" DT-property which when specified for the particular
> SPI-client DT-node will make the SPI-core subsystem to set the

Anything like this is fundamentally part of the wire protocol for the
device, there's no need for an extra property on top of the compatible
for the device and the driver really, really needs to know what's going
on to avoid data corruption.  You could also use this feature together
with varying the word size as an optimisation at runtime (eg, do long
sequences of register writes in a single hardware operation by setting
an appropriate word length to cause the controller to bounce chip
select between writes).

> SPI_CS_WORD flag of the device mode? Like it has already been done for
> "spi-cs-high"/"spi-lsb-first"/etc.

I don't think either of those properties was a good idea, there's a
bunch of stuff in the older SPI bindings that don't make much sense.

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