All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mark Brown <broonie@kernel.org>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	nandhini.srikandan@intel.com, robh+dt@kernel.org,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, mgross@linux.intel.com,
	kris.pan@intel.com, kenchappa.demakkanavar@intel.com,
	furong.zhou@intel.com, mallikarjunappa.sangannavar@intel.com,
	mahesh.r.vaidya@intel.com, rashmi.a@intel.com
Subject: Re: [PATCH v3 3/5] spi: dw: Add support for master mode selection for DWC SSI controller
Date: Thu, 11 Nov 2021 15:14:26 +0000	[thread overview]
Message-ID: <YY0zUjjVobtg85o6@sirena.org.uk> (raw)
In-Reply-To: <20211111145246.dj4gogl4rlbem6qc@mobilestation>

[-- Attachment #1: Type: text/plain, Size: 1525 bytes --]

On Thu, Nov 11, 2021 at 05:52:46PM +0300, Serge Semin wrote:
> On Thu, Nov 11, 2021 at 02:16:05PM +0000, Mark Brown wrote:
> > On Thu, Nov 11, 2021 at 02:51:59PM +0800, nandhini.srikandan@intel.com wrote:

> > > Add support to select the controller mode as master mode by setting
> > > Bit 31 of CTRLR0 register. This feature is supported for controller
> > > versions above v1.02.

> > Clearly older versions of the controller can also run in this mode...

> Yes, but the driver doesn't support the slave mode at the moment.
> So always enabling the master mode seems natural. (see my next comment
> also concerning this matter)

The commit message makes it sound like master mode is only supported for
the newer versions.

> > This makes the configuration unconditional, it's not gated by controller
> > version checks or any kind of quirk any more meaning that if anything

> We have already discussed this feature in v2:
> https://patchwork.kernel.org/project/spi-devel-general/patch/20210824085856.12714-3-nandhini.srikandan@intel.com/
> Since that bit has been reserved before 1.02a but is no available for
> any DWC SSI controller and the driver doesn't support the SPI-slave mode
> at the moment I suggested to just always set that flag for the DWC SSI
> code. Please see my reply to Nandhini here:

Given that people seem to frequently customise these IPs when
integrating them I wouldn't trust people not to have added some other
control into that reserved bit doing some magic stuff that's useful in
their system.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

  reply	other threads:[~2021-11-11 15:14 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-11  6:51 [PATCH v3 0/5] Add support for Intel Thunder Bay SPI controller nandhini.srikandan
2021-11-11  6:51 ` [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI controller nandhini.srikandan
2021-11-11 13:53   ` Mark Brown
2021-11-11 14:31   ` Serge Semin
2021-11-11 15:01     ` Mark Brown
2021-11-11 15:06       ` Serge Semin
2021-11-17 12:05         ` Srikandan, Nandhini
2021-11-11  6:51 ` [PATCH v3 2/5] spi: dw: " nandhini.srikandan
2021-11-11 13:56   ` Mark Brown
2021-11-11 14:16     ` Serge Semin
2021-11-11 14:42   ` Serge Semin
2021-11-11  6:51 ` [PATCH v3 3/5] spi: dw: Add support for master mode selection " nandhini.srikandan
2021-11-11 14:16   ` Mark Brown
2021-11-11 14:52     ` Serge Semin
2021-11-11 15:14       ` Mark Brown [this message]
2021-11-11 16:06         ` Serge Semin
2021-11-11 16:25           ` Mark Brown
2021-11-16 19:15             ` Serge Semin
2021-11-17 11:59               ` Srikandan, Nandhini
2021-12-08 11:03                 ` Srikandan, Nandhini
2021-12-09  8:40                   ` Serge Semin
2021-11-11  6:52 ` [PATCH v3 4/5] dt-bindings: spi: Add bindings for Intel Thunder Bay SoC nandhini.srikandan
2021-11-19 16:55   ` Rob Herring
2021-11-11  6:52 ` [PATCH v3 5/5] spi: dw: Add support for Intel Thunder Bay SPI controller nandhini.srikandan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YY0zUjjVobtg85o6@sirena.org.uk \
    --to=broonie@kernel.org \
    --cc=Sergey.Semin@baikalelectronics.ru \
    --cc=devicetree@vger.kernel.org \
    --cc=fancer.lancer@gmail.com \
    --cc=furong.zhou@intel.com \
    --cc=kenchappa.demakkanavar@intel.com \
    --cc=kris.pan@intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=mahesh.r.vaidya@intel.com \
    --cc=mallikarjunappa.sangannavar@intel.com \
    --cc=mgross@linux.intel.com \
    --cc=nandhini.srikandan@intel.com \
    --cc=rashmi.a@intel.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.