From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> To: Sunil V L <sunilvl@ventanamicro.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, Sunil V L <sunil.vl@gmail.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Thomas Gleixner <tglx@linutronix.de>, Atish Patra <atishp@rivosinc.com>, Anup Patel <apatel@ventanamicro.com>, Marc Zyngier <maz@kernel.org>, Ard Biesheuvel <ardb@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com> Subject: Re: [PATCH 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Date: Wed, 25 May 2022 17:17:17 +0200 [thread overview] Message-ID: <09b050e3-b8e2-fc58-c4cf-e1c81c5eac84@canonical.com> (raw) In-Reply-To: <20220525151106.2176147-2-sunilvl@ventanamicro.com> On 5/25/22 17:11, Sunil V L wrote: > The hartid can be a 64bit value on RV64 platforms. This patch modifies > the hartid variable type to unsigned long so that it can hold 64bit > value on RV64 platforms. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> > --- > arch/riscv/kernel/cpu_ops_sbi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c > index 4f5a6f84e2a4..efa0f0816634 100644 > --- a/arch/riscv/kernel/cpu_ops_sbi.c > +++ b/arch/riscv/kernel/cpu_ops_sbi.c > @@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid) > static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle) > { > unsigned long boot_addr = __pa_symbol(secondary_start_sbi); > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > unsigned long hsm_data; > struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid); > > @@ -107,7 +107,7 @@ static void sbi_cpu_stop(void) > static int sbi_cpu_is_stopped(unsigned int cpuid) > { > int rc; > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > > rc = sbi_hsm_hart_get_status(hartid); >
WARNING: multiple messages have this Message-ID (diff)
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> To: Sunil V L <sunilvl@ventanamicro.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, Sunil V L <sunil.vl@gmail.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Thomas Gleixner <tglx@linutronix.de>, Atish Patra <atishp@rivosinc.com>, Anup Patel <apatel@ventanamicro.com>, Marc Zyngier <maz@kernel.org>, Ard Biesheuvel <ardb@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com> Subject: Re: [PATCH 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Date: Wed, 25 May 2022 17:17:17 +0200 [thread overview] Message-ID: <09b050e3-b8e2-fc58-c4cf-e1c81c5eac84@canonical.com> (raw) In-Reply-To: <20220525151106.2176147-2-sunilvl@ventanamicro.com> On 5/25/22 17:11, Sunil V L wrote: > The hartid can be a 64bit value on RV64 platforms. This patch modifies > the hartid variable type to unsigned long so that it can hold 64bit > value on RV64 platforms. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> > --- > arch/riscv/kernel/cpu_ops_sbi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c > index 4f5a6f84e2a4..efa0f0816634 100644 > --- a/arch/riscv/kernel/cpu_ops_sbi.c > +++ b/arch/riscv/kernel/cpu_ops_sbi.c > @@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid) > static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle) > { > unsigned long boot_addr = __pa_symbol(secondary_start_sbi); > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > unsigned long hsm_data; > struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid); > > @@ -107,7 +107,7 @@ static void sbi_cpu_stop(void) > static int sbi_cpu_is_stopped(unsigned int cpuid) > { > int rc; > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > > rc = sbi_hsm_hart_get_status(hartid); > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-05-25 15:17 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-25 15:11 [PATCH 0/5] Support for 64bit hartid on RV64 platforms Sunil V L 2022-05-25 15:11 ` Sunil V L 2022-05-25 15:11 ` [PATCH 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Sunil V L 2022-05-25 15:11 ` Sunil V L 2022-05-25 15:17 ` Heinrich Schuchardt [this message] 2022-05-25 15:17 ` Heinrich Schuchardt 2022-05-25 15:11 ` [PATCH 2/5] riscv: cpu_ops_spinwait: " Sunil V L 2022-05-25 15:11 ` Sunil V L 2022-05-25 15:27 ` Heinrich Schuchardt 2022-05-25 15:27 ` Heinrich Schuchardt 2022-05-26 10:15 ` Sunil V L 2022-05-26 10:15 ` Sunil V L 2022-05-25 15:11 ` [PATCH 3/5] riscv: smp: " Sunil V L 2022-05-25 15:11 ` Sunil V L 2022-05-25 15:58 ` Heinrich Schuchardt 2022-05-25 15:58 ` Heinrich Schuchardt 2022-05-25 15:11 ` [PATCH 4/5] riscv: cpu: " Sunil V L 2022-05-25 15:11 ` Sunil V L 2022-05-25 15:11 ` [PATCH 5/5] riscv/efi_stub: Support for 64bit boot-hartid Sunil V L 2022-05-25 15:11 ` Sunil V L 2022-05-25 15:48 ` Ard Biesheuvel 2022-05-25 15:48 ` Ard Biesheuvel 2022-05-25 16:09 ` Heinrich Schuchardt 2022-05-25 16:09 ` Heinrich Schuchardt 2022-05-25 23:11 ` Atish Patra 2022-05-25 23:11 ` Atish Patra 2022-05-25 23:36 ` Jessica Clarke 2022-05-25 23:36 ` Jessica Clarke 2022-05-25 23:49 ` Atish Patra 2022-05-25 23:49 ` Atish Patra 2022-05-26 0:06 ` Jessica Clarke 2022-05-26 0:06 ` Jessica Clarke 2022-05-26 10:13 ` Sunil V L 2022-05-26 10:13 ` Sunil V L
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