RE: [PATCH 7/9] KVM: PPC: Emulate trap SRR1 flags properly

["Liu Yu-B13201" <B13201-KZfg59tc24xl57MIdRCFDg@public.gmane.org>]

 

> -----Original Message-----
> From: kvm-ppc-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org 
> [mailto:kvm-ppc-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf Of Hollis Blanchard
> Sent: Saturday, January 09, 2010 3:30 AM
> To: Alexander Graf
> Cc: kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; kvm-ppc; Benjamin Herrenschmidt; Liu Yu
> Subject: Re: [PATCH 7/9] KVM: PPC: Emulate trap SRR1 flags properly
> 
> > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
> > index 338baf9..e283e44 100644
> > --- a/arch/powerpc/kvm/booke.c
> > +++ b/arch/powerpc/kvm/booke.c
> > @@ -82,8 +82,9 @@ static void 
> kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
> >        set_bit(priority, &vcpu->arch.pending_exceptions);
> >  }
> >
> > -void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
> > +void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
> >  {
> > +       /* BookE does flags in ESR, so ignore those we get here */
> >        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
> >  }
> 
> Actually, I think Book E prematurely sets ESR, since it's done before
> the program interrupt is actually delivered. Architecturally, I'm not
> sure if it's a problem, but philosophically I've always wanted it to
> work the way you've just implemented for Book S.
> 

ESR is updated not only by program but by data_tlb, data_storage, etc.
Should we rearrange them all? 
Also DEAR has the same situation as ESR.
Should it be updated when we decide to inject interrupt to guest?