From: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> To: mst@redhat.com Cc: joro@8bytes.org, blauwirbel@gmail.com, paul@codesourcery.com, avi@redhat.com, anthony@codemonkey.ws, av1474@comtv.ru, yamahata@valinux.co.jp, kvm@vger.kernel.org, qemu-devel@nongnu.org, Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> Subject: [PATCH 5/7] rtl8139: use the PCI memory access interface Date: Sat, 28 Aug 2010 17:54:56 +0300 [thread overview] Message-ID: <1283007298-10942-6-git-send-email-eduard.munteanu@linux360.ro> (raw) In-Reply-To: <1283007298-10942-1-git-send-email-eduard.munteanu@linux360.ro> This allows the device to work properly with an emulated IOMMU. Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> --- hw/rtl8139.c | 99 ++++++++++++++++++++++++++++++++------------------------- 1 files changed, 56 insertions(+), 43 deletions(-) diff --git a/hw/rtl8139.c b/hw/rtl8139.c index d92981d..32dbff3 100644 --- a/hw/rtl8139.c +++ b/hw/rtl8139.c @@ -412,12 +412,6 @@ typedef struct RTL8139TallyCounters uint16_t TxUndrn; } RTL8139TallyCounters; -/* Clears all tally counters */ -static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters); - -/* Writes tally counters to specified physical memory address */ -static void RTL8139TallyCounters_physical_memory_write(target_phys_addr_t tc_addr, RTL8139TallyCounters* counters); - typedef struct RTL8139State { PCIDevice dev; uint8_t phys[8]; /* mac address */ @@ -496,6 +490,14 @@ typedef struct RTL8139State { } RTL8139State; +/* Clears all tally counters */ +static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters); + +/* Writes tally counters to specified physical memory address */ +static void +RTL8139TallyCounters_physical_memory_write(RTL8139State *s, + target_phys_addr_t tc_addr); + static void rtl8139_set_next_tctr_time(RTL8139State *s, int64_t current_time); static void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command) @@ -746,6 +748,8 @@ static int rtl8139_cp_transmitter_enabled(RTL8139State *s) static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) { + PCIDevice *dev = &s->dev; + if (s->RxBufAddr + size > s->RxBufferSize) { int wrapped = MOD2(s->RxBufAddr + size, s->RxBufferSize); @@ -757,15 +761,15 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) if (size > wrapped) { - cpu_physical_memory_write( s->RxBuf + s->RxBufAddr, - buf, size-wrapped ); + pci_memory_write(dev, s->RxBuf + s->RxBufAddr, + buf, size-wrapped); } /* reset buffer pointer */ s->RxBufAddr = 0; - cpu_physical_memory_write( s->RxBuf + s->RxBufAddr, - buf + (size-wrapped), wrapped ); + pci_memory_write(dev, s->RxBuf + s->RxBufAddr, + buf + (size-wrapped), wrapped); s->RxBufAddr = wrapped; @@ -774,7 +778,7 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) } /* non-wrapping path or overwrapping enabled */ - cpu_physical_memory_write( s->RxBuf + s->RxBufAddr, buf, size ); + pci_memory_write(dev, s->RxBuf + s->RxBufAddr, buf, size); s->RxBufAddr += size; } @@ -814,6 +818,7 @@ static int rtl8139_can_receive(VLANClientState *nc) static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_t size_, int do_interrupt) { RTL8139State *s = DO_UPCAST(NICState, nc, nc)->opaque; + PCIDevice *dev = &s->dev; int size = size_; uint32_t packet_header = 0; @@ -968,13 +973,13 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ uint32_t val, rxdw0,rxdw1,rxbufLO,rxbufHI; - cpu_physical_memory_read(cplus_rx_ring_desc, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc, (uint8_t *)&val, 4); rxdw0 = le32_to_cpu(val); - cpu_physical_memory_read(cplus_rx_ring_desc+4, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc+4, (uint8_t *)&val, 4); rxdw1 = le32_to_cpu(val); - cpu_physical_memory_read(cplus_rx_ring_desc+8, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc+8, (uint8_t *)&val, 4); rxbufLO = le32_to_cpu(val); - cpu_physical_memory_read(cplus_rx_ring_desc+12, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc+12, (uint8_t *)&val, 4); rxbufHI = le32_to_cpu(val); DEBUG_PRINT(("RTL8139: +++ C+ mode RX descriptor %d %08x %08x %08x %08x\n", @@ -1019,7 +1024,7 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ target_phys_addr_t rx_addr = rtl8139_addr64(rxbufLO, rxbufHI); /* receive/copy to target memory */ - cpu_physical_memory_write( rx_addr, buf, size ); + pci_memory_write(dev, rx_addr, buf, size); if (s->CpCmd & CPlusRxChkSum) { @@ -1032,7 +1037,7 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ #else val = 0; #endif - cpu_physical_memory_write( rx_addr+size, (uint8_t *)&val, 4); + pci_memory_write(dev, rx_addr + size, (uint8_t *)&val, 4); /* first segment of received packet flag */ #define CP_RX_STATUS_FS (1<<29) @@ -1081,9 +1086,9 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ /* update ring data */ val = cpu_to_le32(rxdw0); - cpu_physical_memory_write(cplus_rx_ring_desc, (uint8_t *)&val, 4); + pci_memory_write(dev, cplus_rx_ring_desc, (uint8_t *)&val, 4); val = cpu_to_le32(rxdw1); - cpu_physical_memory_write(cplus_rx_ring_desc+4, (uint8_t *)&val, 4); + pci_memory_write(dev, cplus_rx_ring_desc+4, (uint8_t *)&val, 4); /* update tally counter */ ++s->tally_counters.RxOk; @@ -1279,50 +1284,54 @@ static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters) counters->TxUndrn = 0; } -static void RTL8139TallyCounters_physical_memory_write(target_phys_addr_t tc_addr, RTL8139TallyCounters* tally_counters) +static void +RTL8139TallyCounters_physical_memory_write(RTL8139State *s, + target_phys_addr_t tc_addr) { + PCIDevice *dev = &s->dev; + RTL8139TallyCounters *tally_counters = &s->tally_counters; uint16_t val16; uint32_t val32; uint64_t val64; val64 = cpu_to_le64(tally_counters->TxOk); - cpu_physical_memory_write(tc_addr + 0, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 0, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->RxOk); - cpu_physical_memory_write(tc_addr + 8, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 8, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->TxERR); - cpu_physical_memory_write(tc_addr + 16, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 16, (uint8_t *)&val64, 8); val32 = cpu_to_le32(tally_counters->RxERR); - cpu_physical_memory_write(tc_addr + 24, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 24, (uint8_t *)&val32, 4); val16 = cpu_to_le16(tally_counters->MissPkt); - cpu_physical_memory_write(tc_addr + 28, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 28, (uint8_t *)&val16, 2); val16 = cpu_to_le16(tally_counters->FAE); - cpu_physical_memory_write(tc_addr + 30, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 30, (uint8_t *)&val16, 2); val32 = cpu_to_le32(tally_counters->Tx1Col); - cpu_physical_memory_write(tc_addr + 32, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 32, (uint8_t *)&val32, 4); val32 = cpu_to_le32(tally_counters->TxMCol); - cpu_physical_memory_write(tc_addr + 36, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 36, (uint8_t *)&val32, 4); val64 = cpu_to_le64(tally_counters->RxOkPhy); - cpu_physical_memory_write(tc_addr + 40, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 40, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->RxOkBrd); - cpu_physical_memory_write(tc_addr + 48, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 48, (uint8_t *)&val64, 8); val32 = cpu_to_le32(tally_counters->RxOkMul); - cpu_physical_memory_write(tc_addr + 56, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 56, (uint8_t *)&val32, 4); val16 = cpu_to_le16(tally_counters->TxAbt); - cpu_physical_memory_write(tc_addr + 60, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 60, (uint8_t *)&val16, 2); val16 = cpu_to_le16(tally_counters->TxUndrn); - cpu_physical_memory_write(tc_addr + 62, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 62, (uint8_t *)&val16, 2); } /* Loads values of tally counters from VM state file */ @@ -1758,6 +1767,8 @@ static void rtl8139_transfer_frame(RTL8139State *s, const uint8_t *buf, int size static int rtl8139_transmit_one(RTL8139State *s, int descriptor) { + PCIDevice *dev = &s->dev; + if (!rtl8139_transmitter_enabled(s)) { DEBUG_PRINT(("RTL8139: +++ cannot transmit from descriptor %d: transmitter disabled\n", @@ -1780,7 +1791,7 @@ static int rtl8139_transmit_one(RTL8139State *s, int descriptor) DEBUG_PRINT(("RTL8139: +++ transmit reading %d bytes from host memory at 0x%08x\n", txsize, s->TxAddr[descriptor])); - cpu_physical_memory_read(s->TxAddr[descriptor], txbuffer, txsize); + pci_memory_read(dev, s->TxAddr[descriptor], txbuffer, txsize); /* Mark descriptor as transferred */ s->TxStatus[descriptor] |= TxHostOwns; @@ -1886,6 +1897,8 @@ static uint16_t ip_checksum(void *data, size_t len) static int rtl8139_cplus_transmit_one(RTL8139State *s) { + PCIDevice *dev = &s->dev; + if (!rtl8139_transmitter_enabled(s)) { DEBUG_PRINT(("RTL8139: +++ C+ mode: transmitter disabled\n")); @@ -1911,14 +1924,14 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) uint32_t val, txdw0,txdw1,txbufLO,txbufHI; - cpu_physical_memory_read(cplus_tx_ring_desc, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc, (uint8_t *)&val, 4); txdw0 = le32_to_cpu(val); /* TODO: implement VLAN tagging support, VLAN tag data is read to txdw1 */ - cpu_physical_memory_read(cplus_tx_ring_desc+4, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc+4, (uint8_t *)&val, 4); txdw1 = le32_to_cpu(val); - cpu_physical_memory_read(cplus_tx_ring_desc+8, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc+8, (uint8_t *)&val, 4); txbufLO = le32_to_cpu(val); - cpu_physical_memory_read(cplus_tx_ring_desc+12, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc+12, (uint8_t *)&val, 4); txbufHI = le32_to_cpu(val); DEBUG_PRINT(("RTL8139: +++ C+ mode TX descriptor %d %08x %08x %08x %08x\n", @@ -2025,7 +2038,8 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) DEBUG_PRINT(("RTL8139: +++ C+ mode transmit reading %d bytes from host memory at %016" PRIx64 " to offset %d\n", txsize, (uint64_t)tx_addr, s->cplus_txbuffer_offset)); - cpu_physical_memory_read(tx_addr, s->cplus_txbuffer + s->cplus_txbuffer_offset, txsize); + pci_memory_read(dev, tx_addr, + s->cplus_txbuffer + s->cplus_txbuffer_offset, txsize); s->cplus_txbuffer_offset += txsize; /* seek to next Rx descriptor */ @@ -2052,10 +2066,10 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) /* update ring data */ val = cpu_to_le32(txdw0); - cpu_physical_memory_write(cplus_tx_ring_desc, (uint8_t *)&val, 4); + pci_memory_write(dev, cplus_tx_ring_desc, (uint8_t *)&val, 4); /* TODO: implement VLAN tagging support, VLAN tag data is read to txdw1 */ // val = cpu_to_le32(txdw1); -// cpu_physical_memory_write(cplus_tx_ring_desc+4, &val, 4); +// pci_memory_write(dev, cplus_tx_ring_desc+4, &val, 4); /* Now decide if descriptor being processed is holding the last segment of packet */ if (txdw0 & CP_TX_LS) @@ -2364,7 +2378,6 @@ static void rtl8139_transmit(RTL8139State *s) static void rtl8139_TxStatus_write(RTL8139State *s, uint32_t txRegOffset, uint32_t val) { - int descriptor = txRegOffset/4; /* handle C+ transmit mode register configuration */ @@ -2381,7 +2394,7 @@ static void rtl8139_TxStatus_write(RTL8139State *s, uint32_t txRegOffset, uint32 target_phys_addr_t tc_addr = rtl8139_addr64(s->TxStatus[0] & ~0x3f, s->TxStatus[1]); /* dump tally counters to specified memory location */ - RTL8139TallyCounters_physical_memory_write( tc_addr, &s->tally_counters); + RTL8139TallyCounters_physical_memory_write(s, tc_addr); /* mark dump completed */ s->TxStatus[0] &= ~0x8; -- 1.7.1
WARNING: multiple messages have this Message-ID (diff)
From: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> To: mst@redhat.com Cc: kvm@vger.kernel.org, joro@8bytes.org, qemu-devel@nongnu.org, blauwirbel@gmail.com, yamahata@valinux.co.jp, paul@codesourcery.com, Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>, avi@redhat.com Subject: [Qemu-devel] [PATCH 5/7] rtl8139: use the PCI memory access interface Date: Sat, 28 Aug 2010 17:54:56 +0300 [thread overview] Message-ID: <1283007298-10942-6-git-send-email-eduard.munteanu@linux360.ro> (raw) In-Reply-To: <1283007298-10942-1-git-send-email-eduard.munteanu@linux360.ro> This allows the device to work properly with an emulated IOMMU. Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> --- hw/rtl8139.c | 99 ++++++++++++++++++++++++++++++++------------------------- 1 files changed, 56 insertions(+), 43 deletions(-) diff --git a/hw/rtl8139.c b/hw/rtl8139.c index d92981d..32dbff3 100644 --- a/hw/rtl8139.c +++ b/hw/rtl8139.c @@ -412,12 +412,6 @@ typedef struct RTL8139TallyCounters uint16_t TxUndrn; } RTL8139TallyCounters; -/* Clears all tally counters */ -static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters); - -/* Writes tally counters to specified physical memory address */ -static void RTL8139TallyCounters_physical_memory_write(target_phys_addr_t tc_addr, RTL8139TallyCounters* counters); - typedef struct RTL8139State { PCIDevice dev; uint8_t phys[8]; /* mac address */ @@ -496,6 +490,14 @@ typedef struct RTL8139State { } RTL8139State; +/* Clears all tally counters */ +static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters); + +/* Writes tally counters to specified physical memory address */ +static void +RTL8139TallyCounters_physical_memory_write(RTL8139State *s, + target_phys_addr_t tc_addr); + static void rtl8139_set_next_tctr_time(RTL8139State *s, int64_t current_time); static void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command) @@ -746,6 +748,8 @@ static int rtl8139_cp_transmitter_enabled(RTL8139State *s) static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) { + PCIDevice *dev = &s->dev; + if (s->RxBufAddr + size > s->RxBufferSize) { int wrapped = MOD2(s->RxBufAddr + size, s->RxBufferSize); @@ -757,15 +761,15 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) if (size > wrapped) { - cpu_physical_memory_write( s->RxBuf + s->RxBufAddr, - buf, size-wrapped ); + pci_memory_write(dev, s->RxBuf + s->RxBufAddr, + buf, size-wrapped); } /* reset buffer pointer */ s->RxBufAddr = 0; - cpu_physical_memory_write( s->RxBuf + s->RxBufAddr, - buf + (size-wrapped), wrapped ); + pci_memory_write(dev, s->RxBuf + s->RxBufAddr, + buf + (size-wrapped), wrapped); s->RxBufAddr = wrapped; @@ -774,7 +778,7 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) } /* non-wrapping path or overwrapping enabled */ - cpu_physical_memory_write( s->RxBuf + s->RxBufAddr, buf, size ); + pci_memory_write(dev, s->RxBuf + s->RxBufAddr, buf, size); s->RxBufAddr += size; } @@ -814,6 +818,7 @@ static int rtl8139_can_receive(VLANClientState *nc) static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_t size_, int do_interrupt) { RTL8139State *s = DO_UPCAST(NICState, nc, nc)->opaque; + PCIDevice *dev = &s->dev; int size = size_; uint32_t packet_header = 0; @@ -968,13 +973,13 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ uint32_t val, rxdw0,rxdw1,rxbufLO,rxbufHI; - cpu_physical_memory_read(cplus_rx_ring_desc, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc, (uint8_t *)&val, 4); rxdw0 = le32_to_cpu(val); - cpu_physical_memory_read(cplus_rx_ring_desc+4, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc+4, (uint8_t *)&val, 4); rxdw1 = le32_to_cpu(val); - cpu_physical_memory_read(cplus_rx_ring_desc+8, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc+8, (uint8_t *)&val, 4); rxbufLO = le32_to_cpu(val); - cpu_physical_memory_read(cplus_rx_ring_desc+12, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_rx_ring_desc+12, (uint8_t *)&val, 4); rxbufHI = le32_to_cpu(val); DEBUG_PRINT(("RTL8139: +++ C+ mode RX descriptor %d %08x %08x %08x %08x\n", @@ -1019,7 +1024,7 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ target_phys_addr_t rx_addr = rtl8139_addr64(rxbufLO, rxbufHI); /* receive/copy to target memory */ - cpu_physical_memory_write( rx_addr, buf, size ); + pci_memory_write(dev, rx_addr, buf, size); if (s->CpCmd & CPlusRxChkSum) { @@ -1032,7 +1037,7 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ #else val = 0; #endif - cpu_physical_memory_write( rx_addr+size, (uint8_t *)&val, 4); + pci_memory_write(dev, rx_addr + size, (uint8_t *)&val, 4); /* first segment of received packet flag */ #define CP_RX_STATUS_FS (1<<29) @@ -1081,9 +1086,9 @@ static ssize_t rtl8139_do_receive(VLANClientState *nc, const uint8_t *buf, size_ /* update ring data */ val = cpu_to_le32(rxdw0); - cpu_physical_memory_write(cplus_rx_ring_desc, (uint8_t *)&val, 4); + pci_memory_write(dev, cplus_rx_ring_desc, (uint8_t *)&val, 4); val = cpu_to_le32(rxdw1); - cpu_physical_memory_write(cplus_rx_ring_desc+4, (uint8_t *)&val, 4); + pci_memory_write(dev, cplus_rx_ring_desc+4, (uint8_t *)&val, 4); /* update tally counter */ ++s->tally_counters.RxOk; @@ -1279,50 +1284,54 @@ static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters) counters->TxUndrn = 0; } -static void RTL8139TallyCounters_physical_memory_write(target_phys_addr_t tc_addr, RTL8139TallyCounters* tally_counters) +static void +RTL8139TallyCounters_physical_memory_write(RTL8139State *s, + target_phys_addr_t tc_addr) { + PCIDevice *dev = &s->dev; + RTL8139TallyCounters *tally_counters = &s->tally_counters; uint16_t val16; uint32_t val32; uint64_t val64; val64 = cpu_to_le64(tally_counters->TxOk); - cpu_physical_memory_write(tc_addr + 0, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 0, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->RxOk); - cpu_physical_memory_write(tc_addr + 8, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 8, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->TxERR); - cpu_physical_memory_write(tc_addr + 16, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 16, (uint8_t *)&val64, 8); val32 = cpu_to_le32(tally_counters->RxERR); - cpu_physical_memory_write(tc_addr + 24, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 24, (uint8_t *)&val32, 4); val16 = cpu_to_le16(tally_counters->MissPkt); - cpu_physical_memory_write(tc_addr + 28, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 28, (uint8_t *)&val16, 2); val16 = cpu_to_le16(tally_counters->FAE); - cpu_physical_memory_write(tc_addr + 30, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 30, (uint8_t *)&val16, 2); val32 = cpu_to_le32(tally_counters->Tx1Col); - cpu_physical_memory_write(tc_addr + 32, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 32, (uint8_t *)&val32, 4); val32 = cpu_to_le32(tally_counters->TxMCol); - cpu_physical_memory_write(tc_addr + 36, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 36, (uint8_t *)&val32, 4); val64 = cpu_to_le64(tally_counters->RxOkPhy); - cpu_physical_memory_write(tc_addr + 40, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 40, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->RxOkBrd); - cpu_physical_memory_write(tc_addr + 48, (uint8_t *)&val64, 8); + pci_memory_write(dev, tc_addr + 48, (uint8_t *)&val64, 8); val32 = cpu_to_le32(tally_counters->RxOkMul); - cpu_physical_memory_write(tc_addr + 56, (uint8_t *)&val32, 4); + pci_memory_write(dev, tc_addr + 56, (uint8_t *)&val32, 4); val16 = cpu_to_le16(tally_counters->TxAbt); - cpu_physical_memory_write(tc_addr + 60, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 60, (uint8_t *)&val16, 2); val16 = cpu_to_le16(tally_counters->TxUndrn); - cpu_physical_memory_write(tc_addr + 62, (uint8_t *)&val16, 2); + pci_memory_write(dev, tc_addr + 62, (uint8_t *)&val16, 2); } /* Loads values of tally counters from VM state file */ @@ -1758,6 +1767,8 @@ static void rtl8139_transfer_frame(RTL8139State *s, const uint8_t *buf, int size static int rtl8139_transmit_one(RTL8139State *s, int descriptor) { + PCIDevice *dev = &s->dev; + if (!rtl8139_transmitter_enabled(s)) { DEBUG_PRINT(("RTL8139: +++ cannot transmit from descriptor %d: transmitter disabled\n", @@ -1780,7 +1791,7 @@ static int rtl8139_transmit_one(RTL8139State *s, int descriptor) DEBUG_PRINT(("RTL8139: +++ transmit reading %d bytes from host memory at 0x%08x\n", txsize, s->TxAddr[descriptor])); - cpu_physical_memory_read(s->TxAddr[descriptor], txbuffer, txsize); + pci_memory_read(dev, s->TxAddr[descriptor], txbuffer, txsize); /* Mark descriptor as transferred */ s->TxStatus[descriptor] |= TxHostOwns; @@ -1886,6 +1897,8 @@ static uint16_t ip_checksum(void *data, size_t len) static int rtl8139_cplus_transmit_one(RTL8139State *s) { + PCIDevice *dev = &s->dev; + if (!rtl8139_transmitter_enabled(s)) { DEBUG_PRINT(("RTL8139: +++ C+ mode: transmitter disabled\n")); @@ -1911,14 +1924,14 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) uint32_t val, txdw0,txdw1,txbufLO,txbufHI; - cpu_physical_memory_read(cplus_tx_ring_desc, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc, (uint8_t *)&val, 4); txdw0 = le32_to_cpu(val); /* TODO: implement VLAN tagging support, VLAN tag data is read to txdw1 */ - cpu_physical_memory_read(cplus_tx_ring_desc+4, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc+4, (uint8_t *)&val, 4); txdw1 = le32_to_cpu(val); - cpu_physical_memory_read(cplus_tx_ring_desc+8, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc+8, (uint8_t *)&val, 4); txbufLO = le32_to_cpu(val); - cpu_physical_memory_read(cplus_tx_ring_desc+12, (uint8_t *)&val, 4); + pci_memory_read(dev, cplus_tx_ring_desc+12, (uint8_t *)&val, 4); txbufHI = le32_to_cpu(val); DEBUG_PRINT(("RTL8139: +++ C+ mode TX descriptor %d %08x %08x %08x %08x\n", @@ -2025,7 +2038,8 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) DEBUG_PRINT(("RTL8139: +++ C+ mode transmit reading %d bytes from host memory at %016" PRIx64 " to offset %d\n", txsize, (uint64_t)tx_addr, s->cplus_txbuffer_offset)); - cpu_physical_memory_read(tx_addr, s->cplus_txbuffer + s->cplus_txbuffer_offset, txsize); + pci_memory_read(dev, tx_addr, + s->cplus_txbuffer + s->cplus_txbuffer_offset, txsize); s->cplus_txbuffer_offset += txsize; /* seek to next Rx descriptor */ @@ -2052,10 +2066,10 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) /* update ring data */ val = cpu_to_le32(txdw0); - cpu_physical_memory_write(cplus_tx_ring_desc, (uint8_t *)&val, 4); + pci_memory_write(dev, cplus_tx_ring_desc, (uint8_t *)&val, 4); /* TODO: implement VLAN tagging support, VLAN tag data is read to txdw1 */ // val = cpu_to_le32(txdw1); -// cpu_physical_memory_write(cplus_tx_ring_desc+4, &val, 4); +// pci_memory_write(dev, cplus_tx_ring_desc+4, &val, 4); /* Now decide if descriptor being processed is holding the last segment of packet */ if (txdw0 & CP_TX_LS) @@ -2364,7 +2378,6 @@ static void rtl8139_transmit(RTL8139State *s) static void rtl8139_TxStatus_write(RTL8139State *s, uint32_t txRegOffset, uint32_t val) { - int descriptor = txRegOffset/4; /* handle C+ transmit mode register configuration */ @@ -2381,7 +2394,7 @@ static void rtl8139_TxStatus_write(RTL8139State *s, uint32_t txRegOffset, uint32 target_phys_addr_t tc_addr = rtl8139_addr64(s->TxStatus[0] & ~0x3f, s->TxStatus[1]); /* dump tally counters to specified memory location */ - RTL8139TallyCounters_physical_memory_write( tc_addr, &s->tally_counters); + RTL8139TallyCounters_physical_memory_write(s, tc_addr); /* mark dump completed */ s->TxStatus[0] &= ~0x8; -- 1.7.1
next prev parent reply other threads:[~2010-08-28 14:56 UTC|newest] Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top 2010-08-28 14:54 [PATCH 0/7] AMD IOMMU emulation patchset v4 Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [PATCH 1/7] pci: expand tabs to spaces in pci_regs.h Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-08-31 20:29 ` Michael S. Tsirkin 2010-08-31 20:29 ` [Qemu-devel] " Michael S. Tsirkin 2010-08-31 22:58 ` Eduard - Gabriel Munteanu 2010-08-31 22:58 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-01 10:39 ` Michael S. Tsirkin 2010-09-01 10:39 ` [Qemu-devel] " Michael S. Tsirkin 2010-08-28 14:54 ` [PATCH 2/7] pci: memory access API and IOMMU support Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-02 5:28 ` Michael S. Tsirkin 2010-09-02 5:28 ` [Qemu-devel] " Michael S. Tsirkin 2010-09-02 8:40 ` Eduard - Gabriel Munteanu 2010-09-02 8:40 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-02 9:49 ` Michael S. Tsirkin 2010-09-02 9:49 ` [Qemu-devel] " Michael S. Tsirkin 2010-09-04 9:01 ` Blue Swirl 2010-09-04 9:01 ` [Qemu-devel] " Blue Swirl 2010-09-05 7:10 ` Michael S. Tsirkin 2010-09-05 7:10 ` [Qemu-devel] " Michael S. Tsirkin 2010-08-28 14:54 ` [PATCH 3/7] AMD IOMMU emulation Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-08-28 15:58 ` Blue Swirl 2010-08-28 15:58 ` [Qemu-devel] " Blue Swirl 2010-08-28 21:53 ` Eduard - Gabriel Munteanu 2010-08-28 21:53 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-08-29 20:37 ` Blue Swirl 2010-08-29 20:37 ` [Qemu-devel] " Blue Swirl 2010-08-30 3:07 ` [Qemu-devel] " Isaku Yamahata 2010-08-30 3:07 ` Isaku Yamahata 2010-08-30 5:54 ` Eduard - Gabriel Munteanu 2010-08-30 5:54 ` Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [PATCH 4/7] ide: use the PCI memory access interface Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-02 5:19 ` Michael S. Tsirkin 2010-09-02 5:19 ` [Qemu-devel] " Michael S. Tsirkin 2010-09-02 9:12 ` Eduard - Gabriel Munteanu 2010-09-02 9:12 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-02 9:58 ` Michael S. Tsirkin 2010-09-02 9:58 ` [Qemu-devel] " Michael S. Tsirkin 2010-09-02 15:01 ` Eduard - Gabriel Munteanu 2010-09-02 15:01 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-02 15:24 ` Avi Kivity 2010-09-02 15:24 ` [Qemu-devel] " Avi Kivity 2010-09-02 15:39 ` Michael S. Tsirkin 2010-09-02 15:39 ` [Qemu-devel] " Michael S. Tsirkin 2010-09-02 16:07 ` Avi Kivity 2010-09-02 16:07 ` [Qemu-devel] " Avi Kivity 2010-09-02 15:31 ` Michael S. Tsirkin 2010-09-02 15:31 ` [Qemu-devel] " Michael S. Tsirkin 2010-08-28 14:54 ` Eduard - Gabriel Munteanu [this message] 2010-08-28 14:54 ` [Qemu-devel] [PATCH 5/7] rtl8139: " Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [PATCH 6/7] eepro100: " Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [PATCH 7/7] ac97: " Eduard - Gabriel Munteanu 2010-08-28 14:54 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-08-28 16:00 ` [PATCH 0/7] AMD IOMMU emulation patchset v4 Blue Swirl 2010-08-28 16:00 ` [Qemu-devel] " Blue Swirl 2010-08-29 9:55 ` Joerg Roedel 2010-08-29 9:55 ` [Qemu-devel] " Joerg Roedel 2010-08-29 20:44 ` Blue Swirl 2010-08-29 20:44 ` [Qemu-devel] " Blue Swirl 2010-08-29 22:08 ` [PATCH 2/7] pci: memory access API and IOMMU support Eduard - Gabriel Munteanu 2010-08-29 22:08 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-08-29 22:11 ` Eduard - Gabriel Munteanu 2010-08-29 22:11 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-01 20:10 ` [Qemu-devel] " Stefan Weil 2010-09-01 20:10 ` Stefan Weil 2010-09-02 6:00 ` Michael S. Tsirkin 2010-09-02 6:00 ` Michael S. Tsirkin 2010-09-02 9:08 ` Eduard - Gabriel Munteanu 2010-09-02 9:08 ` Eduard - Gabriel Munteanu 2010-09-02 13:24 ` Anthony Liguori 2010-09-02 13:24 ` Anthony Liguori 2010-09-02 8:51 ` Eduard - Gabriel Munteanu 2010-09-02 8:51 ` Eduard - Gabriel Munteanu 2010-09-02 16:05 ` Stefan Weil 2010-09-02 16:05 ` Stefan Weil 2010-09-02 16:14 ` Eduard - Gabriel Munteanu 2010-09-02 16:14 ` Eduard - Gabriel Munteanu 2010-09-13 20:01 ` [PATCH RFC] dma_rw.h (was Re: [PATCH 0/7] AMD IOMMU emulation patchset v4) Michael S. Tsirkin 2010-09-13 20:01 ` [Qemu-devel] " Michael S. Tsirkin 2010-09-13 20:45 ` Anthony Liguori 2010-09-13 20:45 ` Anthony Liguori 2010-09-16 7:12 ` Eduard - Gabriel Munteanu 2010-09-16 7:12 ` Eduard - Gabriel Munteanu 2010-09-16 9:35 ` Michael S. Tsirkin 2010-09-16 9:35 ` Michael S. Tsirkin 2010-09-16 7:06 ` Eduard - Gabriel Munteanu 2010-09-16 7:06 ` [Qemu-devel] " Eduard - Gabriel Munteanu 2010-09-16 9:20 ` Michael S. Tsirkin 2010-09-16 9:20 ` [Qemu-devel] " Michael S. Tsirkin 2010-09-16 11:15 ` Eduard - Gabriel Munteanu 2010-09-16 11:15 ` [Qemu-devel] " Eduard - Gabriel Munteanu -- strict thread matches above, loose matches on Subject: below -- 2010-08-15 19:27 [PATCH 0/7] AMD IOMMU emulation patches v3 Eduard - Gabriel Munteanu 2010-08-15 19:27 ` [PATCH 5/7] rtl8139: use the PCI memory access interface Eduard - Gabriel Munteanu
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