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* [PATCH 00/17] gtt rework, part2 : pte handling
@ 2010-09-13 22:34 Daniel Vetter
  2010-09-13 22:34 ` [PATCH 01/17] intel-gtt: initialize our own scratch page Daniel Vetter
                   ` (16 more replies)
  0 siblings, 17 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:34 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Hi all,

The next part of my intel gtt rework. This creates a new abstraction
for the pte handling, resulting in:
- A generic fake agp driver for all chipsets (save the poor bastard i81x).
- Less indirection hell for the pte writing (a simpel write_entry instead
  of iowrite32(mask_memory(type_to_mask))).

Of course there's still a bit left to clean up in intel-gtt.c (Chris Wilson
is busy adding things to my todo list). But I think this is a nice cut
point for the current release cycle. The next one can then concern itself
with better integration with gem and a few other loose ends on a hopefully
well-tested basis.

As usual, tested on i855 (with -fixes merged in), i945 and my ilk. Comments
highly welcome. Altough I refuse to accept responsability for headaches
from reading the (old) code in intel-gtt.c ;)

Yours, Daniel

Daniel Vetter (17):
  intel-gtt: initialize our own scratch page
  intel-gtt: introduce pte write function for i8xx/i915/i945
  intel-gtt: introduce pte write function for g33/i965/gm45
  intel-gtt: introduce pte write function for gen6
  intel-gtt: drop agp scratch page support stuff
  agp: kill agp_(map|unmap)_page
  intel-gtt: generic (insert|remove)_entries for i830
  intel-gtt: generic (insert|remove)_entries for i915
  intel-gtt: generic (insert|remove)_entries for g33/i965
  intel-gtt: generic (insert|remove)_entries for sandybridge
  intel-gtt: kill mask_memory functions
  intel-gtt: move chipset flush to the gtt driver struct
  intel-gtt: consolidate fake_agp driver structs
  agp: kill agp_(unmap|map)_memory
  intel-gtt: clean up gtt size reporting
  intel-gtt: store the dma mask size in intel_gtt_driver
  intel-gtt add a cleanup function for chipset specific stuff

 drivers/char/agp/agp.h          |    5 -
 drivers/char/agp/backend.c      |   22 +--
 drivers/char/agp/generic.c      |    8 -
 drivers/char/agp/intel-gtt.c    |  751 +++++++++++++++-----------------------
 drivers/gpu/drm/i915/i915_dma.c |    1 -
 include/drm/intel-gtt.h         |    2 -
 6 files changed, 298 insertions(+), 491 deletions(-)

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 01/17] intel-gtt: initialize our own scratch page
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
@ 2010-09-13 22:34 ` Daniel Vetter
  2010-09-13 22:34 ` [PATCH 02/17] intel-gtt: introduce pte write function for i8xx/i915/i945 Daniel Vetter
                   ` (15 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:34 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

The intel gtt fake agp driver is the only agp driver to use dma
address remapping. So it makes sense to fold this code back into the
only user (and thus reduce the reliance on the agp code).

This patch does the first step by initializing (and remapping) the
scratch page in a new function intel_gtt_setup_scratch_page.
Unfortunately intel_gtt_cleanup had to move to avoid a forward
declaration. The new scratch page is not yet used, though.

v2: Refactor out scratch page teardown.  Suggested by Chris Wilson on
irc. This makes it clear what's going on and results in a nice
symmetry between setup and teardown.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   81 +++++++++++++++++++++++++++++++++---------
 1 files changed, 64 insertions(+), 17 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 9cb7c98..af920b5 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -35,6 +35,8 @@
  */
 #ifdef CONFIG_DMAR
 #define USE_PCI_DMA_API 1
+#else
+#define USE_PCI_DMA_API 0
 #endif
 
 /* Max amount of stolen space, anything above will be returned to Linux */
@@ -107,6 +109,8 @@ static struct _intel_private {
 	struct page *i8xx_page;
 	struct resource ifp_resource;
 	int resource_valid;
+	struct page *scratch_page;
+	dma_addr_t scratch_page_dma;
 } intel_private;
 
 #define INTEL_GTT_GEN	intel_private.driver->gen
@@ -114,7 +118,7 @@ static struct _intel_private {
 #define IS_PINEVIEW	intel_private.driver->is_pineview
 #define IS_IRONLAKE	intel_private.driver->is_ironlake
 
-#ifdef USE_PCI_DMA_API
+#if USE_PCI_DMA_API
 static int intel_agp_map_page(struct page *page, dma_addr_t *ret)
 {
 	*ret = pci_map_page(intel_private.pcidev, page, 0,
@@ -539,6 +543,32 @@ static unsigned long intel_i810_mask_memory(struct agp_bridge_data *bridge,
 	return addr | bridge->driver->masks[type].mask;
 }
 
+static int intel_gtt_setup_scratch_page(void)
+{
+	struct page *page;
+	dma_addr_t dma_addr;
+
+	page = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
+	if (page == NULL)
+		return -ENOMEM;
+	get_page(page);
+	set_pages_uc(page, 1);
+
+	if (USE_PCI_DMA_API && INTEL_GTT_GEN > 2) {
+		dma_addr = pci_map_page(intel_private.pcidev, page, 0,
+				    PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+		if (pci_dma_mapping_error(intel_private.pcidev, dma_addr))
+			return -EINVAL;
+
+		intel_private.scratch_page_dma = dma_addr;
+	} else
+		intel_private.scratch_page_dma = page_to_phys(page);
+
+	intel_private.scratch_page = page;
+
+	return 0;
+}
+
 static struct aper_size_info_fixed intel_fake_agp_sizes[] =
 {
 	{128, 32768, 5},
@@ -795,6 +825,29 @@ static unsigned int intel_gtt_mappable_entries(void)
 	return aperture_size >> PAGE_SHIFT;
 }
 
+static void intel_gtt_teardown_scratch_page(void)
+{
+	set_pages_wb(intel_private.scratch_page, 1);
+	pci_unmap_page(intel_private.pcidev, intel_private.scratch_page_dma,
+		       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+	put_page(intel_private.scratch_page);
+	__free_page(intel_private.scratch_page);
+}
+
+static void intel_gtt_cleanup(void)
+{
+	if (intel_private.i9xx_flush_page)
+		iounmap(intel_private.i9xx_flush_page);
+	if (intel_private.resource_valid)
+		release_resource(&intel_private.ifp_resource);
+	intel_private.ifp_resource.start = 0;
+	intel_private.resource_valid = 0;
+	iounmap(intel_private.gtt);
+	iounmap(intel_private.registers);
+	
+	intel_gtt_teardown_scratch_page();
+}
+
 static int intel_gtt_init(void)
 {
 	u32 gtt_map_size;
@@ -828,6 +881,12 @@ static int intel_gtt_init(void)
 		return -ENOMEM;
 	}
 
+	ret = intel_gtt_setup_scratch_page();
+	if (ret != 0) {
+		intel_gtt_cleanup();
+		return ret;
+	}
+
 	return 0;
 }
 
@@ -1175,18 +1234,6 @@ static int intel_i9xx_configure(void)
 	return 0;
 }
 
-static void intel_gtt_cleanup(void)
-{
-	if (intel_private.i9xx_flush_page)
-		iounmap(intel_private.i9xx_flush_page);
-	if (intel_private.resource_valid)
-		release_resource(&intel_private.ifp_resource);
-	intel_private.ifp_resource.start = 0;
-	intel_private.resource_valid = 0;
-	iounmap(intel_private.gtt);
-	iounmap(intel_private.registers);
-}
-
 static void intel_i915_chipset_flush(struct agp_bridge_data *bridge)
 {
 	if (intel_private.i9xx_flush_page)
@@ -1413,7 +1460,7 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type  = intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#ifdef USE_PCI_DMA_API
+#if USE_PCI_DMA_API
 	.agp_map_page		= intel_agp_map_page,
 	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
@@ -1446,7 +1493,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#ifdef USE_PCI_DMA_API
+#if USE_PCI_DMA_API
 	.agp_map_page		= intel_agp_map_page,
 	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
@@ -1479,7 +1526,7 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type	= intel_gen6_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#ifdef USE_PCI_DMA_API
+#if USE_PCI_DMA_API
 	.agp_map_page		= intel_agp_map_page,
 	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
@@ -1512,7 +1559,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#ifdef USE_PCI_DMA_API
+#if USE_PCI_DMA_API
 	.agp_map_page		= intel_agp_map_page,
 	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 02/17] intel-gtt: introduce pte write function for i8xx/i915/i945
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
  2010-09-13 22:34 ` [PATCH 01/17] intel-gtt: initialize our own scratch page Daniel Vetter
@ 2010-09-13 22:34 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 03/17] intel-gtt: introduce pte write function for g33/i965/gm45 Daniel Vetter
                   ` (14 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:34 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

And put it to use in the gtt configuration code that writes
the scratch page addr in all gtt ptes. This makes intel_i830_configure
generic, hence rename it to intel_fake_agp_configure.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   41 ++++++++++++++++++++++++++++++++---------
 1 files changed, 32 insertions(+), 9 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index af920b5..59fad22 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -90,6 +90,10 @@ struct intel_gtt_driver {
 	unsigned int is_ironlake : 1;
 	/* Chipset specific GTT setup */
 	int (*setup)(void);
+	void (*write_entry)(dma_addr_t addr, unsigned int entry, unsigned int flags);
+	/* Flags is a more or less chipset specific opaque value.
+	 * For chipsets that need to support old ums (non-gem) code, this
+	 * needs to be identical to the various supported agp memory types! */
 };
 
 static struct _intel_private {
@@ -956,6 +960,23 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
 		printk(KERN_ERR "Timed out waiting for cache flush.\n");
 }
 
+static void i830_write_entry(dma_addr_t addr, unsigned int entry,
+			     unsigned int flags)
+{
+	u32 pte_flags = I810_PTE_VALID;
+	
+	switch (flags) {
+	case AGP_DCACHE_MEMORY:
+		pte_flags |= I810_PTE_LOCAL;
+		break;
+	case AGP_USER_CACHED_MEMORY:
+		pte_flags |= I830_PTE_SYSTEM_CACHED;
+		break;
+	}
+
+	writel(addr | pte_flags, intel_private.gtt + entry);
+}
+
 static void intel_enable_gtt(void)
 {
 	u32 ptetbl_addr, gma_addr;
@@ -1012,7 +1033,7 @@ static int intel_fake_agp_free_gatt_table(struct agp_bridge_data *bridge)
 	return 0;
 }
 
-static int intel_i830_configure(void)
+static int intel_fake_agp_configure(void)
 {
 	int i;
 
@@ -1020,13 +1041,12 @@ static int intel_i830_configure(void)
 
 	agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
 
-	if (agp_bridge->driver->needs_scratch_page) {
-		for (i = intel_private.base.gtt_stolen_entries;
-				i < intel_private.base.gtt_total_entries; i++) {
-			writel(agp_bridge->scratch_page, intel_private.gtt+i);
-		}
-		readl(intel_private.gtt+i-1);	/* PCI Posting. */
+	for (i = intel_private.base.gtt_stolen_entries;
+			i < intel_private.base.gtt_total_entries; i++) {
+		intel_private.driver->write_entry(intel_private.scratch_page_dma,
+						  i, 0);
 	}
+	readl(intel_private.gtt+i-1);	/* PCI Posting. */
 
 	global_cache_flush();
 
@@ -1414,7 +1434,7 @@ static const struct agp_bridge_driver intel_830_driver = {
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
 	.needs_scratch_page	= true,
-	.configure		= intel_i830_configure,
+	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
 	.mask_memory		= intel_i810_mask_memory,
@@ -1441,7 +1461,7 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
 	.needs_scratch_page	= true,
-	.configure		= intel_i9xx_configure,
+	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
 	.mask_memory		= intel_i810_mask_memory,
@@ -1570,10 +1590,13 @@ static const struct agp_bridge_driver intel_g33_driver = {
 static const struct intel_gtt_driver i8xx_gtt_driver = {
 	.gen = 2,
 	.setup = i830_setup,
+	.write_entry = i830_write_entry,
 };
 static const struct intel_gtt_driver i915_gtt_driver = {
 	.gen = 3,
 	.setup = i9xx_setup,
+	/* i945 is the last gpu to need phys mem (for overlay and cursors). */
+	.write_entry = i830_write_entry, 
 };
 static const struct intel_gtt_driver g33_gtt_driver = {
 	.gen = 3,
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 03/17] intel-gtt: introduce pte write function for g33/i965/gm45
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
  2010-09-13 22:34 ` [PATCH 01/17] intel-gtt: initialize our own scratch page Daniel Vetter
  2010-09-13 22:34 ` [PATCH 02/17] intel-gtt: introduce pte write function for i8xx/i915/i945 Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 04/17] intel-gtt: introduce pte write function for gen6 Daniel Vetter
                   ` (13 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Like for the i830.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   17 +++++++++++++++--
 1 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 59fad22..89dcc0b 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1335,6 +1335,14 @@ static int intel_i915_remove_entries(struct agp_memory *mem, off_t pg_start,
 	return 0;
 }
 
+static void i965_write_entry(dma_addr_t addr, unsigned int entry,
+			     unsigned int flags)
+{
+	/* Shift high bits down */
+	addr |= (addr >> 28) & 0xf0;
+	writel(addr | I810_PTE_VALID, intel_private.gtt + entry);
+}
+
 static int i9xx_setup(void)
 {
 	u32 reg_addr;
@@ -1494,7 +1502,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
 	.needs_scratch_page	= true,
-	.configure		= intel_i9xx_configure,
+	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
 	.mask_memory		= intel_i965_mask_memory,
@@ -1560,7 +1568,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
 	.needs_scratch_page	= true,
-	.configure		= intel_i9xx_configure,
+	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
 	.mask_memory		= intel_i965_mask_memory,
@@ -1602,24 +1610,29 @@ static const struct intel_gtt_driver g33_gtt_driver = {
 	.gen = 3,
 	.is_g33 = 1,
 	.setup = i9xx_setup,
+	.write_entry = i965_write_entry,
 };
 static const struct intel_gtt_driver pineview_gtt_driver = {
 	.gen = 3,
 	.is_pineview = 1, .is_g33 = 1,
 	.setup = i9xx_setup,
+	.write_entry = i965_write_entry,
 };
 static const struct intel_gtt_driver i965_gtt_driver = {
 	.gen = 4,
 	.setup = i9xx_setup,
+	.write_entry = i965_write_entry,
 };
 static const struct intel_gtt_driver g4x_gtt_driver = {
 	.gen = 5,
 	.setup = i9xx_setup,
+	.write_entry = i965_write_entry,
 };
 static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.gen = 5,
 	.is_ironlake = 1,
 	.setup = i9xx_setup,
+	.write_entry = i965_write_entry,
 };
 static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 04/17] intel-gtt: introduce pte write function for gen6
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (2 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 03/17] intel-gtt: introduce pte write function for g33/i965/gm45 Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 05/17] intel-gtt: drop agp scratch page support stuff Daniel Vetter
                   ` (12 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Like for i830. intel_i9xx_configure is now unused, so kill it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   48 ++++++++++++++++++++++-------------------
 1 files changed, 26 insertions(+), 22 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 89dcc0b..9292b62 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1233,27 +1233,6 @@ static void intel_i9xx_setup_flush(void)
 			"can't ioremap flush page - no chipset flushing\n");
 }
 
-static int intel_i9xx_configure(void)
-{
-	int i;
-
-	intel_enable_gtt();
-
-	agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
-
-	if (agp_bridge->driver->needs_scratch_page) {
-		for (i = intel_private.base.gtt_stolen_entries; i <
-				intel_private.base.gtt_total_entries; i++) {
-			writel(agp_bridge->scratch_page, intel_private.gtt+i);
-		}
-		readl(intel_private.gtt+i-1);	/* PCI Posting. */
-	}
-
-	global_cache_flush();
-
-	return 0;
-}
-
 static void intel_i915_chipset_flush(struct agp_bridge_data *bridge)
 {
 	if (intel_private.i9xx_flush_page)
@@ -1343,6 +1322,30 @@ static void i965_write_entry(dma_addr_t addr, unsigned int entry,
 	writel(addr | I810_PTE_VALID, intel_private.gtt + entry);
 }
 
+static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
+			     unsigned int flags)
+{
+	unsigned int type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
+	unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;
+	u32 pte_flags;
+
+	if (type_mask == AGP_USER_UNCACHED_MEMORY)
+		pte_flags = GEN6_PTE_UNCACHED;
+	else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC) {
+		pte_flags = GEN6_PTE_LLC;
+		if (gfdt)
+			pte_flags |= GEN6_PTE_GFDT;
+	} else { /* set 'normal'/'cached' to LLC by default */
+		pte_flags = GEN6_PTE_LLC_MLC;
+		if (gfdt)
+			pte_flags |= GEN6_PTE_GFDT;
+	}
+
+	/* gen6 has bit11-4 for physical addr bit39-32 */
+	addr |= (addr >> 28) & 0xff0;
+	writel(addr | pte_flags, intel_private.gtt + entry);
+}
+
 static int i9xx_setup(void)
 {
 	u32 reg_addr;
@@ -1535,7 +1538,7 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
 	.needs_scratch_page	= true,
-	.configure		= intel_i9xx_configure,
+	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
 	.mask_memory		= intel_gen6_mask_memory,
@@ -1637,6 +1640,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
 static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
 	.setup = i9xx_setup,
+	.write_entry = gen6_write_entry,
 };
 
 /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 05/17] intel-gtt: drop agp scratch page support stuff
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (3 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 04/17] intel-gtt: introduce pte write function for gen6 Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 06/17] agp: kill agp_(map|unmap)_page Daniel Vetter
                   ` (11 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

intel-gtt.c now handles the scratch page itself, so drop all that
was just there to support it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   28 ----------------------------
 1 files changed, 0 insertions(+), 28 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 9292b62..cc0ffb1 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -123,21 +123,6 @@ static struct _intel_private {
 #define IS_IRONLAKE	intel_private.driver->is_ironlake
 
 #if USE_PCI_DMA_API
-static int intel_agp_map_page(struct page *page, dma_addr_t *ret)
-{
-	*ret = pci_map_page(intel_private.pcidev, page, 0,
-			    PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
-	if (pci_dma_mapping_error(intel_private.pcidev, *ret))
-		return -EINVAL;
-	return 0;
-}
-
-static void intel_agp_unmap_page(struct page *page, dma_addr_t dma)
-{
-	pci_unmap_page(intel_private.pcidev, dma,
-		       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
-}
-
 static void intel_agp_free_sglist(struct agp_memory *mem)
 {
 	struct sg_table st;
@@ -1444,7 +1429,6 @@ static const struct agp_bridge_driver intel_830_driver = {
 	.aperture_sizes		= intel_fake_agp_sizes,
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
-	.needs_scratch_page	= true,
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
@@ -1471,7 +1455,6 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.aperture_sizes		= intel_fake_agp_sizes,
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
-	.needs_scratch_page	= true,
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
@@ -1492,8 +1475,6 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.agp_type_to_mask_type  = intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 #if USE_PCI_DMA_API
-	.agp_map_page		= intel_agp_map_page,
-	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
 	.agp_unmap_memory	= intel_agp_unmap_memory,
 #endif
@@ -1504,7 +1485,6 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.aperture_sizes		= intel_fake_agp_sizes,
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
-	.needs_scratch_page	= true,
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
@@ -1525,8 +1505,6 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 #if USE_PCI_DMA_API
-	.agp_map_page		= intel_agp_map_page,
-	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
 	.agp_unmap_memory	= intel_agp_unmap_memory,
 #endif
@@ -1537,7 +1515,6 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.aperture_sizes		= intel_fake_agp_sizes,
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
-	.needs_scratch_page	= true,
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
@@ -1558,8 +1535,6 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.agp_type_to_mask_type	= intel_gen6_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 #if USE_PCI_DMA_API
-	.agp_map_page		= intel_agp_map_page,
-	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
 	.agp_unmap_memory	= intel_agp_unmap_memory,
 #endif
@@ -1570,7 +1545,6 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.aperture_sizes		= intel_fake_agp_sizes,
 	.size_type		= FIXED_APER_SIZE,
 	.num_aperture_sizes	= 4,
-	.needs_scratch_page	= true,
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
@@ -1591,8 +1565,6 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 #if USE_PCI_DMA_API
-	.agp_map_page		= intel_agp_map_page,
-	.agp_unmap_page		= intel_agp_unmap_page,
 	.agp_map_memory		= intel_agp_map_memory,
 	.agp_unmap_memory	= intel_agp_unmap_memory,
 #endif
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 06/17] agp: kill agp_(map|unmap)_page
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (4 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 05/17] intel-gtt: drop agp scratch page support stuff Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 07/17] intel-gtt: generic (insert|remove)_entries for i830 Daniel Vetter
                   ` (10 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dave Airlie, Daniel Vetter

Only used to remap the scratch page. Now that intel-gtt does this
itself, kill the support code.

Cc: Dave Airlie <airlied@linux.ie>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/agp.h     |    2 --
 drivers/char/agp/backend.c |   22 +---------------------
 2 files changed, 1 insertions(+), 23 deletions(-)

diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index 1204909..04ad0bb 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -122,8 +122,6 @@ struct agp_bridge_driver {
 	int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
 	void (*chipset_flush)(struct agp_bridge_data *);
 
-	int (*agp_map_page)(struct page *page, dma_addr_t *ret);
-	void (*agp_unmap_page)(struct page *page, dma_addr_t dma);
 	int (*agp_map_memory)(struct agp_memory *mem);
 	void (*agp_unmap_memory)(struct agp_memory *mem);
 };
diff --git a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c
index ee4f855..f27d0d0 100644
--- a/drivers/char/agp/backend.c
+++ b/drivers/char/agp/backend.c
@@ -151,17 +151,7 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
 		}
 
 		bridge->scratch_page_page = page;
-		if (bridge->driver->agp_map_page) {
-			if (bridge->driver->agp_map_page(page,
-							 &bridge->scratch_page_dma)) {
-				dev_err(&bridge->dev->dev,
-					"unable to dma-map scratch page\n");
-				rc = -ENOMEM;
-				goto err_out_nounmap;
-			}
-		} else {
-			bridge->scratch_page_dma = page_to_phys(page);
-		}
+		bridge->scratch_page_dma = page_to_phys(page);
 
 		bridge->scratch_page = bridge->driver->mask_memory(bridge,
 						   bridge->scratch_page_dma, 0);
@@ -204,12 +194,6 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
 	return 0;
 
 err_out:
-	if (bridge->driver->needs_scratch_page &&
-	    bridge->driver->agp_unmap_page) {
-		bridge->driver->agp_unmap_page(bridge->scratch_page_page,
-					       bridge->scratch_page_dma);
-	}
-err_out_nounmap:
 	if (bridge->driver->needs_scratch_page) {
 		void *va = page_address(bridge->scratch_page_page);
 
@@ -240,10 +224,6 @@ static void agp_backend_cleanup(struct agp_bridge_data *bridge)
 	    bridge->driver->needs_scratch_page) {
 		void *va = page_address(bridge->scratch_page_page);
 
-		if (bridge->driver->agp_unmap_page)
-			bridge->driver->agp_unmap_page(bridge->scratch_page_page,
-						       bridge->scratch_page_dma);
-
 		bridge->driver->agp_destroy_page(va, AGP_PAGE_DESTROY_UNMAP);
 		bridge->driver->agp_destroy_page(va, AGP_PAGE_DESTROY_FREE);
 	}
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 07/17] intel-gtt: generic (insert|remove)_entries for i830
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (5 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 06/17] agp: kill agp_(map|unmap)_page Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 08/17] intel-gtt: generic (insert|remove)_entries for i915 Daniel Vetter
                   ` (9 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Well, not all too generic because it does not yet support dmar.
Add a new function check_flags to ensure that non-gem code does
not try to screw us over.

v2: Beautify i830_check_flags with an idea from Chris Wilson.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   53 ++++++++++++++++++++++-------------------
 1 files changed, 28 insertions(+), 25 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index cc0ffb1..0555e16 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -94,6 +94,7 @@ struct intel_gtt_driver {
 	/* Flags is a more or less chipset specific opaque value.
 	 * For chipsets that need to support old ums (non-gem) code, this
 	 * needs to be identical to the various supported agp memory types! */
+	bool (*check_flags)(unsigned int flags);
 };
 
 static struct _intel_private {
@@ -1038,20 +1039,28 @@ static int intel_fake_agp_configure(void)
 	return 0;
 }
 
-static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
-				     int type)
+static bool i830_check_flags(unsigned int flags)
 {
-	int i, j, num_entries;
-	void *temp;
+	switch (flags) {
+	case 0:
+	case AGP_PHYS_MEMORY:
+	case AGP_USER_CACHED_MEMORY:
+	case AGP_USER_MEMORY:
+		return true;
+	}
+
+	return false;
+}
+
+static int intel_fake_agp_insert_entries(struct agp_memory *mem,
+					 off_t pg_start, int type)
+{
+	int i, j;
 	int ret = -EINVAL;
-	int mask_type;
 
 	if (mem->page_count == 0)
 		goto out;
 
-	temp = agp_bridge->current_size;
-	num_entries = A_SIZE_FIX(temp)->num_entries;
-
 	if (pg_start < intel_private.base.gtt_stolen_entries) {
 		dev_printk(KERN_DEBUG, &intel_private.pcidev->dev,
 			   "pg_start == 0x%.8lx, gtt_stolen_entries == 0x%.8x\n",
@@ -1062,29 +1071,21 @@ static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
 		goto out_err;
 	}
 
-	if ((pg_start + mem->page_count) > num_entries)
+	if ((pg_start + mem->page_count) > intel_private.base.gtt_total_entries)
 		goto out_err;
 
-	/* The i830 can't check the GTT for entries since its read only,
-	 * depend on the caller to make the correct offset decisions.
-	 */
-
 	if (type != mem->type)
 		goto out_err;
 
-	mask_type = agp_bridge->driver->agp_type_to_mask_type(agp_bridge, type);
-
-	if (mask_type != 0 && mask_type != AGP_PHYS_MEMORY &&
-	    mask_type != INTEL_AGP_CACHED_MEMORY)
+	if (!intel_private.driver->check_flags(type))
 		goto out_err;
 
 	if (!mem->is_flushed)
 		global_cache_flush();
 
 	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
-		writel(agp_bridge->driver->mask_memory(agp_bridge,
-				page_to_phys(mem->pages[i]), mask_type),
-		       intel_private.gtt+j);
+		intel_private.driver->write_entry(page_to_phys(mem->pages[i]),
+						  j, type);
 	}
 	readl(intel_private.gtt+j-1);
 
@@ -1095,8 +1096,8 @@ out_err:
 	return ret;
 }
 
-static int intel_i830_remove_entries(struct agp_memory *mem, off_t pg_start,
-				     int type)
+static int intel_fake_agp_remove_entries(struct agp_memory *mem,
+					 off_t pg_start, int type)
 {
 	int i;
 
@@ -1110,7 +1111,8 @@ static int intel_i830_remove_entries(struct agp_memory *mem, off_t pg_start,
 	}
 
 	for (i = pg_start; i < (mem->page_count + pg_start); i++) {
-		writel(agp_bridge->scratch_page, intel_private.gtt+i);
+		intel_private.driver->write_entry(intel_private.scratch_page_dma,
+						  i, 0);
 	}
 	readl(intel_private.gtt+i-1);
 
@@ -1438,8 +1440,8 @@ static const struct agp_bridge_driver intel_830_driver = {
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
 	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_i830_insert_entries,
-	.remove_memory		= intel_i830_remove_entries,
+	.insert_memory		= intel_fake_agp_insert_entries,
+	.remove_memory		= intel_fake_agp_remove_entries,
 	.alloc_by_type		= intel_fake_agp_alloc_by_type,
 	.free_by_type		= intel_i810_free_by_type,
 	.agp_alloc_page		= agp_generic_alloc_page,
@@ -1574,6 +1576,7 @@ static const struct intel_gtt_driver i8xx_gtt_driver = {
 	.gen = 2,
 	.setup = i830_setup,
 	.write_entry = i830_write_entry,
+	.check_flags = i830_check_flags,
 };
 static const struct intel_gtt_driver i915_gtt_driver = {
 	.gen = 3,
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 08/17] intel-gtt: generic (insert|remove)_entries for i915
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (6 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 07/17] intel-gtt: generic (insert|remove)_entries for i830 Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 09/17] intel-gtt: generic (insert|remove)_entries for g33/i965 Daniel Vetter
                   ` (8 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Beef up the generic version to support dmar. Otherwise like for the i830.

v2: Don't try to DMA remap on resume for already remapped pages.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   60 ++++++++++++++++++++++++++++++++++-------
 1 files changed, 49 insertions(+), 11 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 0555e16..8273b2b 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -123,7 +123,6 @@ static struct _intel_private {
 #define IS_PINEVIEW	intel_private.driver->is_pineview
 #define IS_IRONLAKE	intel_private.driver->is_ironlake
 
-#if USE_PCI_DMA_API
 static void intel_agp_free_sglist(struct agp_memory *mem)
 {
 	struct sg_table st;
@@ -143,6 +142,9 @@ static int intel_agp_map_memory(struct agp_memory *mem)
 	struct scatterlist *sg;
 	int i;
 
+	if (mem->sg_list)
+		return 0; /* already mapped (for e.g. resume */
+
 	DBG("try mapping %lu pages\n", (unsigned long)mem->page_count);
 
 	if (sg_alloc_table(&st, mem->page_count, GFP_KERNEL))
@@ -174,6 +176,7 @@ static void intel_agp_unmap_memory(struct agp_memory *mem)
 	intel_agp_free_sglist(mem);
 }
 
+#if USE_PCI_DMA_API
 static void intel_agp_insert_sg_entries(struct agp_memory *mem,
 					off_t pg_start, int mask_type)
 {
@@ -1052,6 +1055,31 @@ static bool i830_check_flags(unsigned int flags)
 	return false;
 }
 
+static void intel_gtt_insert_sg_entries(struct scatterlist *sg_list,
+					unsigned int sg_len,
+					unsigned int pg_start,
+					unsigned int flags)
+{
+	struct scatterlist *sg;
+	unsigned int len, m;
+	int i, j;
+
+	j = pg_start;
+
+	/* sg may merge pages, but we have to separate
+	 * per-page addr for GTT */
+	for_each_sg(sg_list, sg, sg_len, i) {
+		len = sg_dma_len(sg) >> PAGE_SHIFT;
+		for (m = 0; m < len; m++) {
+			dma_addr_t addr = sg_dma_address(sg) + (m << PAGE_SHIFT);
+			intel_private.driver->write_entry(addr,
+							  j, flags);
+			j++;
+		}
+	}
+	readl(intel_private.gtt+j-1);
+}
+
 static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 					 off_t pg_start, int type)
 {
@@ -1083,11 +1111,21 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 	if (!mem->is_flushed)
 		global_cache_flush();
 
-	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
-		intel_private.driver->write_entry(page_to_phys(mem->pages[i]),
-						  j, type);
+	if (USE_PCI_DMA_API && INTEL_GTT_GEN > 2) {
+		ret = intel_agp_map_memory(mem);
+		if (ret != 0)
+			return ret;
+
+		intel_gtt_insert_sg_entries(mem->sg_list, mem->num_sg,
+					    pg_start, type);
+	} else {
+		for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
+			dma_addr_t addr = page_to_phys(mem->pages[i]);
+			intel_private.driver->write_entry(addr,
+							  j, type);
+		}
+		readl(intel_private.gtt+j-1);
 	}
-	readl(intel_private.gtt+j-1);
 
 out:
 	ret = 0;
@@ -1110,6 +1148,9 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
 		return -EINVAL;
 	}
 
+	if (USE_PCI_DMA_API && INTEL_GTT_GEN > 2)
+		intel_agp_unmap_memory(mem);
+
 	for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 		intel_private.driver->write_entry(intel_private.scratch_page_dma,
 						  i, 0);
@@ -1466,8 +1507,8 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
 	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_i915_insert_entries,
-	.remove_memory		= intel_i915_remove_entries,
+	.insert_memory		= intel_fake_agp_insert_entries,
+	.remove_memory		= intel_fake_agp_remove_entries,
 	.alloc_by_type		= intel_fake_agp_alloc_by_type,
 	.free_by_type		= intel_i810_free_by_type,
 	.agp_alloc_page		= agp_generic_alloc_page,
@@ -1476,10 +1517,6 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type  = intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#if USE_PCI_DMA_API
-	.agp_map_memory		= intel_agp_map_memory,
-	.agp_unmap_memory	= intel_agp_unmap_memory,
-#endif
 };
 
 static const struct agp_bridge_driver intel_i965_driver = {
@@ -1583,6 +1620,7 @@ static const struct intel_gtt_driver i915_gtt_driver = {
 	.setup = i9xx_setup,
 	/* i945 is the last gpu to need phys mem (for overlay and cursors). */
 	.write_entry = i830_write_entry, 
+	.check_flags = i830_check_flags,
 };
 static const struct intel_gtt_driver g33_gtt_driver = {
 	.gen = 3,
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 09/17] intel-gtt: generic (insert|remove)_entries for g33/i965
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (7 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 08/17] intel-gtt: generic (insert|remove)_entries for i915 Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 10/17] intel-gtt: generic (insert|remove)_entries for sandybridge Daniel Vetter
                   ` (7 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Like for the i915.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   21 +++++++++------------
 1 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 8273b2b..225b791 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1533,8 +1533,8 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
 	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_i915_insert_entries,
-	.remove_memory		= intel_i915_remove_entries,
+	.insert_memory		= intel_fake_agp_insert_entries,
+	.remove_memory		= intel_fake_agp_remove_entries,
 	.alloc_by_type		= intel_fake_agp_alloc_by_type,
 	.free_by_type		= intel_i810_free_by_type,
 	.agp_alloc_page		= agp_generic_alloc_page,
@@ -1543,10 +1543,6 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#if USE_PCI_DMA_API
-	.agp_map_memory		= intel_agp_map_memory,
-	.agp_unmap_memory	= intel_agp_unmap_memory,
-#endif
 };
 
 static const struct agp_bridge_driver intel_gen6_driver = {
@@ -1593,8 +1589,8 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
 	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_i915_insert_entries,
-	.remove_memory		= intel_i915_remove_entries,
+	.insert_memory		= intel_fake_agp_insert_entries,
+	.remove_memory		= intel_fake_agp_remove_entries,
 	.alloc_by_type		= intel_fake_agp_alloc_by_type,
 	.free_by_type		= intel_i810_free_by_type,
 	.agp_alloc_page		= agp_generic_alloc_page,
@@ -1603,10 +1599,6 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#if USE_PCI_DMA_API
-	.agp_map_memory		= intel_agp_map_memory,
-	.agp_unmap_memory	= intel_agp_unmap_memory,
-#endif
 };
 
 static const struct intel_gtt_driver i8xx_gtt_driver = {
@@ -1627,28 +1619,33 @@ static const struct intel_gtt_driver g33_gtt_driver = {
 	.is_g33 = 1,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.check_flags = i830_check_flags,
 };
 static const struct intel_gtt_driver pineview_gtt_driver = {
 	.gen = 3,
 	.is_pineview = 1, .is_g33 = 1,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.check_flags = i830_check_flags,
 };
 static const struct intel_gtt_driver i965_gtt_driver = {
 	.gen = 4,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.check_flags = i830_check_flags,
 };
 static const struct intel_gtt_driver g4x_gtt_driver = {
 	.gen = 5,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.check_flags = i830_check_flags,
 };
 static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.gen = 5,
 	.is_ironlake = 1,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.check_flags = i830_check_flags,
 };
 static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 10/17] intel-gtt: generic (insert|remove)_entries for sandybridge
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (8 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 09/17] intel-gtt: generic (insert|remove)_entries for g33/i965 Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 11/17] intel-gtt: kill mask_memory functions Daniel Vetter
                   ` (6 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Like before, but now with the added bonus of being able to kill
quite a bit of no-longer useful code (the old dmar support stuff).

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |  144 +++---------------------------------------
 1 files changed, 8 insertions(+), 136 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 225b791..6b20396 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -176,61 +176,6 @@ static void intel_agp_unmap_memory(struct agp_memory *mem)
 	intel_agp_free_sglist(mem);
 }
 
-#if USE_PCI_DMA_API
-static void intel_agp_insert_sg_entries(struct agp_memory *mem,
-					off_t pg_start, int mask_type)
-{
-	struct scatterlist *sg;
-	int i, j;
-
-	j = pg_start;
-
-	WARN_ON(!mem->num_sg);
-
-	if (mem->num_sg == mem->page_count) {
-		for_each_sg(mem->sg_list, sg, mem->page_count, i) {
-			writel(agp_bridge->driver->mask_memory(agp_bridge,
-					sg_dma_address(sg), mask_type),
-					intel_private.gtt+j);
-			j++;
-		}
-	} else {
-		/* sg may merge pages, but we have to separate
-		 * per-page addr for GTT */
-		unsigned int len, m;
-
-		for_each_sg(mem->sg_list, sg, mem->num_sg, i) {
-			len = sg_dma_len(sg) / PAGE_SIZE;
-			for (m = 0; m < len; m++) {
-				writel(agp_bridge->driver->mask_memory(agp_bridge,
-								       sg_dma_address(sg) + m * PAGE_SIZE,
-								       mask_type),
-				       intel_private.gtt+j);
-				j++;
-			}
-		}
-	}
-	readl(intel_private.gtt+j-1);
-}
-
-#else
-
-static void intel_agp_insert_sg_entries(struct agp_memory *mem,
-					off_t pg_start, int mask_type)
-{
-	int i, j;
-
-	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
-		writel(agp_bridge->driver->mask_memory(agp_bridge,
-				page_to_phys(mem->pages[i]), mask_type),
-		       intel_private.gtt+j);
-	}
-
-	readl(intel_private.gtt+j-1);
-}
-
-#endif
-
 static int intel_i810_fetch_size(void)
 {
 	u32 smram_miscc;
@@ -1267,81 +1212,6 @@ static void intel_i915_chipset_flush(struct agp_bridge_data *bridge)
 		writel(1, intel_private.i9xx_flush_page);
 }
 
-static int intel_i915_insert_entries(struct agp_memory *mem, off_t pg_start,
-				     int type)
-{
-	int num_entries;
-	void *temp;
-	int ret = -EINVAL;
-	int mask_type;
-
-	if (mem->page_count == 0)
-		goto out;
-
-	temp = agp_bridge->current_size;
-	num_entries = A_SIZE_FIX(temp)->num_entries;
-
-	if (pg_start < intel_private.base.gtt_stolen_entries) {
-		dev_printk(KERN_DEBUG, &intel_private.pcidev->dev,
-			   "pg_start == 0x%.8lx, gtt_stolen_entries == 0x%.8x\n",
-			   pg_start, intel_private.base.gtt_stolen_entries);
-
-		dev_info(&intel_private.pcidev->dev,
-			 "trying to insert into local/stolen memory\n");
-		goto out_err;
-	}
-
-	if ((pg_start + mem->page_count) > num_entries)
-		goto out_err;
-
-	/* The i915 can't check the GTT for entries since it's read only;
-	 * depend on the caller to make the correct offset decisions.
-	 */
-
-	if (type != mem->type)
-		goto out_err;
-
-	mask_type = agp_bridge->driver->agp_type_to_mask_type(agp_bridge, type);
-
-	if (INTEL_GTT_GEN != 6 && mask_type != 0 &&
-	    mask_type != AGP_PHYS_MEMORY &&
-	    mask_type != INTEL_AGP_CACHED_MEMORY)
-		goto out_err;
-
-	if (!mem->is_flushed)
-		global_cache_flush();
-
-	intel_agp_insert_sg_entries(mem, pg_start, mask_type);
-
- out:
-	ret = 0;
- out_err:
-	mem->is_flushed = true;
-	return ret;
-}
-
-static int intel_i915_remove_entries(struct agp_memory *mem, off_t pg_start,
-				     int type)
-{
-	int i;
-
-	if (mem->page_count == 0)
-		return 0;
-
-	if (pg_start < intel_private.base.gtt_stolen_entries) {
-		dev_info(&intel_private.pcidev->dev,
-			 "trying to disable local/stolen memory\n");
-		return -EINVAL;
-	}
-
-	for (i = pg_start; i < (mem->page_count + pg_start); i++)
-		writel(agp_bridge->scratch_page, intel_private.gtt+i);
-
-	readl(intel_private.gtt+i-1);
-
-	return 0;
-}
-
 static void i965_write_entry(dma_addr_t addr, unsigned int entry,
 			     unsigned int flags)
 {
@@ -1350,6 +1220,11 @@ static void i965_write_entry(dma_addr_t addr, unsigned int entry,
 	writel(addr | I810_PTE_VALID, intel_private.gtt + entry);
 }
 
+static bool gen6_check_flags(unsigned int flags)
+{
+	return true;
+}
+
 static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
 			     unsigned int flags)
 {
@@ -1559,8 +1434,8 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
 	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_i915_insert_entries,
-	.remove_memory		= intel_i915_remove_entries,
+	.insert_memory		= intel_fake_agp_insert_entries,
+	.remove_memory		= intel_fake_agp_remove_entries,
 	.alloc_by_type		= intel_fake_agp_alloc_by_type,
 	.free_by_type		= intel_i810_free_by_type,
 	.agp_alloc_page		= agp_generic_alloc_page,
@@ -1569,10 +1444,6 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.agp_destroy_pages      = agp_generic_destroy_pages,
 	.agp_type_to_mask_type	= intel_gen6_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
-#if USE_PCI_DMA_API
-	.agp_map_memory		= intel_agp_map_memory,
-	.agp_unmap_memory	= intel_agp_unmap_memory,
-#endif
 };
 
 static const struct agp_bridge_driver intel_g33_driver = {
@@ -1651,6 +1522,7 @@ static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
 	.setup = i9xx_setup,
 	.write_entry = gen6_write_entry,
+	.check_flags = gen6_check_flags,
 };
 
 /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 11/17] intel-gtt: kill mask_memory functions
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (9 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 10/17] intel-gtt: generic (insert|remove)_entries for sandybridge Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 12/17] intel-gtt: move chipset flush to the gtt driver struct Daniel Vetter
                   ` (5 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

That indirection mess can now go. Add a dummy i81x gtt_driver to
avoid a NULL pointer check.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |  105 +++++------------------------------------
 1 files changed, 13 insertions(+), 92 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 6b20396..8e149a8 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -69,20 +69,6 @@ static struct gatt_mask intel_i810_masks[] =
 #define INTEL_AGP_CACHED_MEMORY_LLC_MLC        3
 #define INTEL_AGP_CACHED_MEMORY_LLC_MLC_GFDT   4
 
-static struct gatt_mask intel_gen6_masks[] =
-{
-	{.mask = I810_PTE_VALID | GEN6_PTE_UNCACHED,
-	 .type = INTEL_AGP_UNCACHED_MEMORY },
-	{.mask = I810_PTE_VALID | GEN6_PTE_LLC,
-         .type = INTEL_AGP_CACHED_MEMORY_LLC },
-	{.mask = I810_PTE_VALID | GEN6_PTE_LLC | GEN6_PTE_GFDT,
-         .type = INTEL_AGP_CACHED_MEMORY_LLC_GFDT },
-	{.mask = I810_PTE_VALID | GEN6_PTE_LLC_MLC,
-         .type = INTEL_AGP_CACHED_MEMORY_LLC_MLC },
-	{.mask = I810_PTE_VALID | GEN6_PTE_LLC_MLC | GEN6_PTE_GFDT,
-         .type = INTEL_AGP_CACHED_MEMORY_LLC_MLC_GFDT },
-};
-
 struct intel_gtt_driver {
 	unsigned int gen : 8;
 	unsigned int is_g33 : 1;
@@ -286,34 +272,6 @@ static void i8xx_destroy_pages(struct page *page)
 	atomic_dec(&agp_bridge->current_memory_agp);
 }
 
-static int intel_i830_type_to_mask_type(struct agp_bridge_data *bridge,
-					int type)
-{
-	if (type < AGP_USER_TYPES)
-		return type;
-	else if (type == AGP_USER_CACHED_MEMORY)
-		return INTEL_AGP_CACHED_MEMORY;
-	else
-		return 0;
-}
-
-static int intel_gen6_type_to_mask_type(struct agp_bridge_data *bridge,
-					int type)
-{
-	unsigned int type_mask = type & ~AGP_USER_CACHED_MEMORY_GFDT;
-	unsigned int gfdt = type & AGP_USER_CACHED_MEMORY_GFDT;
-
-	if (type_mask == AGP_USER_UNCACHED_MEMORY)
-		return INTEL_AGP_UNCACHED_MEMORY;
-	else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
-		return gfdt ? INTEL_AGP_CACHED_MEMORY_LLC_MLC_GFDT :
-			      INTEL_AGP_CACHED_MEMORY_LLC_MLC;
-	else /* set 'normal'/'cached' to LLC by default */
-		return gfdt ? INTEL_AGP_CACHED_MEMORY_LLC_GFDT :
-			      INTEL_AGP_CACHED_MEMORY_LLC;
-}
-
-
 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
 				int type)
 {
@@ -1287,35 +1245,6 @@ static int i9xx_setup(void)
 	return 0;
 }
 
-/*
- * The i965 supports 36-bit physical addresses, but to keep
- * the format of the GTT the same, the bits that don't fit
- * in a 32-bit word are shifted down to bits 4..7.
- *
- * Gcc is smart enough to notice that "(addr >> 28) & 0xf0"
- * is always zero on 32-bit architectures, so no need to make
- * this conditional.
- */
-static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
-					    dma_addr_t addr, int type)
-{
-	/* Shift high bits down */
-	addr |= (addr >> 28) & 0xf0;
-
-	/* Type checking must be done elsewhere */
-	return addr | bridge->driver->masks[type].mask;
-}
-
-static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
-					    dma_addr_t addr, int type)
-{
-	/* gen6 has bit11-4 for physical addr bit39-32 */
-	addr |= (addr >> 28) & 0xff0;
-
-	/* Type checking must be done elsewhere */
-	return addr | bridge->driver->masks[type].mask;
-}
-
 static const struct agp_bridge_driver intel_810_driver = {
 	.owner			= THIS_MODULE,
 	.aperture_sizes		= intel_i810_sizes,
@@ -1350,8 +1279,6 @@ static const struct agp_bridge_driver intel_830_driver = {
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
-	.mask_memory		= intel_i810_mask_memory,
-	.masks			= intel_i810_masks,
 	.agp_enable		= intel_fake_agp_enable,
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
@@ -1364,7 +1291,6 @@ static const struct agp_bridge_driver intel_830_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.agp_type_to_mask_type  = intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i830_chipset_flush,
 };
 
@@ -1376,8 +1302,6 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
-	.mask_memory		= intel_i810_mask_memory,
-	.masks			= intel_i810_masks,
 	.agp_enable		= intel_fake_agp_enable,
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
@@ -1390,7 +1314,6 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.agp_type_to_mask_type  = intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 };
 
@@ -1402,8 +1325,6 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
-	.mask_memory		= intel_i965_mask_memory,
-	.masks			= intel_i810_masks,
 	.agp_enable		= intel_fake_agp_enable,
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
@@ -1416,7 +1337,6 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 };
 
@@ -1428,8 +1348,6 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
-	.mask_memory		= intel_gen6_mask_memory,
-	.masks			= intel_gen6_masks,
 	.agp_enable		= intel_fake_agp_enable,
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
@@ -1442,7 +1360,6 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.agp_type_to_mask_type	= intel_gen6_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 };
 
@@ -1454,8 +1371,6 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.configure		= intel_fake_agp_configure,
 	.fetch_size		= intel_fake_agp_fetch_size,
 	.cleanup		= intel_gtt_cleanup,
-	.mask_memory		= intel_i965_mask_memory,
-	.masks			= intel_i810_masks,
 	.agp_enable		= intel_fake_agp_enable,
 	.cache_flush		= global_cache_flush,
 	.create_gatt_table	= intel_fake_agp_create_gatt_table,
@@ -1468,10 +1383,12 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,
 	.chipset_flush		= intel_i915_chipset_flush,
 };
 
+static const struct intel_gtt_driver i81x_gtt_driver = {
+	.gen = 1,
+};
 static const struct intel_gtt_driver i8xx_gtt_driver = {
 	.gen = 2,
 	.setup = i830_setup,
@@ -1535,10 +1452,14 @@ static const struct intel_gtt_driver_description {
 	const struct agp_bridge_driver *gmch_driver;
 	const struct intel_gtt_driver *gtt_driver;
 } intel_gtt_chipsets[] = {
-	{ PCI_DEVICE_ID_INTEL_82810_IG1, "i810", &intel_810_driver , NULL},
-	{ PCI_DEVICE_ID_INTEL_82810_IG3, "i810", &intel_810_driver , NULL},
-	{ PCI_DEVICE_ID_INTEL_82810E_IG, "i810", &intel_810_driver , NULL},
-	{ PCI_DEVICE_ID_INTEL_82815_CGC, "i815", &intel_810_driver , NULL},
+	{ PCI_DEVICE_ID_INTEL_82810_IG1, "i810", &intel_810_driver,
+		&i81x_gtt_driver},
+	{ PCI_DEVICE_ID_INTEL_82810_IG3, "i810", &intel_810_driver,
+		&i81x_gtt_driver},
+	{ PCI_DEVICE_ID_INTEL_82810E_IG, "i810", &intel_810_driver,
+		&i81x_gtt_driver},
+	{ PCI_DEVICE_ID_INTEL_82815_CGC, "i815", &intel_810_driver,
+		&i81x_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_82830_CGC, "830M",
 		&intel_830_driver , &i8xx_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_82845G_IG, "830M",
@@ -1659,9 +1580,9 @@ int intel_gmch_probe(struct pci_dev *pdev,
 
 	dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);
 
-	if (bridge->driver->mask_memory == intel_gen6_mask_memory)
+	if (intel_private.driver->write_entry == gen6_write_entry)
 		mask = 40;
-	else if (bridge->driver->mask_memory == intel_i965_mask_memory)
+	else if (intel_private.driver->write_entry == i965_write_entry)
 		mask = 36;
 	else
 		mask = 32;
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 12/17] intel-gtt: move chipset flush to the gtt driver struct
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (10 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 11/17] intel-gtt: kill mask_memory functions Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 13/17] intel-gtt: consolidate fake_agp driver structs Daniel Vetter
                   ` (4 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

This is the last differentiator between the different fake agp drivers.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   28 +++++++++++++++++++++-------
 1 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 8e149a8..e6d69ef 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -81,6 +81,7 @@ struct intel_gtt_driver {
 	 * For chipsets that need to support old ums (non-gem) code, this
 	 * needs to be identical to the various supported agp memory types! */
 	bool (*check_flags)(unsigned int flags);
+	void (*chipset_flush)(void);
 };
 
 static struct _intel_private {
@@ -840,7 +841,7 @@ static void intel_i830_setup_flush(void)
  * that buffer out, we just fill 1KB and clflush it out, on the assumption
  * that it'll push whatever was in there out.  It appears to work.
  */
-static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
+static void i830_chipset_flush(void)
 {
 	unsigned int *pg = intel_private.i8xx_flush_page;
 
@@ -1063,6 +1064,11 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
 	return 0;
 }
 
+static void intel_fake_agp_chipset_flush(struct agp_bridge_data *bridge)
+{
+	intel_private.driver->chipset_flush();
+}
+
 static struct agp_memory *intel_fake_agp_alloc_by_type(size_t pg_count,
 						       int type)
 {
@@ -1164,7 +1170,7 @@ static void intel_i9xx_setup_flush(void)
 			"can't ioremap flush page - no chipset flushing\n");
 }
 
-static void intel_i915_chipset_flush(struct agp_bridge_data *bridge)
+static void i9xx_chipset_flush(void)
 {
 	if (intel_private.i9xx_flush_page)
 		writel(1, intel_private.i9xx_flush_page);
@@ -1291,7 +1297,7 @@ static const struct agp_bridge_driver intel_830_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i830_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_915_driver = {
@@ -1314,7 +1320,7 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_i965_driver = {
@@ -1337,7 +1343,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_gen6_driver = {
@@ -1360,7 +1366,7 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_g33_driver = {
@@ -1383,7 +1389,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct intel_gtt_driver i81x_gtt_driver = {
@@ -1394,6 +1400,7 @@ static const struct intel_gtt_driver i8xx_gtt_driver = {
 	.setup = i830_setup,
 	.write_entry = i830_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i830_chipset_flush,
 };
 static const struct intel_gtt_driver i915_gtt_driver = {
 	.gen = 3,
@@ -1401,6 +1408,7 @@ static const struct intel_gtt_driver i915_gtt_driver = {
 	/* i945 is the last gpu to need phys mem (for overlay and cursors). */
 	.write_entry = i830_write_entry, 
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver g33_gtt_driver = {
 	.gen = 3,
@@ -1408,6 +1416,7 @@ static const struct intel_gtt_driver g33_gtt_driver = {
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver pineview_gtt_driver = {
 	.gen = 3,
@@ -1415,18 +1424,21 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver i965_gtt_driver = {
 	.gen = 4,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver g4x_gtt_driver = {
 	.gen = 5,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.gen = 5,
@@ -1434,12 +1446,14 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
 	.setup = i9xx_setup,
 	.write_entry = gen6_write_entry,
 	.check_flags = gen6_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 
 /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 13/17] intel-gtt: consolidate fake_agp driver structs
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (11 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 12/17] intel-gtt: move chipset flush to the gtt driver struct Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 14/17] agp: kill agp_(unmap|map)_memory Daniel Vetter
                   ` (3 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

They're now all the same.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |  168 ++++++++++--------------------------------
 1 files changed, 38 insertions(+), 130 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index e6d69ef..39e3e63 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1277,99 +1277,7 @@ static const struct agp_bridge_driver intel_810_driver = {
 	.agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 };
 
-static const struct agp_bridge_driver intel_830_driver = {
-	.owner			= THIS_MODULE,
-	.aperture_sizes		= intel_fake_agp_sizes,
-	.size_type		= FIXED_APER_SIZE,
-	.num_aperture_sizes	= 4,
-	.configure		= intel_fake_agp_configure,
-	.fetch_size		= intel_fake_agp_fetch_size,
-	.cleanup		= intel_gtt_cleanup,
-	.agp_enable		= intel_fake_agp_enable,
-	.cache_flush		= global_cache_flush,
-	.create_gatt_table	= intel_fake_agp_create_gatt_table,
-	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_fake_agp_insert_entries,
-	.remove_memory		= intel_fake_agp_remove_entries,
-	.alloc_by_type		= intel_fake_agp_alloc_by_type,
-	.free_by_type		= intel_i810_free_by_type,
-	.agp_alloc_page		= agp_generic_alloc_page,
-	.agp_alloc_pages        = agp_generic_alloc_pages,
-	.agp_destroy_page	= agp_generic_destroy_page,
-	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_fake_agp_chipset_flush,
-};
-
-static const struct agp_bridge_driver intel_915_driver = {
-	.owner			= THIS_MODULE,
-	.aperture_sizes		= intel_fake_agp_sizes,
-	.size_type		= FIXED_APER_SIZE,
-	.num_aperture_sizes	= 4,
-	.configure		= intel_fake_agp_configure,
-	.fetch_size		= intel_fake_agp_fetch_size,
-	.cleanup		= intel_gtt_cleanup,
-	.agp_enable		= intel_fake_agp_enable,
-	.cache_flush		= global_cache_flush,
-	.create_gatt_table	= intel_fake_agp_create_gatt_table,
-	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_fake_agp_insert_entries,
-	.remove_memory		= intel_fake_agp_remove_entries,
-	.alloc_by_type		= intel_fake_agp_alloc_by_type,
-	.free_by_type		= intel_i810_free_by_type,
-	.agp_alloc_page		= agp_generic_alloc_page,
-	.agp_alloc_pages        = agp_generic_alloc_pages,
-	.agp_destroy_page	= agp_generic_destroy_page,
-	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_fake_agp_chipset_flush,
-};
-
-static const struct agp_bridge_driver intel_i965_driver = {
-	.owner			= THIS_MODULE,
-	.aperture_sizes		= intel_fake_agp_sizes,
-	.size_type		= FIXED_APER_SIZE,
-	.num_aperture_sizes	= 4,
-	.configure		= intel_fake_agp_configure,
-	.fetch_size		= intel_fake_agp_fetch_size,
-	.cleanup		= intel_gtt_cleanup,
-	.agp_enable		= intel_fake_agp_enable,
-	.cache_flush		= global_cache_flush,
-	.create_gatt_table	= intel_fake_agp_create_gatt_table,
-	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_fake_agp_insert_entries,
-	.remove_memory		= intel_fake_agp_remove_entries,
-	.alloc_by_type		= intel_fake_agp_alloc_by_type,
-	.free_by_type		= intel_i810_free_by_type,
-	.agp_alloc_page		= agp_generic_alloc_page,
-	.agp_alloc_pages        = agp_generic_alloc_pages,
-	.agp_destroy_page	= agp_generic_destroy_page,
-	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_fake_agp_chipset_flush,
-};
-
-static const struct agp_bridge_driver intel_gen6_driver = {
-	.owner			= THIS_MODULE,
-	.aperture_sizes		= intel_fake_agp_sizes,
-	.size_type		= FIXED_APER_SIZE,
-	.num_aperture_sizes	= 4,
-	.configure		= intel_fake_agp_configure,
-	.fetch_size		= intel_fake_agp_fetch_size,
-	.cleanup		= intel_gtt_cleanup,
-	.agp_enable		= intel_fake_agp_enable,
-	.cache_flush		= global_cache_flush,
-	.create_gatt_table	= intel_fake_agp_create_gatt_table,
-	.free_gatt_table	= intel_fake_agp_free_gatt_table,
-	.insert_memory		= intel_fake_agp_insert_entries,
-	.remove_memory		= intel_fake_agp_remove_entries,
-	.alloc_by_type		= intel_fake_agp_alloc_by_type,
-	.free_by_type		= intel_i810_free_by_type,
-	.agp_alloc_page		= agp_generic_alloc_page,
-	.agp_alloc_pages        = agp_generic_alloc_pages,
-	.agp_destroy_page	= agp_generic_destroy_page,
-	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_fake_agp_chipset_flush,
-};
-
-static const struct agp_bridge_driver intel_g33_driver = {
+static const struct agp_bridge_driver intel_fake_agp_driver = {
 	.owner			= THIS_MODULE,
 	.aperture_sizes		= intel_fake_agp_sizes,
 	.size_type		= FIXED_APER_SIZE,
@@ -1475,79 +1383,79 @@ static const struct intel_gtt_driver_description {
 	{ PCI_DEVICE_ID_INTEL_82815_CGC, "i815", &intel_810_driver,
 		&i81x_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_82830_CGC, "830M",
-		&intel_830_driver , &i8xx_gtt_driver},
+		&intel_fake_agp_driver, &i8xx_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_82845G_IG, "830M",
-		&intel_830_driver , &i8xx_gtt_driver},
+		&intel_fake_agp_driver, &i8xx_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_82854_IG, "854",
-		&intel_830_driver , &i8xx_gtt_driver},
+		&intel_fake_agp_driver, &i8xx_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_82855GM_IG, "855GM",
-		&intel_830_driver , &i8xx_gtt_driver},
+		&intel_fake_agp_driver, &i8xx_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_82865_IG, "865",
-		&intel_830_driver , &i8xx_gtt_driver},
+		&intel_fake_agp_driver, &i8xx_gtt_driver},
 	{ PCI_DEVICE_ID_INTEL_E7221_IG, "E7221 (i915)",
-		&intel_915_driver , &i915_gtt_driver },
+		&intel_fake_agp_driver, &i915_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82915G_IG, "915G",
-		&intel_915_driver , &i915_gtt_driver },
+		&intel_fake_agp_driver, &i915_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82915GM_IG, "915GM",
-		&intel_915_driver , &i915_gtt_driver },
+		&intel_fake_agp_driver, &i915_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82945G_IG, "945G",
-		&intel_915_driver , &i915_gtt_driver },
+		&intel_fake_agp_driver, &i915_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82945GM_IG, "945GM",
-		&intel_915_driver , &i915_gtt_driver },
+		&intel_fake_agp_driver, &i915_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82945GME_IG, "945GME",
-		&intel_915_driver , &i915_gtt_driver },
+		&intel_fake_agp_driver, &i915_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82946GZ_IG, "946GZ",
-		&intel_i965_driver , &i965_gtt_driver },
+		&intel_fake_agp_driver, &i965_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82G35_IG, "G35",
-		&intel_i965_driver , &i965_gtt_driver },
+		&intel_fake_agp_driver, &i965_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82965Q_IG, "965Q",
-		&intel_i965_driver , &i965_gtt_driver },
+		&intel_fake_agp_driver, &i965_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82965G_IG, "965G",
-		&intel_i965_driver , &i965_gtt_driver },
+		&intel_fake_agp_driver, &i965_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82965GM_IG, "965GM",
-		&intel_i965_driver , &i965_gtt_driver },
+		&intel_fake_agp_driver, &i965_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_82965GME_IG, "965GME/GLE",
-		&intel_i965_driver , &i965_gtt_driver },
+		&intel_fake_agp_driver, &i965_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_G33_IG, "G33",
-		&intel_g33_driver , &g33_gtt_driver },
+		&intel_fake_agp_driver, &g33_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_Q35_IG, "Q35",
-		&intel_g33_driver , &g33_gtt_driver },
+		&intel_fake_agp_driver, &g33_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_Q33_IG, "Q33",
-		&intel_g33_driver , &g33_gtt_driver },
+		&intel_fake_agp_driver, &g33_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG, "GMA3150",
-		&intel_g33_driver , &pineview_gtt_driver },
+		&intel_fake_agp_driver, &pineview_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_PINEVIEW_IG, "GMA3150",
-		&intel_g33_driver , &pineview_gtt_driver },
+		&intel_fake_agp_driver, &pineview_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_GM45_IG, "GM45",
-		&intel_i965_driver , &g4x_gtt_driver },
+		&intel_fake_agp_driver, &g4x_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_EAGLELAKE_IG, "Eaglelake",
-		&intel_i965_driver , &g4x_gtt_driver },
+		&intel_fake_agp_driver, &g4x_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_Q45_IG, "Q45/Q43",
-		&intel_i965_driver , &g4x_gtt_driver },
+		&intel_fake_agp_driver, &g4x_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_G45_IG, "G45/G43",
-		&intel_i965_driver , &g4x_gtt_driver },
+		&intel_fake_agp_driver, &g4x_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_B43_IG, "B43",
-		&intel_i965_driver , &g4x_gtt_driver },
+		&intel_fake_agp_driver, &g4x_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_G41_IG, "G41",
-		&intel_i965_driver , &g4x_gtt_driver },
+		&intel_fake_agp_driver, &g4x_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG,
-	    "HD Graphics", &intel_i965_driver , &ironlake_gtt_driver },
+	    "HD Graphics", &intel_fake_agp_driver, &ironlake_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG,
-	    "HD Graphics", &intel_i965_driver , &ironlake_gtt_driver },
+	    "HD Graphics", &intel_fake_agp_driver, &ironlake_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT1_IG,
-	    "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
+	    "Sandybridge", &intel_fake_agp_driver, &sandybridge_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_IG,
-	    "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
+	    "Sandybridge", &intel_fake_agp_driver, &sandybridge_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_PLUS_IG,
-	    "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
+	    "Sandybridge", &intel_fake_agp_driver, &sandybridge_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT1_IG,
-	    "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
+	    "Sandybridge", &intel_fake_agp_driver, &sandybridge_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_IG,
-	    "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
+	    "Sandybridge", &intel_fake_agp_driver, &sandybridge_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_PLUS_IG,
-	    "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
+	    "Sandybridge", &intel_fake_agp_driver, &sandybridge_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_IG,
-	    "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
+	    "Sandybridge", &intel_fake_agp_driver, &sandybridge_gtt_driver },
 	{ 0, NULL, NULL }
 };
 
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 14/17] agp: kill agp_(unmap|map)_memory
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (12 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 13/17] intel-gtt: consolidate fake_agp driver structs Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 15/17] intel-gtt: clean up gtt size reporting Daniel Vetter
                   ` (2 subsequent siblings)
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dave Airlie, Daniel Vetter

DMA remapping was only used by the intel-gtt driver. With that
code now folded into the driver, kill the agp generic support for
it.

Cc: Dave Airlie <airlied@linux.ie>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/agp.h     |    3 ---
 drivers/char/agp/generic.c |    8 --------
 2 files changed, 0 insertions(+), 11 deletions(-)

diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index 04ad0bb..5259065 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -121,9 +121,6 @@ struct agp_bridge_driver {
 	void (*agp_destroy_pages)(struct agp_memory *);
 	int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
 	void (*chipset_flush)(struct agp_bridge_data *);
-
-	int (*agp_map_memory)(struct agp_memory *mem);
-	void (*agp_unmap_memory)(struct agp_memory *mem);
 };
 
 struct agp_bridge_data {
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index d2abf51..78235ce 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -437,11 +437,6 @@ int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
 		curr->is_flushed = true;
 	}
 
-	if (curr->bridge->driver->agp_map_memory) {
-		ret_val = curr->bridge->driver->agp_map_memory(curr);
-		if (ret_val)
-			return ret_val;
-	}
 	ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
 
 	if (ret_val != 0)
@@ -483,9 +478,6 @@ int agp_unbind_memory(struct agp_memory *curr)
 	if (ret_val != 0)
 		return ret_val;
 
-	if (curr->bridge->driver->agp_unmap_memory)
-		curr->bridge->driver->agp_unmap_memory(curr);
-
 	curr->is_bound = false;
 	curr->pg_start = 0;
 	spin_lock(&curr->bridge->mapped_lock);
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 15/17] intel-gtt: clean up gtt size reporting
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (13 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 14/17] agp: kill agp_(unmap|map)_memory Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 16/17] intel-gtt: store the dma mask size in intel_gtt_driver Daniel Vetter
  2010-09-13 22:35 ` [PATCH 17/17] intel-gtt add a cleanup function for chipset specific stuff Daniel Vetter
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Consolidate everything in intel-gtt.c and also kill the export
of intel_max_stolen.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c    |    6 +++++-
 drivers/gpu/drm/i915/i915_dma.c |    1 -
 include/drm/intel-gtt.h         |    2 --
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 39e3e63..a4f2774 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -41,7 +41,6 @@
 
 /* Max amount of stolen space, anything above will be returned to Linux */
 int intel_max_stolen = 32 * 1024 * 1024;
-EXPORT_SYMBOL(intel_max_stolen);
 
 static const struct aper_size_info_fixed intel_i810_sizes[] =
 {
@@ -759,6 +758,11 @@ static int intel_gtt_init(void)
 	intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries();
 	intel_private.base.gtt_total_entries = intel_gtt_total_entries();
 
+	dev_info(&intel_private.bridge_dev->dev,
+			"detected gtt size: %dK total, %dK mappable\n",
+			intel_private.base.gtt_total_entries * 4,
+			intel_private.base.gtt_mappable_entries * 4);
+
 	gtt_map_size = intel_private.base.gtt_total_entries * 4;
 
 	intel_private.gtt = ioremap(intel_private.gtt_bus_addr,
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 7c7d1bc..49926b4 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1202,7 +1202,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
 
 	/* Basic memrange allocator for stolen space (aka mm.vram) */
 	drm_mm_init(&dev_priv->mm.vram, 0, prealloc_size);
-	DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
 
 	/* We're off and running w/KMS */
 	dev_priv->mm.suspended = 0;
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index b3aa7ab..d3c8194 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -2,8 +2,6 @@
 
 #ifndef _DRM_INTEL_GTT_H
 #define	_DRM_INTEL_GTT_H
-extern int intel_max_stolen; /* from AGP driver */
-
 struct intel_gtt {
 	/* Number of stolen gtt entries at the beginning. */
 	unsigned int gtt_stolen_entries;
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 16/17] intel-gtt: store the dma mask size in intel_gtt_driver
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (14 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 15/17] intel-gtt: clean up gtt size reporting Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  2010-09-13 22:35 ` [PATCH 17/17] intel-gtt add a cleanup function for chipset specific stuff Daniel Vetter
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Storing this explicitly makes for clearer code and hopefully
less further confusion.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   18 +++++++++++-------
 1 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index a4f2774..b0ba00c 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -73,6 +73,7 @@ struct intel_gtt_driver {
 	unsigned int is_g33 : 1;
 	unsigned int is_pineview : 1;
 	unsigned int is_ironlake : 1;
+	unsigned int dma_mask_size : 8;
 	/* Chipset specific GTT setup */
 	int (*setup)(void);
 	void (*write_entry)(dma_addr_t addr, unsigned int entry, unsigned int flags);
@@ -1306,11 +1307,13 @@ static const struct agp_bridge_driver intel_fake_agp_driver = {
 
 static const struct intel_gtt_driver i81x_gtt_driver = {
 	.gen = 1,
+	.dma_mask_size = 32,
 };
 static const struct intel_gtt_driver i8xx_gtt_driver = {
 	.gen = 2,
 	.setup = i830_setup,
 	.write_entry = i830_write_entry,
+	.dma_mask_size = 32,
 	.check_flags = i830_check_flags,
 	.chipset_flush = i830_chipset_flush,
 };
@@ -1319,6 +1322,7 @@ static const struct intel_gtt_driver i915_gtt_driver = {
 	.setup = i9xx_setup,
 	/* i945 is the last gpu to need phys mem (for overlay and cursors). */
 	.write_entry = i830_write_entry, 
+	.dma_mask_size = 32,
 	.check_flags = i830_check_flags,
 	.chipset_flush = i9xx_chipset_flush,
 };
@@ -1327,6 +1331,7 @@ static const struct intel_gtt_driver g33_gtt_driver = {
 	.is_g33 = 1,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
 	.chipset_flush = i9xx_chipset_flush,
 };
@@ -1335,6 +1340,7 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
 	.is_pineview = 1, .is_g33 = 1,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
 	.chipset_flush = i9xx_chipset_flush,
 };
@@ -1342,6 +1348,7 @@ static const struct intel_gtt_driver i965_gtt_driver = {
 	.gen = 4,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
 	.chipset_flush = i9xx_chipset_flush,
 };
@@ -1349,6 +1356,7 @@ static const struct intel_gtt_driver g4x_gtt_driver = {
 	.gen = 5,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
 	.chipset_flush = i9xx_chipset_flush,
 };
@@ -1357,6 +1365,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.is_ironlake = 1,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
+	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
 	.chipset_flush = i9xx_chipset_flush,
 };
@@ -1364,6 +1373,7 @@ static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
 	.setup = i9xx_setup,
 	.write_entry = gen6_write_entry,
+	.dma_mask_size = 40,
 	.check_flags = gen6_check_flags,
 	.chipset_flush = i9xx_chipset_flush,
 };
@@ -1506,13 +1516,7 @@ int intel_gmch_probe(struct pci_dev *pdev,
 
 	dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);
 
-	if (intel_private.driver->write_entry == gen6_write_entry)
-		mask = 40;
-	else if (intel_private.driver->write_entry == i965_write_entry)
-		mask = 36;
-	else
-		mask = 32;
-
+	mask = intel_private.driver->dma_mask_size;
 	if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))
 		dev_err(&intel_private.pcidev->dev,
 			"set gfx device dma mask %d-bit failed!\n", mask);
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH 17/17] intel-gtt add a cleanup function for chipset specific stuff
  2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
                   ` (15 preceding siblings ...)
  2010-09-13 22:35 ` [PATCH 16/17] intel-gtt: store the dma mask size in intel_gtt_driver Daniel Vetter
@ 2010-09-13 22:35 ` Daniel Vetter
  16 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2010-09-13 22:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

The old code didn't clean up the i830 chipset flush page. And it
looks nicer.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   39 +++++++++++++++++++++++++++++++--------
 1 files changed, 31 insertions(+), 8 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index b0ba00c..616502b 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -76,6 +76,9 @@ struct intel_gtt_driver {
 	unsigned int dma_mask_size : 8;
 	/* Chipset specific GTT setup */
 	int (*setup)(void);
+	/* This should undo anything done in ->setup() save the unmapping
+	 * of the mmio register file, that's done in the generic code. */
+	void (*cleanup)(void);
 	void (*write_entry)(dma_addr_t addr, unsigned int entry, unsigned int flags);
 	/* Flags is a more or less chipset specific opaque value.
 	 * For chipsets that need to support old ums (non-gem) code, this
@@ -733,12 +736,8 @@ static void intel_gtt_teardown_scratch_page(void)
 
 static void intel_gtt_cleanup(void)
 {
-	if (intel_private.i9xx_flush_page)
-		iounmap(intel_private.i9xx_flush_page);
-	if (intel_private.resource_valid)
-		release_resource(&intel_private.ifp_resource);
-	intel_private.ifp_resource.start = 0;
-	intel_private.resource_valid = 0;
+	intel_private.driver->cleanup();
+
 	iounmap(intel_private.gtt);
 	iounmap(intel_private.registers);
 	
@@ -769,6 +768,7 @@ static int intel_gtt_init(void)
 	intel_private.gtt = ioremap(intel_private.gtt_bus_addr,
 				    gtt_map_size);
 	if (!intel_private.gtt) {
+		intel_private.driver->cleanup();
 		iounmap(intel_private.registers);
 		return -ENOMEM;
 	}
@@ -778,6 +778,7 @@ static int intel_gtt_init(void)
 	/* we have to call this as early as possible after the MMIO base address is known */
 	intel_private.base.gtt_stolen_entries = intel_gtt_stolen_entries();
 	if (intel_private.base.gtt_stolen_entries == 0) {
+		intel_private.driver->cleanup();
 		iounmap(intel_private.registers);
 		iounmap(intel_private.gtt);
 		return -ENOMEM;
@@ -811,7 +812,7 @@ static int intel_fake_agp_fetch_size(void)
 	return 0;
 }
 
-static void intel_i830_fini_flush(void)
+static void i830_cleanup(void)
 {
 	kunmap(intel_private.i8xx_page);
 	intel_private.i8xx_flush_page = NULL;
@@ -833,7 +834,7 @@ static void intel_i830_setup_flush(void)
 
 	intel_private.i8xx_flush_page = kmap(intel_private.i8xx_page);
 	if (!intel_private.i8xx_flush_page)
-		intel_i830_fini_flush();
+		i830_cleanup();
 }
 
 /* The chipset_flush interface needs to get data that has already been
@@ -1175,6 +1176,16 @@ static void intel_i9xx_setup_flush(void)
 			"can't ioremap flush page - no chipset flushing\n");
 }
 
+static void i9xx_cleanup(void)
+{
+	if (intel_private.i9xx_flush_page)
+		iounmap(intel_private.i9xx_flush_page);
+	if (intel_private.resource_valid)
+		release_resource(&intel_private.ifp_resource);
+	intel_private.ifp_resource.start = 0;
+	intel_private.resource_valid = 0;
+}
+
 static void i9xx_chipset_flush(void)
 {
 	if (intel_private.i9xx_flush_page)
@@ -1218,6 +1229,10 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
 	writel(addr | pte_flags, intel_private.gtt + entry);
 }
 
+static void gen6_cleanup(void)
+{
+}
+
 static int i9xx_setup(void)
 {
 	u32 reg_addr;
@@ -1312,6 +1327,7 @@ static const struct intel_gtt_driver i81x_gtt_driver = {
 static const struct intel_gtt_driver i8xx_gtt_driver = {
 	.gen = 2,
 	.setup = i830_setup,
+	.cleanup = i830_cleanup,
 	.write_entry = i830_write_entry,
 	.dma_mask_size = 32,
 	.check_flags = i830_check_flags,
@@ -1320,6 +1336,7 @@ static const struct intel_gtt_driver i8xx_gtt_driver = {
 static const struct intel_gtt_driver i915_gtt_driver = {
 	.gen = 3,
 	.setup = i9xx_setup,
+	.cleanup = i9xx_cleanup,
 	/* i945 is the last gpu to need phys mem (for overlay and cursors). */
 	.write_entry = i830_write_entry, 
 	.dma_mask_size = 32,
@@ -1330,6 +1347,7 @@ static const struct intel_gtt_driver g33_gtt_driver = {
 	.gen = 3,
 	.is_g33 = 1,
 	.setup = i9xx_setup,
+	.cleanup = i9xx_cleanup,
 	.write_entry = i965_write_entry,
 	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
@@ -1339,6 +1357,7 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
 	.gen = 3,
 	.is_pineview = 1, .is_g33 = 1,
 	.setup = i9xx_setup,
+	.cleanup = i9xx_cleanup,
 	.write_entry = i965_write_entry,
 	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
@@ -1347,6 +1366,7 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
 static const struct intel_gtt_driver i965_gtt_driver = {
 	.gen = 4,
 	.setup = i9xx_setup,
+	.cleanup = i9xx_cleanup,
 	.write_entry = i965_write_entry,
 	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
@@ -1355,6 +1375,7 @@ static const struct intel_gtt_driver i965_gtt_driver = {
 static const struct intel_gtt_driver g4x_gtt_driver = {
 	.gen = 5,
 	.setup = i9xx_setup,
+	.cleanup = i9xx_cleanup,
 	.write_entry = i965_write_entry,
 	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
@@ -1364,6 +1385,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.gen = 5,
 	.is_ironlake = 1,
 	.setup = i9xx_setup,
+	.cleanup = i9xx_cleanup,
 	.write_entry = i965_write_entry,
 	.dma_mask_size = 36,
 	.check_flags = i830_check_flags,
@@ -1372,6 +1394,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
 static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
 	.setup = i9xx_setup,
+	.cleanup = gen6_cleanup,
 	.write_entry = gen6_write_entry,
 	.dma_mask_size = 40,
 	.check_flags = gen6_check_flags,
-- 
1.7.1

^ permalink raw reply	[flat|nested] 18+ messages in thread

end of thread, other threads:[~2010-09-13 22:34 UTC | newest]

Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
2010-09-13 22:34 ` [PATCH 01/17] intel-gtt: initialize our own scratch page Daniel Vetter
2010-09-13 22:34 ` [PATCH 02/17] intel-gtt: introduce pte write function for i8xx/i915/i945 Daniel Vetter
2010-09-13 22:35 ` [PATCH 03/17] intel-gtt: introduce pte write function for g33/i965/gm45 Daniel Vetter
2010-09-13 22:35 ` [PATCH 04/17] intel-gtt: introduce pte write function for gen6 Daniel Vetter
2010-09-13 22:35 ` [PATCH 05/17] intel-gtt: drop agp scratch page support stuff Daniel Vetter
2010-09-13 22:35 ` [PATCH 06/17] agp: kill agp_(map|unmap)_page Daniel Vetter
2010-09-13 22:35 ` [PATCH 07/17] intel-gtt: generic (insert|remove)_entries for i830 Daniel Vetter
2010-09-13 22:35 ` [PATCH 08/17] intel-gtt: generic (insert|remove)_entries for i915 Daniel Vetter
2010-09-13 22:35 ` [PATCH 09/17] intel-gtt: generic (insert|remove)_entries for g33/i965 Daniel Vetter
2010-09-13 22:35 ` [PATCH 10/17] intel-gtt: generic (insert|remove)_entries for sandybridge Daniel Vetter
2010-09-13 22:35 ` [PATCH 11/17] intel-gtt: kill mask_memory functions Daniel Vetter
2010-09-13 22:35 ` [PATCH 12/17] intel-gtt: move chipset flush to the gtt driver struct Daniel Vetter
2010-09-13 22:35 ` [PATCH 13/17] intel-gtt: consolidate fake_agp driver structs Daniel Vetter
2010-09-13 22:35 ` [PATCH 14/17] agp: kill agp_(unmap|map)_memory Daniel Vetter
2010-09-13 22:35 ` [PATCH 15/17] intel-gtt: clean up gtt size reporting Daniel Vetter
2010-09-13 22:35 ` [PATCH 16/17] intel-gtt: store the dma mask size in intel_gtt_driver Daniel Vetter
2010-09-13 22:35 ` [PATCH 17/17] intel-gtt add a cleanup function for chipset specific stuff Daniel Vetter

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