All of lore.kernel.org
 help / color / mirror / Atom feed
From: Roland Stigge <stigge@antcom.de>
To: arm@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kevin.wells@nxp.com,
	srinivas.bakki@nxp.com, aletes.xgr@gmail.com
Cc: Roland Stigge <stigge@antcom.de>
Subject: [PATCH v2 06/23] ARM: LPC32xx: Add dts for EA3250 reference board
Date: Thu, 14 Jun 2012 18:50:56 +0200	[thread overview]
Message-ID: <1339692673-7848-7-git-send-email-stigge@antcom.de> (raw)
In-Reply-To: <1339692673-7848-1-git-send-email-stigge@antcom.de>

There is another reference/development board for the LPC32xx SoC (besides the
Phytec 3250): The Embedded Artists LPC3250 board. This patch adds a default dts
file for it.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

---
 arch/arm/boot/dts/ea3250.dts |  157 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 157 insertions(+)

--- /dev/null
+++ linux-2.6/arch/arm/boot/dts/ea3250.dts
@@ -0,0 +1,157 @@
+/*
+ * Embedded Artists LPC3250 board
+ *
+ * Copyright 2012 Roland Stigge <stigge@antcom.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "lpc32xx.dtsi"
+
+/ {
+	model = "Embedded Artists LPC3250 board based on NXP LPC3250";
+	compatible = "ea,ea3250", "nxp,lpc3250";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x4000000>;
+	};
+
+	ahb {
+		mac: ethernet@31060000 {
+			phy-mode = "rmii";
+			use-iram;
+		};
+
+		/* Here, choose exactly one from: ohci, usbd */
+		ohci@31020000 {
+			transceiver = <&isp1301>;
+			status = "okay";
+		};
+
+/*
+		usbd@31020000 {
+			transceiver = <&isp1301>;
+			status = "okay";
+		};
+*/
+
+		/* 128MB Flash via SLC NAND controller */
+		slc: flash@20020000 {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			nxp,wdr-clks = <14>;
+			nxp,wwidth = <260000000>;
+			nxp,whold = <104000000>;
+			nxp,wsetup = <200000000>;
+			nxp,rdr-clks = <14>;
+			nxp,rwidth = <34666666>;
+			nxp,rhold = <104000000>;
+			nxp,rsetup = <200000000>;
+			nand-on-flash-bbt;
+			gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
+
+			mtd0@00000000 {
+				label = "ea3250-boot";
+				reg = <0x00000000 0x00080000>;
+				read-only;
+			};
+
+			mtd1@00080000 {
+				label = "ea3250-uboot";
+				reg = <0x00080000 0x000c0000>;
+				read-only;
+			};
+
+			mtd2@00140000 {
+				label = "ea3250-kernel";
+				reg = <0x00140000 0x00400000>;
+			};
+
+			mtd3@00540000 {
+				label = "ea3250-rootfs";
+				reg = <0x00540000 0x07ac0000>;
+			};
+		};
+
+		apb {
+			uart5: serial@40090000 {
+				status = "okay";
+			};
+
+			uart3: serial@40080000 {
+				status = "okay";
+			};
+
+			uart6: serial@40098000 {
+				status = "okay";
+			};
+
+			i2c1: i2c@400A0000 {
+				clock-frequency = <100000>;
+
+				eeprom@50 {
+					compatible = "at,24c256";
+					reg = <0x50>;
+				};
+
+				eeprom@57 {
+					compatible = "at,24c64";
+					reg = <0x57>;
+				};
+
+				uda1380: uda1380@18 {
+					compatible = "nxp,uda1380";
+					reg = <0x18>;
+					power-gpio = <&gpio 0x59 0>;
+					reset-gpio = <&gpio 0x51 0>;
+					dac-clk = "wspll";
+				};
+
+				pca9532: pca9532@60 {
+					compatible = "nxp,pca9532";
+					gpio-controller;
+					#gpio-cells = <2>;
+					reg = <0x60>;
+				};
+			};
+
+			i2c2: i2c@400A8000 {
+				clock-frequency = <100000>;
+			};
+
+			i2cusb: i2c@31020300 {
+				clock-frequency = <100000>;
+
+				isp1301: usb-transceiver@2d {
+					compatible = "nxp,isp1301";
+					reg = <0x2d>;
+				};
+			};
+
+			sd@20098000 {
+				wp-gpios = <&pca9532 5 0>;
+				cd-gpios = <&pca9532 4 0>;
+				cd-inverted;
+				bus-width = <4>;
+				status = "okay";
+			};
+		};
+
+		fab {
+			uart1: serial@40014000 {
+				status = "okay";
+			};
+		};
+	};
+};

WARNING: multiple messages have this Message-ID (diff)
From: stigge@antcom.de (Roland Stigge)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 06/23] ARM: LPC32xx: Add dts for EA3250 reference board
Date: Thu, 14 Jun 2012 18:50:56 +0200	[thread overview]
Message-ID: <1339692673-7848-7-git-send-email-stigge@antcom.de> (raw)
In-Reply-To: <1339692673-7848-1-git-send-email-stigge@antcom.de>

There is another reference/development board for the LPC32xx SoC (besides the
Phytec 3250): The Embedded Artists LPC3250 board. This patch adds a default dts
file for it.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

---
 arch/arm/boot/dts/ea3250.dts |  157 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 157 insertions(+)

--- /dev/null
+++ linux-2.6/arch/arm/boot/dts/ea3250.dts
@@ -0,0 +1,157 @@
+/*
+ * Embedded Artists LPC3250 board
+ *
+ * Copyright 2012 Roland Stigge <stigge@antcom.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "lpc32xx.dtsi"
+
+/ {
+	model = "Embedded Artists LPC3250 board based on NXP LPC3250";
+	compatible = "ea,ea3250", "nxp,lpc3250";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x4000000>;
+	};
+
+	ahb {
+		mac: ethernet at 31060000 {
+			phy-mode = "rmii";
+			use-iram;
+		};
+
+		/* Here, choose exactly one from: ohci, usbd */
+		ohci at 31020000 {
+			transceiver = <&isp1301>;
+			status = "okay";
+		};
+
+/*
+		usbd at 31020000 {
+			transceiver = <&isp1301>;
+			status = "okay";
+		};
+*/
+
+		/* 128MB Flash via SLC NAND controller */
+		slc: flash at 20020000 {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			nxp,wdr-clks = <14>;
+			nxp,wwidth = <260000000>;
+			nxp,whold = <104000000>;
+			nxp,wsetup = <200000000>;
+			nxp,rdr-clks = <14>;
+			nxp,rwidth = <34666666>;
+			nxp,rhold = <104000000>;
+			nxp,rsetup = <200000000>;
+			nand-on-flash-bbt;
+			gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
+
+			mtd0 at 00000000 {
+				label = "ea3250-boot";
+				reg = <0x00000000 0x00080000>;
+				read-only;
+			};
+
+			mtd1 at 00080000 {
+				label = "ea3250-uboot";
+				reg = <0x00080000 0x000c0000>;
+				read-only;
+			};
+
+			mtd2 at 00140000 {
+				label = "ea3250-kernel";
+				reg = <0x00140000 0x00400000>;
+			};
+
+			mtd3 at 00540000 {
+				label = "ea3250-rootfs";
+				reg = <0x00540000 0x07ac0000>;
+			};
+		};
+
+		apb {
+			uart5: serial at 40090000 {
+				status = "okay";
+			};
+
+			uart3: serial at 40080000 {
+				status = "okay";
+			};
+
+			uart6: serial at 40098000 {
+				status = "okay";
+			};
+
+			i2c1: i2c at 400A0000 {
+				clock-frequency = <100000>;
+
+				eeprom at 50 {
+					compatible = "at,24c256";
+					reg = <0x50>;
+				};
+
+				eeprom at 57 {
+					compatible = "at,24c64";
+					reg = <0x57>;
+				};
+
+				uda1380: uda1380 at 18 {
+					compatible = "nxp,uda1380";
+					reg = <0x18>;
+					power-gpio = <&gpio 0x59 0>;
+					reset-gpio = <&gpio 0x51 0>;
+					dac-clk = "wspll";
+				};
+
+				pca9532: pca9532 at 60 {
+					compatible = "nxp,pca9532";
+					gpio-controller;
+					#gpio-cells = <2>;
+					reg = <0x60>;
+				};
+			};
+
+			i2c2: i2c at 400A8000 {
+				clock-frequency = <100000>;
+			};
+
+			i2cusb: i2c at 31020300 {
+				clock-frequency = <100000>;
+
+				isp1301: usb-transceiver at 2d {
+					compatible = "nxp,isp1301";
+					reg = <0x2d>;
+				};
+			};
+
+			sd at 20098000 {
+				wp-gpios = <&pca9532 5 0>;
+				cd-gpios = <&pca9532 4 0>;
+				cd-inverted;
+				bus-width = <4>;
+				status = "okay";
+			};
+		};
+
+		fab {
+			uart1: serial at 40014000 {
+				status = "okay";
+			};
+		};
+	};
+};

  parent reply	other threads:[~2012-06-14 16:51 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-14 16:50 [PATCH v2 00/23] ARM: LPC32xx specific updates for next Roland Stigge
2012-06-14 16:50 ` Roland Stigge
2012-06-14 16:50 ` [PATCH v2 01/23] ARM: LPC32xx: Add NAND flash timing to PHY3250 board dts Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-06-14 16:50 ` [PATCH v2 02/23] ARM: LPC32xx: Clock initialization for NAND controllers Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-06-14 16:50 ` [PATCH v2 03/23] ARM: LPC32xx: Remove SLC controller initialization from platform init Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-06-14 16:50 ` [PATCH v2 04/23] ARM: LPC32xx: Add DMA configuration to platform data Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-07-10 21:36   ` Arnd Bergmann
2012-07-10 21:36     ` Arnd Bergmann
2012-07-11  8:28     ` Roland Stigge
2012-07-11  8:28       ` Roland Stigge
2012-07-11 12:33       ` Arnd Bergmann
2012-07-11 12:33         ` Arnd Bergmann
2012-07-11 12:40         ` Roland Stigge
2012-07-11 12:40           ` Roland Stigge
2012-07-11 13:25           ` Arnd Bergmann
2012-07-11 13:25             ` Arnd Bergmann
2012-07-11 13:39             ` Roland Stigge
2012-07-11 13:39               ` Roland Stigge
2012-06-14 16:50 ` [PATCH v2 05/23] ARM: LPC32xx: Adjust dtsi file for MLC controller configuration Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-06-14 16:50 ` Roland Stigge [this message]
2012-06-14 16:50   ` [PATCH v2 06/23] ARM: LPC32xx: Add dts for EA3250 reference board Roland Stigge
2012-06-14 16:50 ` [PATCH v2 07/23] ARM: LPC32xx: DTS adjustment for key matrix controller Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-06-14 16:50 ` [PATCH v2 08/23] ARM: LPC32xx: Clock " Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-06-14 16:50 ` [PATCH v2 09/23] ARM: LPC32xx: Defconfig update Roland Stigge
2012-06-14 16:50   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 10/23] ARM: LPC32xx: Add MMC controller support Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 11/23] ARM: LPC32xx: DTS adjustment for using pl18x primecell Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 12/23] ARM: LPC32xx: DT conversion of Standard UARTs Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 13/23] ARM: LPC32xx: High Speed UART configuration via DT Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 14/23] ARM: LPC32xx: Remove mach specific ARCH_NR_GPIOS, use default Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 15/23] ARM: LPC32xx: Fix lpc32xx.dtsi status property: "disable" -> "disabled" Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 16/23] ARM: LPC32xx: Build arch dtbs Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 17/23] ARM: LPC32xx: Add dt settings to the at25 node Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 18/23] ARM: LPC32xx: Remove spi chipselect request from board init Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 19/23] ARM: LPC32xx: Remove spi chip definitions Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 20/23] ARM: LPC32xx: Cleanup board init, remove duplicate clock init Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 21/23] ARM: LPC32xx: Move uart6 irda disable to serial.c Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 22/23] ARM: LPC32xx: Move i2s1 dma enabling to clock.c Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-14 16:51 ` [PATCH v2 23/23] ARM: LPC32xx: Remove duplicate usb host clock init Roland Stigge
2012-06-14 16:51   ` Roland Stigge
2012-06-15 12:07 ` [PATCH v2 00/23] ARM: LPC32xx specific updates for next Arnd Bergmann
2012-06-15 12:07   ` Arnd Bergmann
2012-06-15 12:12   ` Alexandre Pereira da Silva
2012-06-15 12:12     ` Alexandre Pereira da Silva
2012-06-15 12:37     ` Roland Stigge
2012-06-15 12:37       ` Roland Stigge

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1339692673-7848-7-git-send-email-stigge@antcom.de \
    --to=stigge@antcom.de \
    --cc=aletes.xgr@gmail.com \
    --cc=arm@kernel.org \
    --cc=kevin.wells@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=srinivas.bakki@nxp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.