From: "Philip, Avinash" <avinashphilip@ti.com>
To: <dwmw2@infradead.org>, <artem.bityutskiy@linux.intel.com>,
<tony@atomide.com>
Cc: <afzal@ti.com>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-doc@vger.kernel.org>,
<devicetree-discuss@lists.ozlabs.org>, <ivan.djelic@parrot.com>,
"Philip, Avinash" <avinashphilip@ti.com>
Subject: [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength
Date: Wed, 3 Oct 2012 19:59:46 +0530 [thread overview]
Message-ID: <1349274589-11389-2-git-send-email-avinashphilip@ti.com> (raw)
In-Reply-To: <1349274589-11389-1-git-send-email-avinashphilip@ti.com>
Update number of errors using nand ecc strength.
Also add macro definitions BCH8_ERROR_MAX & BCH4_ERROR_MAX
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
---
:100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c
drivers/mtd/nand/omap2.c | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b31386..af511a9 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -111,6 +111,9 @@
#define ECCCLEAR 0x100
#define ECC1 0x1
+#define BCH8_MAX_ERROR 8 /* upto 8 bit coorectable */
+#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */
+
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
@@ -1034,7 +1037,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
mtd);
struct nand_chip *chip = mtd->priv;
- nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
+ nerrors = info->nand.ecc.strength;
dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
/*
* Program GPMC to perform correction on one 512-byte sector at a time.
@@ -1129,13 +1132,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
#ifdef CONFIG_MTD_NAND_OMAP_BCH8
- const int hw_errors = 8;
+ const int hw_errors = BCH8_MAX_ERROR;
#else
- const int hw_errors = 4;
+ const int hw_errors = BCH4_MAX_ERROR;
#endif
info->bch = NULL;
- max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4;
+ max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
+ BCH8_MAX_ERROR : BCH4_MAX_ERROR;
if (max_errors != hw_errors) {
pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported",
max_errors, hw_errors);
--
1.7.0.4
WARNING: multiple messages have this Message-ID (diff)
From: "Philip, Avinash" <avinashphilip@ti.com>
To: dwmw2@infradead.org, artem.bityutskiy@linux.intel.com, tony@atomide.com
Cc: afzal@ti.com, linux-mtd@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
devicetree-discuss@lists.ozlabs.org, ivan.djelic@parrot.com,
"Philip, Avinash" <avinashphilip@ti.com>
Subject: [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength
Date: Wed, 3 Oct 2012 19:59:46 +0530 [thread overview]
Message-ID: <1349274589-11389-2-git-send-email-avinashphilip@ti.com> (raw)
In-Reply-To: <1349274589-11389-1-git-send-email-avinashphilip@ti.com>
Update number of errors using nand ecc strength.
Also add macro definitions BCH8_ERROR_MAX & BCH4_ERROR_MAX
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
---
:100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c
drivers/mtd/nand/omap2.c | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b31386..af511a9 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -111,6 +111,9 @@
#define ECCCLEAR 0x100
#define ECC1 0x1
+#define BCH8_MAX_ERROR 8 /* upto 8 bit coorectable */
+#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */
+
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
@@ -1034,7 +1037,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
mtd);
struct nand_chip *chip = mtd->priv;
- nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
+ nerrors = info->nand.ecc.strength;
dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
/*
* Program GPMC to perform correction on one 512-byte sector at a time.
@@ -1129,13 +1132,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
#ifdef CONFIG_MTD_NAND_OMAP_BCH8
- const int hw_errors = 8;
+ const int hw_errors = BCH8_MAX_ERROR;
#else
- const int hw_errors = 4;
+ const int hw_errors = BCH4_MAX_ERROR;
#endif
info->bch = NULL;
- max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4;
+ max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
+ BCH8_MAX_ERROR : BCH4_MAX_ERROR;
if (max_errors != hw_errors) {
pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported",
max_errors, hw_errors);
--
1.7.0.4
WARNING: multiple messages have this Message-ID (diff)
From: "Philip, Avinash" <avinashphilip@ti.com>
To: <dwmw2@infradead.org>, <artem.bityutskiy@linux.intel.com>,
<tony@atomide.com>
Cc: afzal@ti.com, linux-doc@vger.kernel.org,
devicetree-discuss@lists.ozlabs.org,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
ivan.djelic@parrot.com, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength
Date: Wed, 3 Oct 2012 19:59:46 +0530 [thread overview]
Message-ID: <1349274589-11389-2-git-send-email-avinashphilip@ti.com> (raw)
In-Reply-To: <1349274589-11389-1-git-send-email-avinashphilip@ti.com>
Update number of errors using nand ecc strength.
Also add macro definitions BCH8_ERROR_MAX & BCH4_ERROR_MAX
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
---
:100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c
drivers/mtd/nand/omap2.c | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b31386..af511a9 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -111,6 +111,9 @@
#define ECCCLEAR 0x100
#define ECC1 0x1
+#define BCH8_MAX_ERROR 8 /* upto 8 bit coorectable */
+#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */
+
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
@@ -1034,7 +1037,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
mtd);
struct nand_chip *chip = mtd->priv;
- nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
+ nerrors = info->nand.ecc.strength;
dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
/*
* Program GPMC to perform correction on one 512-byte sector at a time.
@@ -1129,13 +1132,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
#ifdef CONFIG_MTD_NAND_OMAP_BCH8
- const int hw_errors = 8;
+ const int hw_errors = BCH8_MAX_ERROR;
#else
- const int hw_errors = 4;
+ const int hw_errors = BCH4_MAX_ERROR;
#endif
info->bch = NULL;
- max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4;
+ max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
+ BCH8_MAX_ERROR : BCH4_MAX_ERROR;
if (max_errors != hw_errors) {
pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported",
max_errors, hw_errors);
--
1.7.0.4
WARNING: multiple messages have this Message-ID (diff)
From: avinashphilip@ti.com (Philip, Avinash)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength
Date: Wed, 3 Oct 2012 19:59:46 +0530 [thread overview]
Message-ID: <1349274589-11389-2-git-send-email-avinashphilip@ti.com> (raw)
In-Reply-To: <1349274589-11389-1-git-send-email-avinashphilip@ti.com>
Update number of errors using nand ecc strength.
Also add macro definitions BCH8_ERROR_MAX & BCH4_ERROR_MAX
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
---
:100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c
drivers/mtd/nand/omap2.c | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b31386..af511a9 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -111,6 +111,9 @@
#define ECCCLEAR 0x100
#define ECC1 0x1
+#define BCH8_MAX_ERROR 8 /* upto 8 bit coorectable */
+#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */
+
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
@@ -1034,7 +1037,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
mtd);
struct nand_chip *chip = mtd->priv;
- nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
+ nerrors = info->nand.ecc.strength;
dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
/*
* Program GPMC to perform correction on one 512-byte sector at a time.
@@ -1129,13 +1132,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
#ifdef CONFIG_MTD_NAND_OMAP_BCH8
- const int hw_errors = 8;
+ const int hw_errors = BCH8_MAX_ERROR;
#else
- const int hw_errors = 4;
+ const int hw_errors = BCH4_MAX_ERROR;
#endif
info->bch = NULL;
- max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4;
+ max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
+ BCH8_MAX_ERROR : BCH4_MAX_ERROR;
if (max_errors != hw_errors) {
pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported",
max_errors, hw_errors);
--
1.7.0.4
next prev parent reply other threads:[~2012-10-03 14:49 UTC|newest]
Thread overview: 103+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-03 14:29 [PATCH 0/4] mtd: nand: OMAP: Add support to use ELM as error correction module Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash [this message]
2012-10-03 14:29 ` [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-15 18:56 ` Peter Korsgaard
2012-10-15 18:56 ` Peter Korsgaard
2012-10-15 18:56 ` Peter Korsgaard
2012-10-15 18:56 ` Peter Korsgaard
2012-10-23 10:17 ` Philip, Avinash
2012-10-23 10:17 ` Philip, Avinash
2012-10-23 10:17 ` Philip, Avinash
2012-10-23 10:17 ` Philip, Avinash
2012-10-03 14:29 ` [PATCH 2/4] mtd: devices: elm: Add support for ELM error correction Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 15:10 ` Peter Meerwald
2012-10-03 15:10 ` Peter Meerwald
2012-10-03 15:10 ` Peter Meerwald
2012-10-04 7:49 ` Philip, Avinash
2012-10-04 7:49 ` Philip, Avinash
2012-10-04 7:49 ` Philip, Avinash
2012-10-04 7:49 ` Philip, Avinash
2012-10-15 19:40 ` Peter Korsgaard
2012-10-15 19:40 ` Peter Korsgaard
2012-10-15 19:40 ` Peter Korsgaard
2012-10-15 19:40 ` Peter Korsgaard
2012-10-23 10:17 ` Philip, Avinash
2012-10-23 10:17 ` Philip, Avinash
2012-10-23 10:17 ` Philip, Avinash
2012-10-23 10:17 ` Philip, Avinash
2012-10-03 14:29 ` [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 18:54 ` Ivan Djelic
2012-10-03 18:54 ` Ivan Djelic
2012-10-03 18:54 ` Ivan Djelic
2012-10-03 18:54 ` Ivan Djelic
2012-10-04 8:03 ` Philip, Avinash
2012-10-04 8:03 ` Philip, Avinash
2012-10-04 8:03 ` Philip, Avinash
2012-10-04 8:03 ` Philip, Avinash
2012-10-04 12:04 ` Ivan Djelic
2012-10-04 12:04 ` Ivan Djelic
2012-10-04 12:04 ` Ivan Djelic
2012-10-04 12:04 ` Ivan Djelic
2012-10-15 18:48 ` Peter Korsgaard
2012-10-15 18:48 ` Peter Korsgaard
2012-10-15 18:48 ` Peter Korsgaard
2012-10-15 18:48 ` Peter Korsgaard
2012-10-23 10:18 ` Philip, Avinash
2012-10-23 10:18 ` Philip, Avinash
2012-10-23 10:18 ` Philip, Avinash
2012-10-23 10:18 ` Philip, Avinash
2012-10-03 14:29 ` [PATCH 4/4] mtd: nand: omap2: Add data correction support Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 19:20 ` Ivan Djelic
2012-10-03 19:20 ` Ivan Djelic
2012-10-03 19:20 ` Ivan Djelic
2012-10-03 19:20 ` Ivan Djelic
2012-10-04 10:22 ` Philip, Avinash
2012-10-04 10:22 ` Philip, Avinash
2012-10-04 10:22 ` Philip, Avinash
2012-10-04 10:22 ` Philip, Avinash
2012-10-05 8:51 ` Philip, Avinash
2012-10-05 8:51 ` Philip, Avinash
2012-10-05 8:51 ` Philip, Avinash
2012-10-05 8:51 ` Philip, Avinash
2012-10-05 14:23 ` Ivan Djelic
2012-10-05 14:23 ` Ivan Djelic
2012-10-05 14:23 ` Ivan Djelic
2012-10-05 14:23 ` Ivan Djelic
2012-10-09 12:36 ` Philip, Avinash
2012-10-09 12:36 ` Philip, Avinash
2012-10-09 12:36 ` Philip, Avinash
2012-10-09 12:36 ` Philip, Avinash
2012-10-10 17:08 ` Ivan Djelic
2012-10-10 17:08 ` Ivan Djelic
2012-10-10 17:08 ` Ivan Djelic
2012-10-10 17:08 ` Ivan Djelic
2012-10-11 5:27 ` Philip, Avinash
2012-10-11 5:27 ` Philip, Avinash
2012-10-11 5:27 ` Philip, Avinash
2012-10-11 5:27 ` Philip, Avinash
2012-10-11 8:21 ` Ivan Djelic
2012-10-11 8:21 ` Ivan Djelic
2012-10-11 8:21 ` Ivan Djelic
2012-10-11 8:21 ` Ivan Djelic
2012-10-11 9:05 ` Philip, Avinash
2012-10-11 9:05 ` Philip, Avinash
2012-10-11 9:05 ` Philip, Avinash
2012-10-11 9:05 ` Philip, Avinash
2012-10-11 14:41 ` Tony Lindgren
2012-10-11 14:41 ` Tony Lindgren
2012-10-11 14:41 ` Tony Lindgren
2012-10-11 14:41 ` Tony Lindgren
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