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From: Ivan Djelic <ivan.djelic@parrot.com>
To: "Philip, Avinash" <avinashphilip@ti.com>, <tony@atomide.com>,
	<afzal@ti.com>
Cc: "dwmw2@infradead.org" <dwmw2@infradead.org>,
	"artem.bityutskiy@linux.intel.com"
	<artem.bityutskiy@linux.intel.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support
Date: Thu, 11 Oct 2012 10:21:49 +0200	[thread overview]
Message-ID: <20121011082149.GA15609@parrot.com> (raw)
In-Reply-To: <518397C60809E147AF5323E0420B992E3E9CB751@DBDE01.ent.ti.com>

On Thu, Oct 11, 2012 at 06:27:13AM +0100, Philip, Avinash wrote:
(...)
> > Another simple strategy could use the fact that you add a 14th zero byte to
> > the 13 BCH bytes for RBL compatibility:
> 
> RBL compatibility (14th byte) is applicable only for BCH8 ecc scheme.
> 
> So I am planning adding an extra byte (0) for BCH4 ecc scheme. So with this
> we can go for same approaches in BCH4 & BCH8 ecc scheme.
> 
> If I understood correctly, software BCH ecc scheme is modifying calculated
> ecc data to handle bit flips in erased pages.
> 
> If that is the only reason, whether same logic can go for same ECC calculation
> (remove modification of calculated ecc in case of software ecc correction)
> by adding an extra byte (0) in spare area to handle erased pages.
> 
> So can you share if I am missing something?

Yes, the only reason why a constant polynomial is added to hw-generated ECC bytes is to transparently handle bitflips in erased pages.
Handling erased pages this way has several benefits over the zero byte hack:
- cleaner code, no checking of the zero byte
- no expensive scan of data+spare area when reading an erased block: this step can significantly slow down the initial UBI scan (lots of erased pages to read)
- no need to worry about the (very unlikely) possibility of having more than 4 bitflips in the zero byte

OTOH, having the same ECC codes for both ELM and non-ELM chips with RBL compatibility sounds nice and would also simplify things.
Note: on platforms where we use SW BCH correction, we also use the MLC OMAP boot mode, which is more robust and not compatible with 8-bit/4-bit BCH layouts.

I don't know which way is better for the OMAP community:
1. Unifying ECC modes = loosing the constant polynomial benefits, but gaining RBL compat and simplifying code
2. Keeping separate ECC modes = code bloat

Tony, do you have an opinion on this ?

BTW, Afzal is submitting a series of patches [1] which are not compatible with your series; is there any plan to merge your patches ?

BR,
--
Ivan

[1] http://lists.infradead.org/pipermail/linux-mtd/2012-October/044374.html

WARNING: multiple messages have this Message-ID (diff)
From: Ivan Djelic <ivan.djelic@parrot.com>
To: "Philip, Avinash" <avinashphilip@ti.com>, tony@atomide.com, afzal@ti.com
Cc: "dwmw2@infradead.org" <dwmw2@infradead.org>,
	"artem.bityutskiy@linux.intel.com"
	<artem.bityutskiy@linux.intel.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support
Date: Thu, 11 Oct 2012 10:21:49 +0200	[thread overview]
Message-ID: <20121011082149.GA15609@parrot.com> (raw)
In-Reply-To: <518397C60809E147AF5323E0420B992E3E9CB751@DBDE01.ent.ti.com>

On Thu, Oct 11, 2012 at 06:27:13AM +0100, Philip, Avinash wrote:
(...)
> > Another simple strategy could use the fact that you add a 14th zero byte to
> > the 13 BCH bytes for RBL compatibility:
> 
> RBL compatibility (14th byte) is applicable only for BCH8 ecc scheme.
> 
> So I am planning adding an extra byte (0) for BCH4 ecc scheme. So with this
> we can go for same approaches in BCH4 & BCH8 ecc scheme.
> 
> If I understood correctly, software BCH ecc scheme is modifying calculated
> ecc data to handle bit flips in erased pages.
> 
> If that is the only reason, whether same logic can go for same ECC calculation
> (remove modification of calculated ecc in case of software ecc correction)
> by adding an extra byte (0) in spare area to handle erased pages.
> 
> So can you share if I am missing something?

Yes, the only reason why a constant polynomial is added to hw-generated ECC bytes is to transparently handle bitflips in erased pages.
Handling erased pages this way has several benefits over the zero byte hack:
- cleaner code, no checking of the zero byte
- no expensive scan of data+spare area when reading an erased block: this step can significantly slow down the initial UBI scan (lots of erased pages to read)
- no need to worry about the (very unlikely) possibility of having more than 4 bitflips in the zero byte

OTOH, having the same ECC codes for both ELM and non-ELM chips with RBL compatibility sounds nice and would also simplify things.
Note: on platforms where we use SW BCH correction, we also use the MLC OMAP boot mode, which is more robust and not compatible with 8-bit/4-bit BCH layouts.

I don't know which way is better for the OMAP community:
1. Unifying ECC modes = loosing the constant polynomial benefits, but gaining RBL compat and simplifying code
2. Keeping separate ECC modes = code bloat

Tony, do you have an opinion on this ?

BTW, Afzal is submitting a series of patches [1] which are not compatible with your series; is there any plan to merge your patches ?

BR,
--
Ivan

[1] http://lists.infradead.org/pipermail/linux-mtd/2012-October/044374.html

WARNING: multiple messages have this Message-ID (diff)
From: Ivan Djelic <ivan.djelic@parrot.com>
To: "Philip, Avinash" <avinashphilip@ti.com>, <tony@atomide.com>,
	<afzal@ti.com>
Cc: "artem.bityutskiy@linux.intel.com"
	<artem.bityutskiy@linux.intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
	"dwmw2@infradead.org" <dwmw2@infradead.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support
Date: Thu, 11 Oct 2012 10:21:49 +0200	[thread overview]
Message-ID: <20121011082149.GA15609@parrot.com> (raw)
In-Reply-To: <518397C60809E147AF5323E0420B992E3E9CB751@DBDE01.ent.ti.com>

On Thu, Oct 11, 2012 at 06:27:13AM +0100, Philip, Avinash wrote:
(...)
> > Another simple strategy could use the fact that you add a 14th zero byte to
> > the 13 BCH bytes for RBL compatibility:
> 
> RBL compatibility (14th byte) is applicable only for BCH8 ecc scheme.
> 
> So I am planning adding an extra byte (0) for BCH4 ecc scheme. So with this
> we can go for same approaches in BCH4 & BCH8 ecc scheme.
> 
> If I understood correctly, software BCH ecc scheme is modifying calculated
> ecc data to handle bit flips in erased pages.
> 
> If that is the only reason, whether same logic can go for same ECC calculation
> (remove modification of calculated ecc in case of software ecc correction)
> by adding an extra byte (0) in spare area to handle erased pages.
> 
> So can you share if I am missing something?

Yes, the only reason why a constant polynomial is added to hw-generated ECC bytes is to transparently handle bitflips in erased pages.
Handling erased pages this way has several benefits over the zero byte hack:
- cleaner code, no checking of the zero byte
- no expensive scan of data+spare area when reading an erased block: this step can significantly slow down the initial UBI scan (lots of erased pages to read)
- no need to worry about the (very unlikely) possibility of having more than 4 bitflips in the zero byte

OTOH, having the same ECC codes for both ELM and non-ELM chips with RBL compatibility sounds nice and would also simplify things.
Note: on platforms where we use SW BCH correction, we also use the MLC OMAP boot mode, which is more robust and not compatible with 8-bit/4-bit BCH layouts.

I don't know which way is better for the OMAP community:
1. Unifying ECC modes = loosing the constant polynomial benefits, but gaining RBL compat and simplifying code
2. Keeping separate ECC modes = code bloat

Tony, do you have an opinion on this ?

BTW, Afzal is submitting a series of patches [1] which are not compatible with your series; is there any plan to merge your patches ?

BR,
--
Ivan

[1] http://lists.infradead.org/pipermail/linux-mtd/2012-October/044374.html

WARNING: multiple messages have this Message-ID (diff)
From: ivan.djelic@parrot.com (Ivan Djelic)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/4] mtd: nand: omap2: Add data correction support
Date: Thu, 11 Oct 2012 10:21:49 +0200	[thread overview]
Message-ID: <20121011082149.GA15609@parrot.com> (raw)
In-Reply-To: <518397C60809E147AF5323E0420B992E3E9CB751@DBDE01.ent.ti.com>

On Thu, Oct 11, 2012 at 06:27:13AM +0100, Philip, Avinash wrote:
(...)
> > Another simple strategy could use the fact that you add a 14th zero byte to
> > the 13 BCH bytes for RBL compatibility:
> 
> RBL compatibility (14th byte) is applicable only for BCH8 ecc scheme.
> 
> So I am planning adding an extra byte (0) for BCH4 ecc scheme. So with this
> we can go for same approaches in BCH4 & BCH8 ecc scheme.
> 
> If I understood correctly, software BCH ecc scheme is modifying calculated
> ecc data to handle bit flips in erased pages.
> 
> If that is the only reason, whether same logic can go for same ECC calculation
> (remove modification of calculated ecc in case of software ecc correction)
> by adding an extra byte (0) in spare area to handle erased pages.
> 
> So can you share if I am missing something?

Yes, the only reason why a constant polynomial is added to hw-generated ECC bytes is to transparently handle bitflips in erased pages.
Handling erased pages this way has several benefits over the zero byte hack:
- cleaner code, no checking of the zero byte
- no expensive scan of data+spare area when reading an erased block: this step can significantly slow down the initial UBI scan (lots of erased pages to read)
- no need to worry about the (very unlikely) possibility of having more than 4 bitflips in the zero byte

OTOH, having the same ECC codes for both ELM and non-ELM chips with RBL compatibility sounds nice and would also simplify things.
Note: on platforms where we use SW BCH correction, we also use the MLC OMAP boot mode, which is more robust and not compatible with 8-bit/4-bit BCH layouts.

I don't know which way is better for the OMAP community:
1. Unifying ECC modes = loosing the constant polynomial benefits, but gaining RBL compat and simplifying code
2. Keeping separate ECC modes = code bloat

Tony, do you have an opinion on this ?

BTW, Afzal is submitting a series of patches [1] which are not compatible with your series; is there any plan to merge your patches ?

BR,
--
Ivan

[1] http://lists.infradead.org/pipermail/linux-mtd/2012-October/044374.html

  reply	other threads:[~2012-10-11  8:21 UTC|newest]

Thread overview: 103+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-03 14:29 [PATCH 0/4] mtd: nand: OMAP: Add support to use ELM as error correction module Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` Philip, Avinash
2012-10-03 14:29 ` [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-15 18:56   ` Peter Korsgaard
2012-10-15 18:56     ` Peter Korsgaard
2012-10-15 18:56     ` Peter Korsgaard
2012-10-15 18:56     ` Peter Korsgaard
2012-10-23 10:17     ` Philip, Avinash
2012-10-23 10:17       ` Philip, Avinash
2012-10-23 10:17       ` Philip, Avinash
2012-10-23 10:17       ` Philip, Avinash
2012-10-03 14:29 ` [PATCH 2/4] mtd: devices: elm: Add support for ELM error correction Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 15:10   ` Peter Meerwald
2012-10-03 15:10     ` Peter Meerwald
2012-10-03 15:10     ` Peter Meerwald
2012-10-04  7:49     ` Philip, Avinash
2012-10-04  7:49       ` Philip, Avinash
2012-10-04  7:49       ` Philip, Avinash
2012-10-04  7:49       ` Philip, Avinash
2012-10-15 19:40   ` Peter Korsgaard
2012-10-15 19:40     ` Peter Korsgaard
2012-10-15 19:40     ` Peter Korsgaard
2012-10-15 19:40     ` Peter Korsgaard
2012-10-23 10:17     ` Philip, Avinash
2012-10-23 10:17       ` Philip, Avinash
2012-10-23 10:17       ` Philip, Avinash
2012-10-23 10:17       ` Philip, Avinash
2012-10-03 14:29 ` [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 18:54   ` Ivan Djelic
2012-10-03 18:54     ` Ivan Djelic
2012-10-03 18:54     ` Ivan Djelic
2012-10-03 18:54     ` Ivan Djelic
2012-10-04  8:03     ` Philip, Avinash
2012-10-04  8:03       ` Philip, Avinash
2012-10-04  8:03       ` Philip, Avinash
2012-10-04  8:03       ` Philip, Avinash
2012-10-04 12:04       ` Ivan Djelic
2012-10-04 12:04         ` Ivan Djelic
2012-10-04 12:04         ` Ivan Djelic
2012-10-04 12:04         ` Ivan Djelic
2012-10-15 18:48   ` Peter Korsgaard
2012-10-15 18:48     ` Peter Korsgaard
2012-10-15 18:48     ` Peter Korsgaard
2012-10-15 18:48     ` Peter Korsgaard
2012-10-23 10:18     ` Philip, Avinash
2012-10-23 10:18       ` Philip, Avinash
2012-10-23 10:18       ` Philip, Avinash
2012-10-23 10:18       ` Philip, Avinash
2012-10-03 14:29 ` [PATCH 4/4] mtd: nand: omap2: Add data correction support Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 14:29   ` Philip, Avinash
2012-10-03 19:20   ` Ivan Djelic
2012-10-03 19:20     ` Ivan Djelic
2012-10-03 19:20     ` Ivan Djelic
2012-10-03 19:20     ` Ivan Djelic
2012-10-04 10:22     ` Philip, Avinash
2012-10-04 10:22       ` Philip, Avinash
2012-10-04 10:22       ` Philip, Avinash
2012-10-04 10:22       ` Philip, Avinash
2012-10-05  8:51     ` Philip, Avinash
2012-10-05  8:51       ` Philip, Avinash
2012-10-05  8:51       ` Philip, Avinash
2012-10-05  8:51       ` Philip, Avinash
2012-10-05 14:23       ` Ivan Djelic
2012-10-05 14:23         ` Ivan Djelic
2012-10-05 14:23         ` Ivan Djelic
2012-10-05 14:23         ` Ivan Djelic
2012-10-09 12:36         ` Philip, Avinash
2012-10-09 12:36           ` Philip, Avinash
2012-10-09 12:36           ` Philip, Avinash
2012-10-09 12:36           ` Philip, Avinash
2012-10-10 17:08           ` Ivan Djelic
2012-10-10 17:08             ` Ivan Djelic
2012-10-10 17:08             ` Ivan Djelic
2012-10-10 17:08             ` Ivan Djelic
2012-10-11  5:27             ` Philip, Avinash
2012-10-11  5:27               ` Philip, Avinash
2012-10-11  5:27               ` Philip, Avinash
2012-10-11  5:27               ` Philip, Avinash
2012-10-11  8:21               ` Ivan Djelic [this message]
2012-10-11  8:21                 ` Ivan Djelic
2012-10-11  8:21                 ` Ivan Djelic
2012-10-11  8:21                 ` Ivan Djelic
2012-10-11  9:05                 ` Philip, Avinash
2012-10-11  9:05                   ` Philip, Avinash
2012-10-11  9:05                   ` Philip, Avinash
2012-10-11  9:05                   ` Philip, Avinash
2012-10-11 14:41                 ` Tony Lindgren
2012-10-11 14:41                   ` Tony Lindgren
2012-10-11 14:41                   ` Tony Lindgren
2012-10-11 14:41                   ` Tony Lindgren

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