From: Robert Richter <rric@kernel.org> To: Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org> Cc: Liviu Dudau <liviu.dudau@arm.com>, Arnd Bergmann <arnd@arndb.de>, Will Deacon <will.deacon@arm.com>, Sunil Goutham <sgoutham@cavium.com>, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Robert Richter <rrichter@cavium.com>, devicetree@vger.kernel.org Subject: [PATCH 4/6] pci, thunder: Document PCIe host controller devicetree bindings Date: Wed, 24 Sep 2014 17:37:46 +0200 [thread overview] Message-ID: <1411573068-12952-5-git-send-email-rric@kernel.org> (raw) In-Reply-To: <1411573068-12952-1-git-send-email-rric@kernel.org> From: Sunil Goutham <sgoutham@cavium.com> This patch adds documentation for the devicetree bindings used by the Thunder PCI host controller. Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: Robert Richter <rrichter@cavium.com> --- .../devicetree/bindings/pci/cavium,thunder-pci.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt diff --git a/Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt b/Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt new file mode 100644 index 000000000000..c8ff3d2e8630 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt @@ -0,0 +1,32 @@ +* Cavium Thunder PCIe interface + +Required properties: +- compatible: should contain "cavium,thunder-pcie" to identify the core. +- device_type: set to "pci" +- #address-cells: set to <3> +- #size-cells: set to <2> +- #stream-id-cells: set to <1> +- bus-range: PCI bus numbers covered +- reg: base address and length of the pcie configuration space. +- ranges: ranges for the PCI memory regions. +- msi-parent: Link to the hardware entity that serves as the Message + Signaled Interrupt controller for this PCI controller. + +Example: + +SoC specific DT Entry: + + pcie0: pcie0@0x848000000000 { + compatible = "cavium,thunder-pcie"; + device_type = "pci"; + msi-parent = <&its>; + bus-range = <0 255>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */ + ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>, /* mem */ + <0x03000000 0x8300 0x00000000 0x8300 0x00000000 0x80 0x00000000>, + <0x03000000 0x87e0 0x00000000 0x87e0 0x00000000 0x01 0x00000000>; + }; + -- 2.1.0
WARNING: multiple messages have this Message-ID (diff)
From: rric@kernel.org (Robert Richter) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] pci, thunder: Document PCIe host controller devicetree bindings Date: Wed, 24 Sep 2014 17:37:46 +0200 [thread overview] Message-ID: <1411573068-12952-5-git-send-email-rric@kernel.org> (raw) In-Reply-To: <1411573068-12952-1-git-send-email-rric@kernel.org> From: Sunil Goutham <sgoutham@cavium.com> This patch adds documentation for the devicetree bindings used by the Thunder PCI host controller. Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: Robert Richter <rrichter@cavium.com> --- .../devicetree/bindings/pci/cavium,thunder-pci.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt diff --git a/Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt b/Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt new file mode 100644 index 000000000000..c8ff3d2e8630 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cavium,thunder-pci.txt @@ -0,0 +1,32 @@ +* Cavium Thunder PCIe interface + +Required properties: +- compatible: should contain "cavium,thunder-pcie" to identify the core. +- device_type: set to "pci" +- #address-cells: set to <3> +- #size-cells: set to <2> +- #stream-id-cells: set to <1> +- bus-range: PCI bus numbers covered +- reg: base address and length of the pcie configuration space. +- ranges: ranges for the PCI memory regions. +- msi-parent: Link to the hardware entity that serves as the Message + Signaled Interrupt controller for this PCI controller. + +Example: + +SoC specific DT Entry: + + pcie0: pcie0 at 0x848000000000 { + compatible = "cavium,thunder-pcie"; + device_type = "pci"; + msi-parent = <&its>; + bus-range = <0 255>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */ + ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>, /* mem */ + <0x03000000 0x8300 0x00000000 0x8300 0x00000000 0x80 0x00000000>, + <0x03000000 0x87e0 0x00000000 0x87e0 0x00000000 0x01 0x00000000>; + }; + -- 2.1.0
next prev parent reply other threads:[~2014-09-24 15:38 UTC|newest] Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-09-24 15:37 [PATCH 0/6] pci, thunder: Add Cavium Thunder PCIe host controller Robert Richter 2014-09-24 15:37 ` Robert Richter 2014-09-24 15:37 ` [PATCH 1/6] pci, thunder: Add support for " Robert Richter 2014-09-24 15:37 ` Robert Richter 2014-09-24 15:37 ` Robert Richter 2014-09-24 16:12 ` Arnd Bergmann 2014-09-24 16:12 ` Arnd Bergmann 2014-09-24 16:49 ` Will Deacon 2014-09-24 16:49 ` Will Deacon 2014-09-24 16:49 ` Will Deacon 2014-09-30 9:14 ` Sunil Kovvuri 2014-09-30 9:14 ` Sunil Kovvuri 2014-09-30 9:14 ` Sunil Kovvuri 2014-09-24 15:37 ` [PATCH 2/6] GICv3: Add ITS entry to THUNDER dts Robert Richter 2014-09-24 15:37 ` Robert Richter 2014-09-24 15:37 ` Robert Richter 2015-06-25 23:19 ` Chalamarla, Tirumalesh 2015-06-25 23:19 ` Chalamarla, Tirumalesh 2015-06-25 23:19 ` Chalamarla, Tirumalesh 2015-06-25 23:19 ` Chalamarla, Tirumalesh 2015-06-26 9:00 ` Marc Zyngier 2015-06-26 9:00 ` Marc Zyngier 2015-06-26 9:00 ` Marc Zyngier 2014-09-24 15:37 ` [PATCH 3/6] pci, thunder: Add PCIe host controller devicetree bindings Robert Richter 2014-09-24 15:37 ` Robert Richter 2014-09-24 16:06 ` Arnd Bergmann 2014-09-24 16:06 ` Arnd Bergmann 2014-09-24 18:04 ` Sunil Kovvuri 2014-09-24 18:04 ` Sunil Kovvuri 2014-09-24 18:34 ` Arnd Bergmann 2014-09-24 18:34 ` Arnd Bergmann 2014-09-24 18:34 ` Arnd Bergmann 2014-09-24 19:07 ` Sunil Kovvuri 2014-09-24 19:07 ` Sunil Kovvuri 2014-09-25 7:31 ` Arnd Bergmann 2014-09-25 7:31 ` Arnd Bergmann 2014-09-25 16:16 ` Bjorn Helgaas 2014-09-25 16:16 ` Bjorn Helgaas 2014-09-25 19:26 ` Arnd Bergmann 2014-09-25 19:26 ` Arnd Bergmann 2014-09-25 20:10 ` Bjorn Helgaas 2014-09-25 20:10 ` Bjorn Helgaas 2014-09-25 20:10 ` Bjorn Helgaas 2014-09-25 20:22 ` Arnd Bergmann 2014-09-25 20:22 ` Arnd Bergmann 2014-09-25 20:22 ` Arnd Bergmann 2014-09-25 20:49 ` Bjorn Helgaas 2014-09-25 20:49 ` Bjorn Helgaas 2014-09-26 18:26 ` Rob Herring 2014-09-26 18:26 ` Rob Herring 2014-09-26 18:26 ` Rob Herring 2014-09-30 9:11 ` Sunil Kovvuri 2014-09-30 9:11 ` Sunil Kovvuri 2014-09-30 9:11 ` Sunil Kovvuri 2014-10-07 14:27 ` Robert Richter 2014-10-07 14:27 ` Robert Richter 2014-10-07 14:27 ` Robert Richter 2014-10-07 15:01 ` Liviu Dudau 2014-10-07 15:01 ` Liviu Dudau 2014-10-07 15:01 ` Liviu Dudau 2014-10-07 15:01 ` Liviu Dudau 2014-10-08 8:49 ` Robert Richter 2014-10-08 8:49 ` Robert Richter 2014-10-08 8:49 ` Robert Richter 2014-10-08 16:44 ` Liviu Dudau 2014-10-08 16:44 ` Liviu Dudau 2014-10-08 16:44 ` Liviu Dudau 2014-10-09 6:23 ` Robert Richter 2014-10-09 6:23 ` Robert Richter 2014-10-09 6:23 ` Robert Richter 2014-10-09 6:23 ` Robert Richter 2014-09-24 15:37 ` Robert Richter [this message] 2014-09-24 15:37 ` [PATCH 4/6] pci, thunder: Document " Robert Richter 2014-09-24 15:37 ` [PATCH 5/6] arm64, defconfig: Enable PCI Robert Richter 2014-09-24 15:37 ` Robert Richter 2014-09-24 16:14 ` Arnd Bergmann 2014-09-24 16:14 ` Arnd Bergmann 2014-09-24 16:26 ` Robert Richter 2014-09-24 16:26 ` Robert Richter 2014-09-24 17:10 ` Catalin Marinas 2014-09-24 17:10 ` Catalin Marinas 2014-09-24 17:10 ` Catalin Marinas 2014-09-24 18:40 ` Arnd Bergmann 2014-09-24 18:40 ` Arnd Bergmann 2014-09-24 18:40 ` Arnd Bergmann 2014-09-25 9:35 ` Catalin Marinas 2014-09-25 9:35 ` Catalin Marinas 2014-09-25 9:35 ` Catalin Marinas 2014-09-25 10:45 ` Arnd Bergmann 2014-09-25 10:45 ` Arnd Bergmann 2014-09-25 10:45 ` Arnd Bergmann 2014-09-24 15:37 ` [PATCH 6/6] pci, thunder: Enable Cavium Thunder PCIe host controller Robert Richter 2014-09-24 15:37 ` Robert Richter 2014-09-24 17:12 ` Catalin Marinas 2014-09-24 17:12 ` Catalin Marinas 2014-09-24 17:12 ` Catalin Marinas
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