From: Boris Brezillon <boris.brezillon@free-electrons.com> To: Herbert Xu <herbert@gondor.apana.org.au>, "David S. Miller" <davem@davemloft.net>, linux-crypto@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, devicetree@vger.kernel.org, Tawfik Bayouk <tawfik@marvell.com>, Lior Amsalem <alior@marvell.com>, Nadav Haklai <nadavh@marvell.com>, Eran Ben-Avi <benavi@marvell.com>, Thomas Petazzoni <info@free-electrons.com>, Gregory CLEMENT <gregory.clement@free-electrons.com>, Jason Cooper <jason@lakedaemon.net>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Andrew Lunn <andrew@lunn.ch>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Arnaud Ebalard <arno@natisbad.org>, Boris Brezillon <boris.brezillon@free-electrons.com> Subject: [PATCH 2/2] crypto: marvell/CESA: update DT bindings documentation Date: Thu, 9 Apr 2015 16:58:43 +0200 [thread overview] Message-ID: <1428591523-1780-3-git-send-email-boris.brezillon@free-electrons.com> (raw) In-Reply-To: <1428591523-1780-1-git-send-email-boris.brezillon@free-electrons.com> Document new compatible strings, document the new method to reference the crypto SRAM and deprecate the old one and document the the 'clocks' and 'clock-names' properties. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> --- .../devicetree/bindings/crypto/mv_cesa.txt | 50 ++++++++++++++++------ 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/mv_cesa.txt b/Documentation/devicetree/bindings/crypto/mv_cesa.txt index 47229b1..4ce9bc5 100644 --- a/Documentation/devicetree/bindings/crypto/mv_cesa.txt +++ b/Documentation/devicetree/bindings/crypto/mv_cesa.txt @@ -1,20 +1,46 @@ Marvell Cryptographic Engines And Security Accelerator Required properties: -- compatible : should be "marvell,orion-crypto" -- reg : base physical address of the engine and length of memory mapped - region, followed by base physical address of sram and its memory - length -- reg-names : "regs" , "sram"; -- interrupts : interrupt number +- compatible: should be one of the following string + "marvell,orion-crypto" + "marvell,kirkwood-crypto" + "marvell,armada-370-crypto" + "marvell,armada-xp-crypto" + "marvell,armada-375-crypto" + "marvell,armada-38x-crypto" +- reg: base physical address of the engine and length of memory mapped + region +- reg-names: "regs" +- interrupts: interrupt number +- clocks: reference to the crypto engines clocks. This property is not + required for orion and kirkwood platforms +- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine + id. + This property is not required for the orion and kirkwoord + platforms. + "cesazX" clocks are not required on armada-370 platforms +- marvell,crypto-srams: phandle to crypto SRAM definitions + +Optional properties: +- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not + specified the whole SRAM is used (2KB) + +Deprecated properties: +- reg: base physical address of the engine and length of memory mapped + region, followed by base physical address of sram and its memory + length +- reg-names: "regs" , "sram" Examples: - crypto@30000 { - compatible = "marvell,orion-crypto"; - reg = <0x30000 0x10000>, - <0x4000000 0x800>; - reg-names = "regs" , "sram"; - interrupts = <22>; + crypto@90000 { + compatible = "marvell,armada-xp-crypto"; + reg = <0x90000 0x10000>; + reg-names = "regs"; + interrupts = <48>, <49>; + clocks = <&gateclk 23>, <&gateclk 23>; + clock-names = "cesa0", "cesa1"; + marvell,crypto-srams = <&crypto_sram0>, <&crypto_sram1>; + marvell,crypto-sram-size = <0x600>; status = "okay"; }; -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@free-electrons.com (Boris Brezillon) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] crypto: marvell/CESA: update DT bindings documentation Date: Thu, 9 Apr 2015 16:58:43 +0200 [thread overview] Message-ID: <1428591523-1780-3-git-send-email-boris.brezillon@free-electrons.com> (raw) In-Reply-To: <1428591523-1780-1-git-send-email-boris.brezillon@free-electrons.com> Document new compatible strings, document the new method to reference the crypto SRAM and deprecate the old one and document the the 'clocks' and 'clock-names' properties. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> --- .../devicetree/bindings/crypto/mv_cesa.txt | 50 ++++++++++++++++------ 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/mv_cesa.txt b/Documentation/devicetree/bindings/crypto/mv_cesa.txt index 47229b1..4ce9bc5 100644 --- a/Documentation/devicetree/bindings/crypto/mv_cesa.txt +++ b/Documentation/devicetree/bindings/crypto/mv_cesa.txt @@ -1,20 +1,46 @@ Marvell Cryptographic Engines And Security Accelerator Required properties: -- compatible : should be "marvell,orion-crypto" -- reg : base physical address of the engine and length of memory mapped - region, followed by base physical address of sram and its memory - length -- reg-names : "regs" , "sram"; -- interrupts : interrupt number +- compatible: should be one of the following string + "marvell,orion-crypto" + "marvell,kirkwood-crypto" + "marvell,armada-370-crypto" + "marvell,armada-xp-crypto" + "marvell,armada-375-crypto" + "marvell,armada-38x-crypto" +- reg: base physical address of the engine and length of memory mapped + region +- reg-names: "regs" +- interrupts: interrupt number +- clocks: reference to the crypto engines clocks. This property is not + required for orion and kirkwood platforms +- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine + id. + This property is not required for the orion and kirkwoord + platforms. + "cesazX" clocks are not required on armada-370 platforms +- marvell,crypto-srams: phandle to crypto SRAM definitions + +Optional properties: +- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not + specified the whole SRAM is used (2KB) + +Deprecated properties: +- reg: base physical address of the engine and length of memory mapped + region, followed by base physical address of sram and its memory + length +- reg-names: "regs" , "sram" Examples: - crypto at 30000 { - compatible = "marvell,orion-crypto"; - reg = <0x30000 0x10000>, - <0x4000000 0x800>; - reg-names = "regs" , "sram"; - interrupts = <22>; + crypto at 90000 { + compatible = "marvell,armada-xp-crypto"; + reg = <0x90000 0x10000>; + reg-names = "regs"; + interrupts = <48>, <49>; + clocks = <&gateclk 23>, <&gateclk 23>; + clock-names = "cesa0", "cesa1"; + marvell,crypto-srams = <&crypto_sram0>, <&crypto_sram1>; + marvell,crypto-sram-size = <0x600>; status = "okay"; }; -- 1.9.1
next prev parent reply other threads:[~2015-04-09 14:58 UTC|newest] Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-04-09 14:58 [PATCH 0/2] crypto: add new driver for Marvell CESA Boris Brezillon 2015-04-09 14:58 ` Boris Brezillon 2015-04-09 14:58 ` [PATCH 1/2] " Boris Brezillon [not found] ` <1428591523-1780-2-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2015-04-10 10:38 ` Paul Bolle 2015-04-10 10:38 ` Paul Bolle 2015-04-10 10:38 ` Paul Bolle 2015-04-10 11:17 ` Boris Brezillon 2015-04-10 11:17 ` Boris Brezillon 2015-04-09 14:58 ` Boris Brezillon [this message] 2015-04-09 14:58 ` [PATCH 2/2] crypto: marvell/CESA: update DT bindings documentation Boris Brezillon 2015-04-09 15:18 ` [PATCH 0/2] crypto: add new driver for Marvell CESA Andrew Lunn 2015-04-09 15:18 ` Andrew Lunn [not found] ` <20150409172826.18916274@bbrezillon> 2015-04-09 15:37 ` Andrew Lunn 2015-04-09 15:37 ` Andrew Lunn 2015-04-09 15:37 ` Andrew Lunn 2015-04-09 15:37 ` Andrew Lunn 2015-04-09 15:34 ` Sebastian Hesselbarth 2015-04-09 15:34 ` Sebastian Hesselbarth 2015-04-09 15:57 ` Boris Brezillon 2015-04-09 15:57 ` Boris Brezillon 2015-04-09 23:21 ` Arnaud Ebalard 2015-04-09 23:21 ` Arnaud Ebalard 2015-04-09 23:21 ` Arnaud Ebalard 2015-04-09 15:52 ` Stephan Mueller 2015-04-09 15:52 ` Stephan Mueller 2015-04-10 13:50 ` Jason Cooper 2015-04-10 13:50 ` Jason Cooper 2015-04-10 15:11 ` Boris Brezillon 2015-04-10 15:11 ` Boris Brezillon 2015-04-10 22:30 ` Jason Cooper 2015-04-10 22:30 ` Jason Cooper 2015-04-13 9:39 ` Gregory CLEMENT 2015-04-13 9:39 ` Gregory CLEMENT 2015-04-13 12:47 ` Jason Cooper 2015-04-13 12:47 ` Jason Cooper 2015-04-13 16:06 ` Arnaud Ebalard 2015-04-13 16:06 ` Arnaud Ebalard 2015-04-13 20:11 ` Jason Cooper 2015-04-13 20:11 ` Jason Cooper 2015-04-17 8:33 ` Boris Brezillon 2015-04-17 8:33 ` Boris Brezillon 2015-04-17 8:39 ` Boris Brezillon 2015-04-17 8:39 ` Boris Brezillon 2015-04-17 10:59 ` Jason Cooper 2015-04-17 10:59 ` Jason Cooper 2015-04-17 13:01 ` Gregory CLEMENT 2015-04-17 13:01 ` Gregory CLEMENT 2015-04-17 14:19 ` Boris Brezillon 2015-04-17 14:19 ` Boris Brezillon 2015-04-17 14:32 ` Maxime Ripard 2015-04-17 14:32 ` Maxime Ripard 2015-04-17 14:40 ` Gregory CLEMENT 2015-04-17 14:40 ` Gregory CLEMENT 2015-04-17 14:50 ` Maxime Ripard 2015-04-17 14:50 ` Maxime Ripard 2015-04-17 15:01 ` Gregory CLEMENT 2015-04-17 15:01 ` Gregory CLEMENT 2015-04-17 15:01 ` Gregory CLEMENT 2015-04-17 15:49 ` Maxime Ripard 2015-04-17 15:49 ` Maxime Ripard 2015-04-17 16:04 ` Gregory CLEMENT 2015-04-17 16:04 ` Gregory CLEMENT 2015-04-17 16:04 ` Gregory CLEMENT 2015-04-28 19:52 ` Boris Brezillon 2015-04-28 19:52 ` Boris Brezillon 2015-04-29 9:49 ` Herbert Xu 2015-04-29 9:49 ` Herbert Xu
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