From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, mark.rutland@arm.com, punit.agrawal@arm.com, arm@kernel.org, "Suzuki K. Poulose" <suzuki.poulose@arm.com> Subject: [PATCH v4 01/12] arm-cci: Define CCI counter period Date: Thu, 17 Dec 2015 17:49:08 +0000 [thread overview] Message-ID: <1450374559-23315-2-git-send-email-suzuki.poulose@arm.com> (raw) In-Reply-To: <1450374559-23315-1-git-send-email-suzuki.poulose@arm.com> Instead of hard coding the period we program on the PMU counters, define a symbol. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> --- drivers/bus/arm-cci.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c index ee47e6b..3786879 100644 --- a/drivers/bus/arm-cci.c +++ b/drivers/bus/arm-cci.c @@ -85,6 +85,14 @@ static const struct of_device_id arm_cci_matches[] = { #define CCI_PMU_CNTR_MASK ((1ULL << 32) -1) #define CCI_PMU_CNTR_LAST(cci_pmu) (cci_pmu->num_cntrs - 1) +/* + * The CCI PMU counters have a period of 2^32. To account for the + * possiblity of extreme interrupt latency we program for a period of + * half that. Hopefully we can handle the interrupt before another 2^31 + * events occur and the counter overtakes its previous value. + */ +#define CCI_CNTR_PERIOD (1UL << 31) + #define CCI_PMU_MAX_HW_CNTRS(model) \ ((model)->num_hw_cntrs + (model)->fixed_hw_cntrs) @@ -797,15 +805,8 @@ static void pmu_read(struct perf_event *event) void pmu_event_set_period(struct perf_event *event) { struct hw_perf_event *hwc = &event->hw; - /* - * The CCI PMU counters have a period of 2^32. To account for the - * possiblity of extreme interrupt latency we program for a period of - * half that. Hopefully we can handle the interrupt before another 2^31 - * events occur and the counter overtakes its previous value. - */ - u64 val = 1ULL << 31; - local64_set(&hwc->prev_count, val); - pmu_write_counter(event, val); + local64_set(&hwc->prev_count, CCI_CNTR_PERIOD); + pmu_write_counter(event, CCI_CNTR_PERIOD); } static irqreturn_t pmu_handle_irq(int irq_num, void *dev) -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: suzuki.poulose@arm.com (Suzuki K. Poulose) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 01/12] arm-cci: Define CCI counter period Date: Thu, 17 Dec 2015 17:49:08 +0000 [thread overview] Message-ID: <1450374559-23315-2-git-send-email-suzuki.poulose@arm.com> (raw) In-Reply-To: <1450374559-23315-1-git-send-email-suzuki.poulose@arm.com> Instead of hard coding the period we program on the PMU counters, define a symbol. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> --- drivers/bus/arm-cci.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c index ee47e6b..3786879 100644 --- a/drivers/bus/arm-cci.c +++ b/drivers/bus/arm-cci.c @@ -85,6 +85,14 @@ static const struct of_device_id arm_cci_matches[] = { #define CCI_PMU_CNTR_MASK ((1ULL << 32) -1) #define CCI_PMU_CNTR_LAST(cci_pmu) (cci_pmu->num_cntrs - 1) +/* + * The CCI PMU counters have a period of 2^32. To account for the + * possiblity of extreme interrupt latency we program for a period of + * half that. Hopefully we can handle the interrupt before another 2^31 + * events occur and the counter overtakes its previous value. + */ +#define CCI_CNTR_PERIOD (1UL << 31) + #define CCI_PMU_MAX_HW_CNTRS(model) \ ((model)->num_hw_cntrs + (model)->fixed_hw_cntrs) @@ -797,15 +805,8 @@ static void pmu_read(struct perf_event *event) void pmu_event_set_period(struct perf_event *event) { struct hw_perf_event *hwc = &event->hw; - /* - * The CCI PMU counters have a period of 2^32. To account for the - * possiblity of extreme interrupt latency we program for a period of - * half that. Hopefully we can handle the interrupt before another 2^31 - * events occur and the counter overtakes its previous value. - */ - u64 val = 1ULL << 31; - local64_set(&hwc->prev_count, val); - pmu_write_counter(event, val); + local64_set(&hwc->prev_count, CCI_CNTR_PERIOD); + pmu_write_counter(event, CCI_CNTR_PERIOD); } static irqreturn_t pmu_handle_irq(int irq_num, void *dev) -- 1.7.9.5
next prev parent reply other threads:[~2015-12-17 17:52 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-12-17 17:49 [PATCHv4 00/12] arm-cci: PMU updates Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose [this message] 2015-12-17 17:49 ` [PATCH v4 01/12] arm-cci: Define CCI counter period Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 02/12] arm-cci: Refactor pmu_write_counter Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 03/12] arm-cci: Group writes to counter Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 04/12] arm-cci: Fix the flags for pmu_start called from pmu_add Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 05/12] arm-cci: PMU: Add support for transactions Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 18:42 ` Peter Zijlstra 2015-12-17 18:42 ` Peter Zijlstra 2015-12-18 10:28 ` Suzuki K. Poulose 2015-12-18 10:28 ` Suzuki K. Poulose 2015-12-18 10:42 ` Peter Zijlstra 2015-12-18 10:42 ` Peter Zijlstra 2015-12-18 10:58 ` Suzuki K. Poulose 2015-12-18 10:58 ` Suzuki K. Poulose 2015-12-18 11:47 ` Peter Zijlstra 2015-12-18 11:47 ` Peter Zijlstra 2015-12-21 10:55 ` Suzuki K. Poulose 2015-12-21 10:55 ` Suzuki K. Poulose 2016-01-05 13:37 ` Peter Zijlstra 2016-01-05 13:37 ` Peter Zijlstra 2016-01-05 13:43 ` Suzuki K. Poulose 2016-01-05 13:43 ` Suzuki K. Poulose 2016-01-05 14:53 ` Peter Zijlstra 2016-01-05 14:53 ` Peter Zijlstra 2015-12-17 17:49 ` [PATCH v4 06/12] arm-cci: Refactor CCI PMU enable/disable methods Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 07/12] arm-cci: Get the status of a counter Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 08/12] arm-cci: Add routines to save/restore all counters Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 09/12] arm-cci: Provide hook for writing to PMU counters Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 10/12] arm-cci: CCI-500: Work around PMU counter writes Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 11/12] arm-cci500: Rearrange PMU driver for code sharing with CCI-550 PMU Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose 2015-12-17 17:49 ` [PATCH v4 12/12] arm-cci: CoreLink CCI-550 PMU driver Suzuki K. Poulose 2015-12-17 17:49 ` Suzuki K. Poulose
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