From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: <olof@lixom.net>, <robh+dt@kernel.org>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>, <arnd@arndb.de>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <arm@kernel.org>,
<brijeshkumar.singh@amd.com>, <thomas.lendacky@amd.com>,
<leo.duran@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH V3 03/12] dtb: amd: Fix DMA ranges of smb0 and pcie0
Date: Wed, 10 Feb 2016 21:51:02 -0600 [thread overview]
Message-ID: <1455162671-16044-4-git-send-email-Suravee.Suthikulpanit@amd.com> (raw)
In-Reply-To: <1455162671-16044-1-git-send-email-Suravee.Suthikulpanit@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Since GICv2m MSI frame is also considered DMA-able, we should also
include this range in the dma-range DT property as well. Therefore,
this patch fixes the smb0 and pcie0 dma-range properties.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index fdd0c96..5c73117 100644
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -55,8 +55,12 @@
#size-cells = <2>;
ranges;
- /* DDR range is 40-bit addressing */
- dma-ranges = <0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ /*
+ * dma-ranges is 40-bit address space containing:
+ * - GICv2m MSI register is at 0xe0080000
+ * - DRAM range [0x8000000000 to 0xffffffffff]
+ */
+ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
/include/ "amd-seattle-clks.dtsi"
@@ -159,7 +163,7 @@
<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
dma-coherent;
- dma-ranges = <0x43000000 0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
ranges =
/* I/O Memory (size=64K) */
<0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>,
--
2.5.0
WARNING: multiple messages have this Message-ID (diff)
From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: olof@lixom.net, robh+dt@kernel.org, pawel.moll@arm.com,
mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
galak@codeaurora.org, arnd@arndb.de
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, arm@kernel.org,
brijeshkumar.singh@amd.com, thomas.lendacky@amd.com,
leo.duran@amd.com,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH V3 03/12] dtb: amd: Fix DMA ranges of smb0 and pcie0
Date: Wed, 10 Feb 2016 21:51:02 -0600 [thread overview]
Message-ID: <1455162671-16044-4-git-send-email-Suravee.Suthikulpanit@amd.com> (raw)
In-Reply-To: <1455162671-16044-1-git-send-email-Suravee.Suthikulpanit@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Since GICv2m MSI frame is also considered DMA-able, we should also
include this range in the dma-range DT property as well. Therefore,
this patch fixes the smb0 and pcie0 dma-range properties.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index fdd0c96..5c73117 100644
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -55,8 +55,12 @@
#size-cells = <2>;
ranges;
- /* DDR range is 40-bit addressing */
- dma-ranges = <0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ /*
+ * dma-ranges is 40-bit address space containing:
+ * - GICv2m MSI register is at 0xe0080000
+ * - DRAM range [0x8000000000 to 0xffffffffff]
+ */
+ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
/include/ "amd-seattle-clks.dtsi"
@@ -159,7 +163,7 @@
<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
dma-coherent;
- dma-ranges = <0x43000000 0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
ranges =
/* I/O Memory (size=64K) */
<0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>,
--
2.5.0
WARNING: multiple messages have this Message-ID (diff)
From: Suravee.Suthikulpanit@amd.com (Suravee Suthikulpanit)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V3 03/12] dtb: amd: Fix DMA ranges of smb0 and pcie0
Date: Wed, 10 Feb 2016 21:51:02 -0600 [thread overview]
Message-ID: <1455162671-16044-4-git-send-email-Suravee.Suthikulpanit@amd.com> (raw)
In-Reply-To: <1455162671-16044-1-git-send-email-Suravee.Suthikulpanit@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Since GICv2m MSI frame is also considered DMA-able, we should also
include this range in the dma-range DT property as well. Therefore,
this patch fixes the smb0 and pcie0 dma-range properties.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index fdd0c96..5c73117 100644
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -55,8 +55,12 @@
#size-cells = <2>;
ranges;
- /* DDR range is 40-bit addressing */
- dma-ranges = <0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ /*
+ * dma-ranges is 40-bit address space containing:
+ * - GICv2m MSI register is at 0xe0080000
+ * - DRAM range [0x8000000000 to 0xffffffffff]
+ */
+ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
/include/ "amd-seattle-clks.dtsi"
@@ -159,7 +163,7 @@
<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
dma-coherent;
- dma-ranges = <0x43000000 0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
ranges =
/* I/O Memory (size=64K) */
<0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>,
--
2.5.0
next prev parent reply other threads:[~2016-02-11 3:52 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-11 3:50 [PATCH V3 00/12] dtb: amd: Miscellaneous Updates for AMD Seattle DTS Suravee Suthikulpanit
2016-02-11 3:50 ` Suravee Suthikulpanit
2016-02-11 3:50 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 01/12] MAINTAINERS: Adding Maintainers for AMD Seattle Device Tree Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 02/12] dtb: amd: Fix GICv2 hypervisor and virtual interface sizes Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit [this message]
2016-02-11 3:51 ` [PATCH V3 03/12] dtb: amd: Fix DMA ranges of smb0 and pcie0 Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 04/12] dtb: amd: Fix typo in SPI device nodes Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 05/12] dtb: amd: Misc changes for I2C " Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 06/12] dtb: amd: Misc changes for SATA device tree nodes Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 07/12] dtb: amd: Misc changes for GPIO devices Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 08/12] dtb: amd: Add PERF CCN-504 device tree node Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 09/12] dtb: amd: Add KCS " Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 10/12] dtb: amd: Add AMD XGBE device tree file Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 11/12] dtb: amd: Add support for new AMD Overdrive boards Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` [PATCH V3 12/12] dtb: amd: Add support for AMD/Linaro 96Boards Enterprise Edition Server board Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
2016-02-11 3:51 ` Suravee Suthikulpanit
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