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From: "Cédric Le Goater" <clg@fr.ibm.com>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: Thomas Huth <thuth@redhat.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 11/17] ppc: Initialize AMOR in PAPR mode
Date: Mon, 14 Mar 2016 17:56:34 +0100	[thread overview]
Message-ID: <1457974600-13828-12-git-send-email-clg@fr.ibm.com> (raw)
In-Reply-To: <1457974600-13828-1-git-send-email-clg@fr.ibm.com>

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>

Make sure we give the guest full authorization

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
 target-ppc/translate_init.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 68abd847a251..c921d9f53984 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8542,6 +8542,7 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu)
 {
     CPUPPCState *env = &cpu->env;
     ppc_spr_t *lpcr = &env->spr_cb[SPR_LPCR];
+    ppc_spr_t *amor = &env->spr_cb[SPR_AMOR];
 
     /* PAPR always has exception vectors in RAM not ROM. To ensure this,
      * MSR[IP] should never be set.
@@ -8563,6 +8564,9 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu)
      */
     env->spr[SPR_LPCR] = lpcr->default_value;
 
+    /* Set a full AMOR so guest can use the AMR as it sees fit */
+    env->spr[SPR_AMOR] = amor->default_value = 0xffffffffffffffffull;
+
     /* Tell KVM that we're in PAPR mode */
     if (kvm_enabled()) {
         kvmppc_set_papr(cpu);
-- 
2.1.4

  parent reply	other threads:[~2016-03-14 17:07 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-14 16:56 [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 01/17] ppc: Update SPR definitions Cédric Le Goater
2016-03-14 18:34   ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 02/17] ppc: Add macros to register hypervisor mode SPRs Cédric Le Goater
2016-03-14 18:50   ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 03/17] ppc: Add a bunch of hypervisor SPRs to Book3s Cédric Le Goater
2016-03-14 19:14   ` Thomas Huth
2016-03-15  9:43     ` David Gibson
2016-03-15 10:49       ` Thomas Huth
2016-03-15 17:04         ` [Qemu-devel] [Qemu-ppc] " Cédric Le Goater
2016-03-16  1:04         ` [Qemu-devel] " David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 04/17] ppc: Add number of threads per core to the processor definition Cédric Le Goater
2016-03-14 19:20   ` Thomas Huth
2016-03-15  8:06     ` Cédric Le Goater
2016-03-15  8:21     ` Bharata B Rao
2016-03-15  9:45   ` David Gibson
2016-03-15 21:11     ` Benjamin Herrenschmidt
2016-03-16  0:41       ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 05/17] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV Cédric Le Goater
2016-03-14 19:29   ` Thomas Huth
2016-03-15  9:47     ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 06/17] ppc: Create cpu_ppc_set_papr() helper Cédric Le Goater
2016-03-17  2:34   ` David Gibson
2016-03-17 12:33     ` Cédric Le Goater
2016-03-17 22:03       ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 07/17] ppc: Better figure out if processor has HV mode Cédric Le Goater
2016-03-16  1:05   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 08/17] ppc: Add placeholder SPRs for DPDES and DHDES on P8 Cédric Le Goater
2016-03-14 19:32   ` Thomas Huth
2016-03-16  1:06   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 09/17] ppc: SPURR & PURR are HV writeable and privileged Cédric Le Goater
2016-03-14 19:37   ` Thomas Huth
2016-03-16  1:07     ` David Gibson
2016-03-16  1:07   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 10/17] ppc: Add dummy SPR_IC for POWER8 Cédric Le Goater
2016-03-14 19:40   ` Thomas Huth
2016-03-16  1:08   ` David Gibson
2016-03-14 16:56 ` Cédric Le Goater [this message]
2016-03-14 20:13   ` [Qemu-devel] [PATCH 11/17] ppc: Initialize AMOR in PAPR mode Thomas Huth
2016-03-16  1:09   ` David Gibson
2016-03-17  2:36   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 12/17] ppc: Fix writing to AMR/UAMOR Cédric Le Goater
2016-03-14 20:26   ` Thomas Huth
2016-03-15  8:05     ` Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 13/17] ppc: Add POWER8 IAMR register Cédric Le Goater
2016-03-14 20:36   ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 14/17] ppc: Add dummy write to VTB Cédric Le Goater
2016-03-14 20:54   ` Thomas Huth
2016-03-14 21:07     ` [Qemu-devel] [Qemu-ppc] " Benjamin Herrenschmidt
2016-03-16  1:12   ` [Qemu-devel] " David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 15/17] ppc: Add dummy POWER8 MPPR register Cédric Le Goater
2016-03-16  1:14   ` David Gibson
2016-03-16  6:17     ` Thomas Huth
2016-03-16  9:24       ` Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 16/17] ppc: Add dummy CIABR SPR Cédric Le Goater
2016-03-14 20:00   ` Thomas Huth
2016-03-16  1:14   ` David Gibson
2016-03-16  6:24     ` Thomas Huth
2016-03-16 22:28       ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 17/17] ppc: A couple more dummy POWER8 Book4 regs Cédric Le Goater
2016-03-14 20:08   ` Thomas Huth
2016-03-16  1:15   ` David Gibson
2016-03-15  0:39 ` [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing David Gibson
2016-03-15  8:11   ` Cédric Le Goater
2016-03-16  1:19     ` David Gibson
2016-03-16  9:08       ` Cédric Le Goater
2016-03-17  2:45         ` David Gibson
2016-03-17 14:28           ` Cédric Le Goater
2016-03-21  0:59             ` David Gibson

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