From: Guodong Xu <guodong.xu@linaro.org> To: xuwei5@hisilicon.com, mark.rutland@arm.com, robh@kernel.org, grant.likely@secretlab.ca, linus.walleij@linaro.org, arnd.bergmann@linaro.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kong.kongxinwei@hisilicon.com, Leo Yan <leo.yan@linaro.org> Subject: [PATCH v2 11/16] arm64: dts: add Hi6220's stub clock node Date: Sat, 2 Apr 2016 17:29:38 +0800 [thread overview] Message-ID: <1459589383-16914-12-git-send-email-guodong.xu@linaro.org> (raw) In-Reply-To: <1459589383-16914-1-git-send-email-guodong.xu@linaro.org> From: Leo Yan <leo.yan@linaro.org> Enable SRAM node and stub clock node for Hi6220, which uses mailbox channel 1 for CPU's frequency change. Furthermore, add the CPU clock phandle in CPU's node and using operating-points-v2 to register operating points. So can be used by cpufreq-dt driver. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 56 +++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 07b211b..a7ca40b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -82,6 +82,11 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + clocks = <&stub_clock 0>; + operating-points-v2 = <&cpu_opp_table>; + cooling-min-level = <4>; + cooling-max-level = <0>; + #cooling-cells = <2>; /* min followed by max */ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -90,6 +95,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -98,6 +104,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -106,6 +113,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -114,6 +122,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -122,6 +131,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -130,6 +140,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -138,10 +149,42 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; }; + cpu_opp_table: cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <208000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <500000>; + }; + opp01 { + opp-hz = /bits/ 64 <432000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <500000>; + }; + opp02 { + opp-hz = /bits/ 64 <729000000>; + opp-microvolt = <1090000>; + clock-latency-ns = <500000>; + }; + opp03 { + opp-hz = /bits/ 64 <960000000>; + opp-microvolt = <1180000>; + clock-latency-ns = <500000>; + }; + opp04 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1330000>; + clock-latency-ns = <500000>; + }; + }; + gic: interrupt-controller@f6801000 { compatible = "arm,gic-400"; reg = <0x0 0xf6801000 0 0x1000>, /* GICD */ @@ -169,6 +212,11 @@ #size-cells = <2>; ranges; + sram: sram@fff80000 { + compatible = "hisilicon,hi6220-sramctrl", "syscon"; + reg = <0x0 0xfff80000 0x0 0x12000>; + }; + ao_ctrl: ao_ctrl@f7800000 { compatible = "hisilicon,hi6220-aoctrl", "syscon"; reg = <0x0 0xf7800000 0x0 0x2000>; @@ -194,6 +242,14 @@ #clock-cells = <1>; }; + stub_clock: stub_clock { + compatible = "hisilicon,hi6220-stub-clk"; + hisilicon,hi6220-clk-sram = <&sram>; + #clock-cells = <1>; + mbox-names = "mbox-tx"; + mboxes = <&mailbox 1 0 11>; + }; + uart0: uart@f8015000 { /* console */ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>; -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: guodong.xu@linaro.org (Guodong Xu) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 11/16] arm64: dts: add Hi6220's stub clock node Date: Sat, 2 Apr 2016 17:29:38 +0800 [thread overview] Message-ID: <1459589383-16914-12-git-send-email-guodong.xu@linaro.org> (raw) In-Reply-To: <1459589383-16914-1-git-send-email-guodong.xu@linaro.org> From: Leo Yan <leo.yan@linaro.org> Enable SRAM node and stub clock node for Hi6220, which uses mailbox channel 1 for CPU's frequency change. Furthermore, add the CPU clock phandle in CPU's node and using operating-points-v2 to register operating points. So can be used by cpufreq-dt driver. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 56 +++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 07b211b..a7ca40b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -82,6 +82,11 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + clocks = <&stub_clock 0>; + operating-points-v2 = <&cpu_opp_table>; + cooling-min-level = <4>; + cooling-max-level = <0>; + #cooling-cells = <2>; /* min followed by max */ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -90,6 +95,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -98,6 +104,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -106,6 +113,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -114,6 +122,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -122,6 +131,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -130,6 +140,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; @@ -138,10 +149,42 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; }; + cpu_opp_table: cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <208000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <500000>; + }; + opp01 { + opp-hz = /bits/ 64 <432000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <500000>; + }; + opp02 { + opp-hz = /bits/ 64 <729000000>; + opp-microvolt = <1090000>; + clock-latency-ns = <500000>; + }; + opp03 { + opp-hz = /bits/ 64 <960000000>; + opp-microvolt = <1180000>; + clock-latency-ns = <500000>; + }; + opp04 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1330000>; + clock-latency-ns = <500000>; + }; + }; + gic: interrupt-controller at f6801000 { compatible = "arm,gic-400"; reg = <0x0 0xf6801000 0 0x1000>, /* GICD */ @@ -169,6 +212,11 @@ #size-cells = <2>; ranges; + sram: sram at fff80000 { + compatible = "hisilicon,hi6220-sramctrl", "syscon"; + reg = <0x0 0xfff80000 0x0 0x12000>; + }; + ao_ctrl: ao_ctrl at f7800000 { compatible = "hisilicon,hi6220-aoctrl", "syscon"; reg = <0x0 0xf7800000 0x0 0x2000>; @@ -194,6 +242,14 @@ #clock-cells = <1>; }; + stub_clock: stub_clock { + compatible = "hisilicon,hi6220-stub-clk"; + hisilicon,hi6220-clk-sram = <&sram>; + #clock-cells = <1>; + mbox-names = "mbox-tx"; + mboxes = <&mailbox 1 0 11>; + }; + uart0: uart at f8015000 { /* console */ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>; -- 1.9.1
next prev parent reply other threads:[~2016-04-02 9:33 UTC|newest] Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-04-02 9:29 [PATCH v2 00/16] DTS for hi6220 and HiKey Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 01/16] arm64: dts: Reserve memory regions for hi6220 Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 02/16] arm64: dts: add sp804 timer node for Hi6220 Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-03 19:23 ` Linus Walleij 2016-04-03 19:23 ` Linus Walleij 2016-04-03 19:23 ` Linus Walleij 2016-04-04 1:43 ` Leo Yan 2016-04-04 1:43 ` Leo Yan 2016-04-04 1:43 ` Leo Yan 2016-04-04 11:21 ` Linus Walleij 2016-04-04 11:21 ` Linus Walleij 2016-04-04 11:21 ` Linus Walleij 2016-04-04 13:42 ` Leo Yan 2016-04-04 13:42 ` Leo Yan 2016-04-04 13:42 ` Leo Yan 2016-04-04 13:53 ` Linus Walleij 2016-04-04 13:53 ` Linus Walleij 2016-04-04 13:53 ` Linus Walleij 2016-04-04 14:03 ` Leo Yan 2016-04-04 14:03 ` Leo Yan 2016-04-04 14:03 ` Leo Yan 2016-04-04 5:16 ` Rob Herring 2016-04-04 5:16 ` Rob Herring 2016-04-04 5:16 ` Rob Herring 2016-04-02 9:29 ` [PATCH v2 03/16] arm64: dts: enable idle states " Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 04/16] arm64: dts: Add Hi6220 gpio configuration nodes Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-03 19:28 ` Linus Walleij 2016-04-03 19:28 ` Linus Walleij 2016-04-03 19:28 ` Linus Walleij 2016-04-12 9:18 ` Guodong Xu 2016-04-12 9:18 ` Guodong Xu 2016-04-12 9:18 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 05/16] arm64: dts: add Hi6220 pinctrl " Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-03 19:31 ` Linus Walleij 2016-04-03 19:31 ` Linus Walleij 2016-04-03 19:31 ` Linus Walleij 2016-04-04 22:54 ` Tony Lindgren 2016-04-04 22:54 ` Tony Lindgren 2016-04-04 22:54 ` Tony Lindgren 2016-04-12 8:28 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 06/16] arm64: dts: add Hi6220 spi " Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-04 5:16 ` Rob Herring 2016-04-04 5:16 ` Rob Herring 2016-04-12 9:40 ` Guodong Xu 2016-04-12 9:40 ` Guodong Xu 2016-04-12 9:40 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 07/16] arm64: dts: add all hi6220 i2c nodes Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 08/16] arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-04 5:16 ` Rob Herring 2016-04-04 5:16 ` Rob Herring 2016-04-02 9:29 ` [PATCH v2 09/16] arm64: dts: add hi6220 usb node Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 10/16] arm64: dts: add mailbox node for Hi6220 Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` Guodong Xu [this message] 2016-04-02 9:29 ` [PATCH v2 11/16] arm64: dts: add Hi6220's stub clock node Guodong Xu 2016-04-02 9:29 ` [PATCH v2 12/16] arm64: dts: hi6220: add pinctrl for uarts and enable them Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 13/16] arm64: dts: add LED nodes for hi6220-hikey Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-04 5:16 ` Rob Herring 2016-04-04 5:16 ` Rob Herring 2016-04-02 9:29 ` [PATCH v2 14/16] arm64: dts: hikey: Add hi655x pmic dts node Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-04 5:16 ` Rob Herring 2016-04-04 5:16 ` Rob Herring 2016-04-12 13:14 ` Guodong Xu 2016-04-12 13:14 ` Guodong Xu 2016-04-12 13:14 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 15/16] arm64: dts: add dwmmc nodes for hi6220 Guodong Xu 2016-04-02 9:29 ` Guodong Xu 2016-04-02 9:29 ` [PATCH v2 16/16] arm64: dts: add wifi nodes support for hi6220-hikey Guodong Xu 2016-04-02 9:29 ` Guodong Xu
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