From: Chen-Yu Tsai <wens@csie.org> To: Ulf Hansson <ulf.hansson@linaro.org>, Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 Date: Sun, 29 May 2016 15:04:44 +0800 [thread overview] Message-ID: <1464505484-3661-4-git-send-email-wens@csie.org> (raw) In-Reply-To: <1464505484-3661-1-git-send-email-wens@csie.org> Now the the HS-DDR mode clock timings have been corrected, we can re-enable these modes on the A80. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/mmc/host/sunxi-mmc.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 5873dc344ab2..2ee4c21ec55e 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1129,11 +1129,6 @@ static int sunxi_mmc_probe(struct platform_device *pdev) MMC_CAP_1_8V_DDR | MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ; - /* TODO MMC DDR is not working on A80 */ - if (of_device_is_compatible(pdev->dev.of_node, - "allwinner,sun9i-a80-mmc")) - mmc->caps &= ~MMC_CAP_1_8V_DDR; - ret = mmc_of_parse(mmc); if (ret) goto error_free_dma; -- 2.8.1
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 Date: Sun, 29 May 2016 15:04:44 +0800 [thread overview] Message-ID: <1464505484-3661-4-git-send-email-wens@csie.org> (raw) In-Reply-To: <1464505484-3661-1-git-send-email-wens@csie.org> Now the the HS-DDR mode clock timings have been corrected, we can re-enable these modes on the A80. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/mmc/host/sunxi-mmc.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 5873dc344ab2..2ee4c21ec55e 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1129,11 +1129,6 @@ static int sunxi_mmc_probe(struct platform_device *pdev) MMC_CAP_1_8V_DDR | MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ; - /* TODO MMC DDR is not working on A80 */ - if (of_device_is_compatible(pdev->dev.of_node, - "allwinner,sun9i-a80-mmc")) - mmc->caps &= ~MMC_CAP_1_8V_DDR; - ret = mmc_of_parse(mmc); if (ret) goto error_free_dma; -- 2.8.1
next prev parent reply other threads:[~2016-05-29 7:04 UTC|newest] Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-29 7:04 [PATCH 0/3] mmc: sunxi: Fix MMC DDR modes for Allwinner A80 Chen-Yu Tsai 2016-05-29 7:04 ` Chen-Yu Tsai 2016-05-29 7:04 ` [PATCH 1/3] mmc: fix mmc mode selection for HS-DDR and higher Chen-Yu Tsai 2016-05-29 7:04 ` Chen-Yu Tsai 2016-05-31 9:30 ` Krzysztof Kozlowski 2016-05-31 9:30 ` Krzysztof Kozlowski 2016-06-01 1:25 ` Jaehoon Chung 2016-06-01 1:25 ` Jaehoon Chung 2016-06-01 2:36 ` Shawn Lin 2016-06-01 2:36 ` Shawn Lin 2016-06-01 9:19 ` Marcel Ziswiler 2016-06-01 9:19 ` Marcel Ziswiler 2016-06-01 18:58 ` Bjorn Andersson 2016-06-01 18:58 ` Bjorn Andersson 2016-06-02 8:08 ` Chen-Yu Tsai 2016-06-02 8:08 ` Chen-Yu Tsai 2016-06-02 8:31 ` Ulf Hansson 2016-06-02 8:31 ` Ulf Hansson 2016-06-02 8:31 ` Ulf Hansson 2016-06-02 9:35 ` Krzysztof Kozlowski 2016-06-02 9:35 ` Krzysztof Kozlowski 2016-06-02 9:35 ` Krzysztof Kozlowski 2016-06-02 15:01 ` Ulf Hansson 2016-06-02 15:01 ` Ulf Hansson 2016-06-02 15:01 ` Ulf Hansson 2016-05-29 7:04 ` [PATCH 2/3] mmc: sunxi: Fix DDR MMC timings for A80 Chen-Yu Tsai 2016-05-29 7:04 ` Chen-Yu Tsai 2016-05-30 11:34 ` Hans de Goede 2016-05-30 11:34 ` Hans de Goede 2016-05-30 12:59 ` Chen-Yu Tsai 2016-05-30 12:59 ` Chen-Yu Tsai 2016-05-30 15:38 ` Chen-Yu Tsai 2016-05-30 15:38 ` Chen-Yu Tsai 2016-05-30 18:05 ` Hans de Goede 2016-05-30 18:05 ` Hans de Goede 2016-05-29 7:04 ` Chen-Yu Tsai [this message] 2016-05-29 7:04 ` [PATCH 3/3] mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 Chen-Yu Tsai
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