From: Chen-Yu Tsai <wens@csie.org> To: Ulf Hansson <ulf.hansson@linaro.org>, Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/3] mmc: sunxi: Fix MMC DDR modes for Allwinner A80 Date: Sun, 29 May 2016 15:04:41 +0800 [thread overview] Message-ID: <1464505484-3661-1-git-send-email-wens@csie.org> (raw) Hi everyone, This series fixes and re-enables eMMC HS-DDR support for Allwinner A80 SoC. The issue with the original code was the mmc clock timings were incorrect, and thus we had disabled HS-DDR on A80 for the previous release. Patch 1 is a fix for mmc core. Arnd's patch to remove IS_ERR_VALUE replaced it with an incorrect check on return values, thus blocking the code path for HS-DDR and higher timing modes. This patch instead checks for a positive return code, which is how mmc_select_bus_width indicates a success. Patch 2 fixes the HS-DDR clock timings for the A80. Patch 3 re-enables HS-DDR mode for the A80. Regards ChenYu Chen-Yu Tsai (3): mmc: fix mmc mode selection for HS-DDR and higher mmc: sunxi: Fix DDR MMC timings for A80 mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 drivers/mmc/core/mmc.c | 4 ++-- drivers/mmc/host/sunxi-mmc.c | 9 ++------- 2 files changed, 4 insertions(+), 9 deletions(-) -- 2.8.1
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From: wens@csie.org (Chen-Yu Tsai) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/3] mmc: sunxi: Fix MMC DDR modes for Allwinner A80 Date: Sun, 29 May 2016 15:04:41 +0800 [thread overview] Message-ID: <1464505484-3661-1-git-send-email-wens@csie.org> (raw) Hi everyone, This series fixes and re-enables eMMC HS-DDR support for Allwinner A80 SoC. The issue with the original code was the mmc clock timings were incorrect, and thus we had disabled HS-DDR on A80 for the previous release. Patch 1 is a fix for mmc core. Arnd's patch to remove IS_ERR_VALUE replaced it with an incorrect check on return values, thus blocking the code path for HS-DDR and higher timing modes. This patch instead checks for a positive return code, which is how mmc_select_bus_width indicates a success. Patch 2 fixes the HS-DDR clock timings for the A80. Patch 3 re-enables HS-DDR mode for the A80. Regards ChenYu Chen-Yu Tsai (3): mmc: fix mmc mode selection for HS-DDR and higher mmc: sunxi: Fix DDR MMC timings for A80 mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 drivers/mmc/core/mmc.c | 4 ++-- drivers/mmc/host/sunxi-mmc.c | 9 ++------- 2 files changed, 4 insertions(+), 9 deletions(-) -- 2.8.1
next reply other threads:[~2016-05-29 7:04 UTC|newest] Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-29 7:04 Chen-Yu Tsai [this message] 2016-05-29 7:04 ` [PATCH 0/3] mmc: sunxi: Fix MMC DDR modes for Allwinner A80 Chen-Yu Tsai 2016-05-29 7:04 ` [PATCH 1/3] mmc: fix mmc mode selection for HS-DDR and higher Chen-Yu Tsai 2016-05-29 7:04 ` Chen-Yu Tsai 2016-05-31 9:30 ` Krzysztof Kozlowski 2016-05-31 9:30 ` Krzysztof Kozlowski 2016-06-01 1:25 ` Jaehoon Chung 2016-06-01 1:25 ` Jaehoon Chung 2016-06-01 2:36 ` Shawn Lin 2016-06-01 2:36 ` Shawn Lin 2016-06-01 9:19 ` Marcel Ziswiler 2016-06-01 9:19 ` Marcel Ziswiler 2016-06-01 18:58 ` Bjorn Andersson 2016-06-01 18:58 ` Bjorn Andersson 2016-06-02 8:08 ` Chen-Yu Tsai 2016-06-02 8:08 ` Chen-Yu Tsai 2016-06-02 8:31 ` Ulf Hansson 2016-06-02 8:31 ` Ulf Hansson 2016-06-02 8:31 ` Ulf Hansson 2016-06-02 9:35 ` Krzysztof Kozlowski 2016-06-02 9:35 ` Krzysztof Kozlowski 2016-06-02 9:35 ` Krzysztof Kozlowski 2016-06-02 15:01 ` Ulf Hansson 2016-06-02 15:01 ` Ulf Hansson 2016-06-02 15:01 ` Ulf Hansson 2016-05-29 7:04 ` [PATCH 2/3] mmc: sunxi: Fix DDR MMC timings for A80 Chen-Yu Tsai 2016-05-29 7:04 ` Chen-Yu Tsai 2016-05-30 11:34 ` Hans de Goede 2016-05-30 11:34 ` Hans de Goede 2016-05-30 12:59 ` Chen-Yu Tsai 2016-05-30 12:59 ` Chen-Yu Tsai 2016-05-30 15:38 ` Chen-Yu Tsai 2016-05-30 15:38 ` Chen-Yu Tsai 2016-05-30 18:05 ` Hans de Goede 2016-05-30 18:05 ` Hans de Goede 2016-05-29 7:04 ` [PATCH 3/3] mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 Chen-Yu Tsai 2016-05-29 7:04 ` Chen-Yu Tsai
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