* [U-Boot] [PATCH 1/8] arm: Remove colibri_pxa270 board
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
@ 2016-10-20 19:06 ` Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 2/8] arm: Remove h2200 board Simon Glass
` (7 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:06 UTC (permalink / raw)
To: u-boot
This board has not been converted to use DM_SERIAL by the deadline. Drop
it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/Kconfig | 5 -
board/toradex/colibri_pxa270/Kconfig | 12 --
board/toradex/colibri_pxa270/MAINTAINERS | 6 -
board/toradex/colibri_pxa270/Makefile | 9 --
board/toradex/colibri_pxa270/colibri_pxa270.c | 107 ------------
configs/colibri_pxa270_defconfig | 19 ---
include/configs/colibri_pxa270.h | 223 --------------------------
7 files changed, 381 deletions(-)
delete mode 100644 board/toradex/colibri_pxa270/Kconfig
delete mode 100644 board/toradex/colibri_pxa270/MAINTAINERS
delete mode 100644 board/toradex/colibri_pxa270/Makefile
delete mode 100644 board/toradex/colibri_pxa270/colibri_pxa270.c
delete mode 100644 configs/colibri_pxa270_defconfig
delete mode 100644 include/configs/colibri_pxa270.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d7a9b11..59c7bcc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -813,10 +813,6 @@ config TARGET_ZIPITZ2
bool "Support zipitz2"
select CPU_PXA
-config TARGET_COLIBRI_PXA270
- bool "Support colibri_pxa270"
- select CPU_PXA
-
config ARCH_UNIPHIER
bool "Socionext UniPhier SoCs"
select BLK
@@ -1013,7 +1009,6 @@ source "board/birdland/bav335x/Kconfig"
source "board/ti/ti814x/Kconfig"
source "board/ti/ti816x/Kconfig"
source "board/timll/devkit3250/Kconfig"
-source "board/toradex/colibri_pxa270/Kconfig"
source "board/toradex/colibri_vf/Kconfig"
source "board/technologic/ts4800/Kconfig"
source "board/vscom/baltos/Kconfig"
diff --git a/board/toradex/colibri_pxa270/Kconfig b/board/toradex/colibri_pxa270/Kconfig
deleted file mode 100644
index 949407a..0000000
--- a/board/toradex/colibri_pxa270/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_COLIBRI_PXA270
-
-config SYS_BOARD
- default "colibri_pxa270"
-
-config SYS_VENDOR
- default "toradex"
-
-config SYS_CONFIG_NAME
- default "colibri_pxa270"
-
-endif
diff --git a/board/toradex/colibri_pxa270/MAINTAINERS b/board/toradex/colibri_pxa270/MAINTAINERS
deleted file mode 100644
index b378d7b..0000000
--- a/board/toradex/colibri_pxa270/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-COLIBRI_PXA270 BOARD
-M: Marek Vasut <marek.vasut@gmail.com>
-S: Maintained
-F: board/toradex/colibri_pxa270/
-F: include/configs/colibri_pxa270.h
-F: configs/colibri_pxa270_defconfig
diff --git a/board/toradex/colibri_pxa270/Makefile b/board/toradex/colibri_pxa270/Makefile
deleted file mode 100644
index 57cfe9b..0000000
--- a/board/toradex/colibri_pxa270/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Toradex Colibri PXA270 Support
-#
-# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := colibri_pxa270.o
diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c b/board/toradex/colibri_pxa270/colibri_pxa270.c
deleted file mode 100644
index 3def0a6..0000000
--- a/board/toradex/colibri_pxa270/colibri_pxa270.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Toradex Colibri PXA270 Support
- *
- * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/regs-mmc.h>
-#include <asm/arch/pxa.h>
-#include <netdev.h>
-#include <asm/io.h>
-#include <serial.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
- /* We have RAM, disable cache */
- dcache_disable();
- icache_disable();
-
- /* arch number of Toradex Colibri PXA270 */
- gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int dram_init(void)
-{
- pxa2xx_dram_init();
- gd->ram_size = PHYS_SDRAM_1_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_CMD_USB
-int board_usb_init(int index, enum usb_init_type init)
-{
- writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
- ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
- UHCHR);
-
- writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
-
- while (UHCHR & UHCHR_FSBIR)
- ;
-
- writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
- writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
-
- /* Clear any OTG Pin Hold */
- if (readl(PSSR) & PSSR_OTGPH)
- writel(readl(PSSR) | PSSR_OTGPH, PSSR);
-
- writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
- writel(readl(UHCRHDA) | 0x100, UHCRHDA);
-
- /* Set port power control mask bits, only 3 ports. */
- writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
-
- /* enable port 2 */
- writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
- UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
- return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- return 0;
-}
-
-void usb_board_stop(void)
-{
- writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
- udelay(11);
- writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
-
- writel(readl(UHCCOMS) | 1, UHCCOMS);
- udelay(10);
-
- writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
-
- return;
-}
-#endif
-
-#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
-{
- return dm9000_initialize(bis);
-}
-#endif
-
-#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bis)
-{
- pxa_mmc_register(0);
- return 0;
-}
-#endif
diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig
deleted file mode 100644
index 9a57041..0000000
--- a/configs/colibri_pxa270_defconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_COLIBRI_PXA270=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="$ "
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
-# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
deleted file mode 100644
index ba8d93c..0000000
--- a/include/configs/colibri_pxa270.h
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * Toradex Colibri PXA270 configuration file
- *
- * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
- * Copyright (C) 2015 Marcel Ziswiler <marcel@ziswiler.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Board Configuration Options
- */
-#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
-#define CONFIG_SYS_TEXT_BASE 0x0
-/* Avoid overwriting factory configuration block */
-#define CONFIG_BOARD_SIZE_LIMIT 0x40000
-
-/* We will never enable dcache because we have to setup MMU first */
-#define CONFIG_SYS_DCACHE_OFF
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_BOOTCOMMAND \
- "if fatload mmc 0 0xa0000000 uImage; then " \
- "bootm 0xa0000000; " \
- "fi; " \
- "if usb reset && fatload usb 0 0xa0000000 uImage; then " \
- "bootm 0xa0000000; " \
- "fi; " \
- "bootm 0xc0000;"
-#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
-#define CONFIG_TIMESTAMP
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_LZMA /* LZMA compression support */
-
-/*
- * Serial Console Configuration
- */
-#define CONFIG_PXA_SERIAL
-#define CONFIG_FFUART 1
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Bootloader Components Configuration
- */
-#define CONFIG_CMD_ENV
-
-/* I2C support */
-#ifdef CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_PXA
-#define CONFIG_PXA_STD_I2C
-#define CONFIG_PXA_PWR_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
-#endif
-
-/* LCD support */
-#ifdef CONFIG_LCD
-#define CONFIG_PXA_LCD
-#define CONFIG_PXA_VGA
-#define CONFIG_SYS_WHITE_ON_BLACK
-#define CONFIG_CONSOLE_SCROLL_LINES 10
-#define CONFIG_CMD_BMP
-#define CONFIG_LCD_LOGO
-#endif
-
-/*
- * Networking Configuration
- */
-#ifdef CONFIG_CMD_NET
-
-#define CONFIG_DRIVER_DM9000 1
-#define CONFIG_DM9000_BASE 0x08000000
-#define DM9000_IO (CONFIG_DM9000_BASE)
-#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
-#define CONFIG_NET_RETRY_COUNT 10
-
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#endif
-
-#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_PBSIZE \
- (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_DEVICE_NULLDEV 1
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE 1
-
-/*
- * Clock Configuration
- */
-#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
-
-/*
- * DRAM Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-
-#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
-#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */
-
-#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
-
-/*
- * NOR FLASH
- */
-#ifdef CONFIG_CMD_FLASH
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER 1
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
-
-#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ)
-
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-#define CONFIG_SYS_FLASH_PROTECTION 1
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-
-#else /* No flash */
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ENV_IS_NOWHERE
-#endif
-
-#define CONFIG_SYS_MONITOR_BASE 0x0
-#define CONFIG_SYS_MONITOR_LEN 0x40000
-
-/* Skip factory configuration block */
-#define CONFIG_ENV_ADDR \
- (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000)
-#define CONFIG_ENV_SIZE 0x40000
-#define CONFIG_ENV_SECT_SIZE 0x40000
-
-/*
- * GPIO settings
- */
-#define CONFIG_SYS_GPSR0_VAL 0x00000000
-#define CONFIG_SYS_GPSR1_VAL 0x00020000
-#define CONFIG_SYS_GPSR2_VAL 0x0002c000
-#define CONFIG_SYS_GPSR3_VAL 0x00000000
-
-#define CONFIG_SYS_GPCR0_VAL 0x00000000
-#define CONFIG_SYS_GPCR1_VAL 0x00000000
-#define CONFIG_SYS_GPCR2_VAL 0x00000000
-#define CONFIG_SYS_GPCR3_VAL 0x00000000
-
-#define CONFIG_SYS_GPDR0_VAL 0xc8008000
-#define CONFIG_SYS_GPDR1_VAL 0xfc02a981
-#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff
-#define CONFIG_SYS_GPDR3_VAL 0x0061e804
-
-#define CONFIG_SYS_GAFR0_L_VAL 0x80100000
-#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010
-#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
-#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008
-#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
-#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002
-#define CONFIG_SYS_GAFR3_L_VAL 0x54000310
-#define CONFIG_SYS_GAFR3_U_VAL 0x00005401
-
-#define CONFIG_SYS_PSSR_VAL 0x30
-
-/*
- * Clock settings
- */
-#define CONFIG_SYS_CKEN 0x00500240
-#define CONFIG_SYS_CCCR 0x02000290
-
-/*
- * Memory settings
- */
-#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2
-#define CONFIG_SYS_MSC1_VAL 0x9ee1f994
-#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1
-#define CONFIG_SYS_MDCNFG_VAL 0x090009c9
-#define CONFIG_SYS_MDREFR_VAL 0x2003a031
-#define CONFIG_SYS_MDMRS_VAL 0x00220022
-#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
-#define CONFIG_SYS_SXCNFG_VAL 0x40044004
-
-/*
- * PCMCIA and CF Interfaces
- */
-#define CONFIG_SYS_MECR_VAL 0x00000000
-#define CONFIG_SYS_MCMEM0_VAL 0x00028307
-#define CONFIG_SYS_MCMEM1_VAL 0x00014307
-#define CONFIG_SYS_MCATT0_VAL 0x00038787
-#define CONFIG_SYS_MCATT1_VAL 0x0001c787
-#define CONFIG_SYS_MCIO0_VAL 0x0002830f
-#define CONFIG_SYS_MCIO1_VAL 0x0001430f
-
-#include "pxa-common.h"
-
-#endif /* __CONFIG_H */
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 2/8] arm: Remove h2200 board
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 1/8] arm: Remove colibri_pxa270 board Simon Glass
@ 2016-10-20 19:06 ` Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 3/8] arm: Remove zipitz2 board Simon Glass
` (6 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:06 UTC (permalink / raw)
To: u-boot
This board has not been converted to DM_SERIAL by the deadline.
Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/Kconfig | 5 --
board/h2200/Kconfig | 9 ---
board/h2200/MAINTAINERS | 6 --
board/h2200/Makefile | 14 ----
| 15 -----
board/h2200/h2200.c | 73 --------------------
configs/h2200_defconfig | 25 -------
include/configs/h2200.h | 155 -------------------------------------------
scripts/config_whitelist.txt | 1 -
9 files changed, 303 deletions(-)
delete mode 100644 board/h2200/Kconfig
delete mode 100644 board/h2200/MAINTAINERS
delete mode 100644 board/h2200/Makefile
delete mode 100644 board/h2200/h2200-header.S
delete mode 100644 board/h2200/h2200.c
delete mode 100644 configs/h2200_defconfig
delete mode 100644 include/configs/h2200.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 59c7bcc..26c8e2f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -805,10 +805,6 @@ config TARGET_LS1046ARDB
development platform that supports the QorIQ LS1046A
Layerscape Architecture processor.
-config TARGET_H2200
- bool "Support h2200"
- select CPU_PXA
-
config TARGET_ZIPITZ2
bool "Support zipitz2"
select CPU_PXA
@@ -978,7 +974,6 @@ source "board/freescale/mx53smd/Kconfig"
source "board/freescale/s32v234evb/Kconfig"
source "board/freescale/vf610twr/Kconfig"
source "board/gumstix/pepper/Kconfig"
-source "board/h2200/Kconfig"
source "board/hisilicon/hikey/Kconfig"
source "board/imx31_phycore/Kconfig"
source "board/isee/igep0033/Kconfig"
diff --git a/board/h2200/Kconfig b/board/h2200/Kconfig
deleted file mode 100644
index c0e0c1e..0000000
--- a/board/h2200/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_H2200
-
-config SYS_BOARD
- default "h2200"
-
-config SYS_CONFIG_NAME
- default "h2200"
-
-endif
diff --git a/board/h2200/MAINTAINERS b/board/h2200/MAINTAINERS
deleted file mode 100644
index b66ff51..0000000
--- a/board/h2200/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-H2200 BOARD
-M: Lukasz Dalek <luk0104@gmail.com>
-S: Maintained
-F: board/h2200/
-F: include/configs/h2200.h
-F: configs/h2200_defconfig
diff --git a/board/h2200/Makefile b/board/h2200/Makefile
deleted file mode 100644
index e516e91..0000000
--- a/board/h2200/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# h2200 Support
-#
-# Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := h2200.o
-
-extra-y := h2200-header.bin
-
-$(obj)/h2200-header.bin: $(obj)/h2200-header.o
- $(OBJCOPY) -O binary $< $@
diff --git a/board/h2200/h2200-header.S b/board/h2200/h2200-header.S
deleted file mode 100644
index ac2e6b4..0000000
--- a/board/h2200/h2200-header.S
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * iPAQ h2200 header
- *
- * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
- .word 0xea0003fe /* b 0x1000 */
-
- .org 0x40
- .ascii "ECEC"
-
- .org 0x1000 - 1
- .byte 0x0
diff --git a/board/h2200/h2200.c b/board/h2200/h2200.c
deleted file mode 100644
index 01f8e67..0000000
--- a/board/h2200/h2200.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * iPAQ h2200 board configuration
- *
- * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/pxa.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/io.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_eth_init(bd_t *bis)
-{
- usb_eth_initialize(bis);
- return 0;
-}
-
-void reset_cpu(ulong ignore)
-{
- /* Enable VLIO interface on Hamcop */
- writeb(0x1, 0x4000);
-
- /* Reset board (cold reset) */
- writeb(0xff, 0x4002);
-}
-
-int board_init(void)
-{
- /* We have RAM, disable cache */
- dcache_disable();
- icache_disable();
-
- gd->bd->bi_arch_number = MACH_TYPE_H2200;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- /* Let host see that device is disconnected */
- udc_disconnect();
- mdelay(500);
-
- return 0;
-}
-
-int dram_init(void)
-{
- /*
- * Everything except MSC0 was already set up by
- * 1st stage bootloader.
- *
- * This setting enables access to companion chip.
- */
- clrsetbits_le32(MSC0, 0xffffffff, CONFIG_SYS_MSC0_VAL);
- gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_USB_GADGET_PXA2XX
-int board_usb_init(int index, enum usb_init_type init)
-{
- return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- return 0;
-}
-#endif
diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig
deleted file mode 100644
index ed2217a..0000000
--- a/configs/h2200_defconfig
+++ /dev/null
@@ -1,25 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_H2200=y
-CONFIG_FIT=y
-# CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="> "
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_MEMORY is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_PING=y
-# CONFIG_CMD_MISC is not set
diff --git a/include/configs/h2200.h b/include/configs/h2200.h
deleted file mode 100644
index 3e419c6..0000000
--- a/include/configs/h2200.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * iPAQ h2200 board configuration
- *
- * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define MACH_TYPE_H2200 341
-#define CONFIG_MACH_TYPE MACH_TYPE_H2200
-
-#define CONFIG_CPU_PXA25X 1
-#define CONFIG_BOARD_H2200
-
-#define CONFIG_SYS_NO_FLASH
-
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
-
-#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800
-
-#define CONFIG_ENV_SIZE 0x00040000
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */
-
-/*
- * iPAQ 1st stage bootloader loads 2nd stage bootloader
- * at address 0xa0040000 but bootloader requires header
- * which is 0x1000 long.
- *
- * --- Header begin ---
- * .word 0xea0003fe ; b 0x1000
- *
- * .org 0x40
- * .ascii "ECEC"
- *
- * .org 0x1000
- * --- Header end ---
- */
-
-#define CONFIG_SYS_TEXT_BASE 0xa0041000
-
-/*
- * Static chips
- */
-
-#define CONFIG_SYS_MSC0_VAL 0x246c7ffc
-#define CONFIG_SYS_MSC1_VAL 0x7ff07ff0
-#define CONFIG_SYS_MSC2_VAL 0x7ff07ff0
-
-/*
- * PCMCIA and CF Interfaces
- */
-
-#define CONFIG_SYS_MECR_VAL 0x00000000
-#define CONFIG_SYS_MCMEM0_VAL 0x00000000
-#define CONFIG_SYS_MCMEM1_VAL 0x00000000
-#define CONFIG_SYS_MCATT0_VAL 0x00000000
-#define CONFIG_SYS_MCATT1_VAL 0x00000000
-#define CONFIG_SYS_MCIO0_VAL 0x00000000
-#define CONFIG_SYS_MCIO1_VAL 0x00000000
-
-#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
-#define CONFIG_SYS_SXCNFG_VAL 0x00040004
-
-#define CONFIG_SYS_MDREFR_VAL 0x0099E018
-#define CONFIG_SYS_MDCNFG_VAL 0x01C801CB
-#define CONFIG_SYS_MDMRS_VAL 0x00220022
-
-#define CONFIG_SYS_PSSR_VAL 0x00000000
-#define CONFIG_SYS_CKEN 0x00004840
-#define CONFIG_SYS_CCCR 0x00000161
-
-/*
- * GPIOs
- */
-
-#define CONFIG_SYS_GPSR0_VAL 0x01000000
-#define CONFIG_SYS_GPSR1_VAL 0x00000000
-#define CONFIG_SYS_GPSR2_VAL 0x00010000
-
-#define CONFIG_SYS_GPCR0_VAL 0x00000000
-#define CONFIG_SYS_GPCR1_VAL 0x00000000
-#define CONFIG_SYS_GPCR2_VAL 0x00000000
-
-#define CONFIG_SYS_GPDR0_VAL 0xF7E38C00
-#define CONFIG_SYS_GPDR1_VAL 0xBCFFBF83
-#define CONFIG_SYS_GPDR2_VAL 0x000157FF
-
-#define CONFIG_SYS_GAFR0_L_VAL 0x80401000
-#define CONFIG_SYS_GAFR0_U_VAL 0x00000112
-#define CONFIG_SYS_GAFR1_L_VAL 0x600A9550
-#define CONFIG_SYS_GAFR1_U_VAL 0x0005AAAA
-#define CONFIG_SYS_GAFR2_L_VAL 0x20000000
-#define CONFIG_SYS_GAFR2_U_VAL 0x00000000
-
-/*
- * Serial port
- */
-
-#define CONFIG_PXA_SERIAL
-#define CONFIG_FFUART
-#define CONFIG_CONS_INDEX 3
-
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 }
-
-#define CONFIG_FIT_DISABLE_SHA256
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-
-/* Monitor Command Prompt */
-
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE 256
-
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
-
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_USB_DEV_PULLUP_GPIO 33
-/* USB VBUS GPIO 3 */
-
-#define CONFIG_BOOTCOMMAND \
- "setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
- "if bootp ; then setenv downloaded 1 ; fi ; done ; " \
- "source :script ; " \
- "bootm ; "
-
-#define CONFIG_USB_GADGET_PXA2XX
-#define CONFIG_USB_ETHER
-#define CONFIG_USB_ETH_SUBSET
-
-#define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01"
-#define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02"
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "stdin=serial\0" \
- "stdout=serial\0" \
- "stderr=serial\0"
-
-#endif /* __CONFIG_H */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 04e9536..2c10c0b 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -373,7 +373,6 @@ CONFIG_BOARD_EARLY_INIT_F
CONFIG_BOARD_EARLY_INIT_R
CONFIG_BOARD_ECC_SUPPORT
CONFIG_BOARD_EMAC_COUNT
-CONFIG_BOARD_H2200
CONFIG_BOARD_IS_OPENRD_BASE
CONFIG_BOARD_IS_OPENRD_CLIENT
CONFIG_BOARD_IS_OPENRD_ULTIMATE
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 3/8] arm: Remove zipitz2 board
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 1/8] arm: Remove colibri_pxa270 board Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 2/8] arm: Remove h2200 board Simon Glass
@ 2016-10-20 19:06 ` Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 4/8] arm: Drop pxa serial driver Simon Glass
` (5 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:06 UTC (permalink / raw)
To: u-boot
This board has not been converted to DM_SERIAL by the deadline.
Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/Kconfig | 5 --
board/zipitz2/Kconfig | 9 --
board/zipitz2/MAINTAINERS | 6 --
board/zipitz2/Makefile | 10 ---
board/zipitz2/zipitz2.c | 217 ----------------------------------------------
configs/zipitz2_defconfig | 19 ----
include/configs/zipitz2.h | 213 ---------------------------------------------
7 files changed, 479 deletions(-)
delete mode 100644 board/zipitz2/Kconfig
delete mode 100644 board/zipitz2/MAINTAINERS
delete mode 100644 board/zipitz2/Makefile
delete mode 100644 board/zipitz2/zipitz2.c
delete mode 100644 configs/zipitz2_defconfig
delete mode 100644 include/configs/zipitz2.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 26c8e2f..cd582a7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -805,10 +805,6 @@ config TARGET_LS1046ARDB
development platform that supports the QorIQ LS1046A
Layerscape Architecture processor.
-config TARGET_ZIPITZ2
- bool "Support zipitz2"
- select CPU_PXA
-
config ARCH_UNIPHIER
bool "Socionext UniPhier SoCs"
select BLK
@@ -1009,7 +1005,6 @@ source "board/technologic/ts4800/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/woodburn/Kconfig"
source "board/work-microwave/work_92105/Kconfig"
-source "board/zipitz2/Kconfig"
source "arch/arm/Kconfig.debug"
diff --git a/board/zipitz2/Kconfig b/board/zipitz2/Kconfig
deleted file mode 100644
index c663504..0000000
--- a/board/zipitz2/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_ZIPITZ2
-
-config SYS_BOARD
- default "zipitz2"
-
-config SYS_CONFIG_NAME
- default "zipitz2"
-
-endif
diff --git a/board/zipitz2/MAINTAINERS b/board/zipitz2/MAINTAINERS
deleted file mode 100644
index e027cd3..0000000
--- a/board/zipitz2/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-ZIPITZ2 BOARD
-M: Vasily Khoruzhick <anarsoul@gmail.com>
-S: Maintained
-F: board/zipitz2/
-F: include/configs/zipitz2.h
-F: configs/zipitz2_defconfig
diff --git a/board/zipitz2/Makefile b/board/zipitz2/Makefile
deleted file mode 100644
index 855f6bc..0000000
--- a/board/zipitz2/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# Copyright (C) 2009
-# Marek Vasut <marek.vasut@gmail.com>
-#
-# Heavily based on pxa255_idp platform
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := zipitz2.o
diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c
deleted file mode 100644
index d3ca939..0000000
--- a/board/zipitz2/zipitz2.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * Copyright (C) 2009
- * Marek Vasut <marek.vasut@gmail.com>
- *
- * Heavily based on pxa255_idp platform
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <serial.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa.h>
-#include <asm/arch/regs-mmc.h>
-#include <spi.h>
-#include <asm/io.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_CMD_SPI
-void lcd_start(void);
-#else
-inline void lcd_start(void) {};
-#endif
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-int board_init(void)
-{
- /* arch number of Z2 */
- gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- /* Enable LCD */
- lcd_start();
-
- return 0;
-}
-
-int dram_init(void)
-{
- pxa2xx_dram_init();
- gd->ram_size = PHYS_SDRAM_1_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_CMD_USB
-int board_usb_init(int index, enum usb_init_type init)
-{
- /* enable port 2 */
- writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
- UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
- return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- return 0;
-}
-
-void usb_board_stop(void)
-{
-}
-#endif
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-}
-
-#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bis)
-{
- pxa_mmc_register(0);
- return 0;
-}
-#endif
-
-#ifdef CONFIG_CMD_SPI
-
-struct {
- unsigned char reg;
- unsigned short data;
- unsigned char mdelay;
-} lcd_data[] = {
- { 0x07, 0x0000, 0 },
- { 0x13, 0x0000, 10 },
- { 0x11, 0x3004, 0 },
- { 0x14, 0x200F, 0 },
- { 0x10, 0x1a20, 0 },
- { 0x13, 0x0040, 50 },
- { 0x13, 0x0060, 0 },
- { 0x13, 0x0070, 200 },
- { 0x01, 0x0127, 0 },
- { 0x02, 0x0700, 0 },
- { 0x03, 0x1030, 0 },
- { 0x08, 0x0208, 0 },
- { 0x0B, 0x0620, 0 },
- { 0x0C, 0x0110, 0 },
- { 0x30, 0x0120, 0 },
- { 0x31, 0x0127, 0 },
- { 0x32, 0x0000, 0 },
- { 0x33, 0x0503, 0 },
- { 0x34, 0x0727, 0 },
- { 0x35, 0x0124, 0 },
- { 0x36, 0x0706, 0 },
- { 0x37, 0x0701, 0 },
- { 0x38, 0x0F00, 0 },
- { 0x39, 0x0F00, 0 },
- { 0x40, 0x0000, 0 },
- { 0x41, 0x0000, 0 },
- { 0x42, 0x013f, 0 },
- { 0x43, 0x0000, 0 },
- { 0x44, 0x013f, 0 },
- { 0x45, 0x0000, 0 },
- { 0x46, 0xef00, 0 },
- { 0x47, 0x013f, 0 },
- { 0x48, 0x0000, 0 },
- { 0x07, 0x0015, 30 },
- { 0x07, 0x0017, 0 },
- { 0x20, 0x0000, 0 },
- { 0x21, 0x0000, 0 },
- { 0x22, 0x0000, 0 },
-};
-
-void zipitz2_spi_sda(int set)
-{
- /* GPIO 13 */
- if (set)
- writel((1 << 13), GPSR0);
- else
- writel((1 << 13), GPCR0);
-}
-
-void zipitz2_spi_scl(int set)
-{
- /* GPIO 22 */
- if (set)
- writel((1 << 22), GPCR0);
- else
- writel((1 << 22), GPSR0);
-}
-
-unsigned char zipitz2_spi_read(void)
-{
- /* GPIO 40 */
- return !!(readl(GPLR1) & (1 << 8));
-}
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- /* Always valid */
- return 1;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- /* GPIO 88 low */
- writel((1 << 24), GPCR2);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- /* GPIO 88 high */
- writel((1 << 24), GPSR2);
-}
-
-void lcd_start(void)
-{
- int i;
- unsigned char reg[3] = { 0x74, 0x00, 0 };
- unsigned char data[3] = { 0x76, 0, 0 };
- unsigned char dummy[3] = { 0, 0, 0 };
-
- /* PWM2 AF */
- writel(readl(GAFR0_L) | 0x00800000, GAFR0_L);
- /* Enable clock to all PWM */
- writel(readl(CKEN) | 0x3, CKEN);
- /* Configure PWM2 */
- writel(0x4f, PWM_CTRL2);
- writel(0x2ff, PWM_PWDUTY2);
- writel(792, PWM_PERVAL2);
-
- /* Toggle the reset pin to reset the LCD */
- writel((1 << 19), GPSR0);
- udelay(100000);
- writel((1 << 19), GPCR0);
- udelay(20000);
- writel((1 << 19), GPSR0);
- udelay(20000);
-
- /* Program the LCD init sequence */
- for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
- reg[0] = 0x74;
- reg[1] = 0x0;
- reg[2] = lcd_data[i].reg;
- spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
-
- data[0] = 0x76;
- data[1] = lcd_data[i].data >> 8;
- data[2] = lcd_data[i].data & 0xff;
- spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
-
- if (lcd_data[i].mdelay)
- udelay(lcd_data[i].mdelay * 1000);
- }
-
- writel((1 << 11), GPSR0);
-}
-#endif
diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig
deleted file mode 100644
index d9819a5..0000000
--- a/configs/zipitz2_defconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_ZIPITZ2=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="$ "
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
-# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
deleted file mode 100644
index 6e83cc9..0000000
--- a/include/configs/zipitz2.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * Aeronix Zipit Z2 configuration file
- *
- * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Board Configuration Options
- */
-#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
-#define CONFIG_SYS_TEXT_BASE 0x0
-
-#undef CONFIG_BOARD_LATE_INIT
-#undef CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_PREBOOT
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR 0x40000
-#define CONFIG_ENV_SIZE 0x10000
-
-#define CONFIG_SYS_MALLOC_LEN (128*1024)
-#define CONFIG_ARCH_CPU_INIT
-
-#define CONFIG_BOOTCOMMAND \
- "if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\
- "then " \
- "source 0xa0000000; " \
- "else " \
- "bootm 0x50000; " \
- "fi; "
-#define CONFIG_BOOTARGS \
- "console=tty0 console=ttyS2,115200 fbcon=rotate:3"
-#define CONFIG_TIMESTAMP
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_SYS_TEXT_BASE 0x0
-#define CONFIG_LZMA /* LZMA compression support */
-
-/*
- * Serial Console Configuration
- * STUART - the lower serial port on Colibri board
- */
-#define CONFIG_PXA_SERIAL
-#define CONFIG_STUART 1
-#define CONFIG_CONS_INDEX 2
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Bootloader Components Configuration
- */
-#define CONFIG_CMD_ENV
-
-/*
- * MMC Card Configuration
- */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_PXA_MMC_GENERIC
-#define CONFIG_SYS_MMC_BASE 0xF0000000
-#define CONFIG_DOS_PARTITION
-#endif
-
-/*
- * SPI and LCD
- */
-#ifdef CONFIG_CMD_SPI
-#define CONFIG_SOFT_SPI
-#define CONFIG_LCD
-#define CONFIG_LCD_ROTATION
-#define CONFIG_PXA_LCD
-#define CONFIG_LMS283GF05
-
-#define SPI_DELAY udelay(10)
-#define SPI_SDA(val) zipitz2_spi_sda(val)
-#define SPI_SCL(val) zipitz2_spi_scl(val)
-#define SPI_READ zipitz2_spi_read()
-#ifndef __ASSEMBLY__
-void zipitz2_spi_sda(int);
-void zipitz2_spi_scl(int);
-unsigned char zipitz2_spi_read(void);
-#endif
-#endif
-
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_DEVICE_NULLDEV 1
-
-/*
- * Clock Configuration
- */
-#define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
-
-/*
- * SRAM Map
- */
-#define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */
-#define PHYS_SRAM_SIZE 0x00040000 /* 256k */
-
-/*
- * DRAM Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-
-#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
-#define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */
-
-#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048)
-
-/*
- * NOR FLASH
- */
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
-#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER 1
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-
-#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 256
-
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
-#define CONFIG_SYS_FLASH_WRITE_TOUT 240000
-#define CONFIG_SYS_FLASH_LOCK_TOUT 240000
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
-#define CONFIG_SYS_FLASH_PROTECTION
-
-/*
- * GPIO settings
- */
-#define CONFIG_SYS_GAFR0_L_VAL 0x02000140
-#define CONFIG_SYS_GAFR0_U_VAL 0x59188000
-#define CONFIG_SYS_GAFR1_L_VAL 0x63900002
-#define CONFIG_SYS_GAFR1_U_VAL 0xaaa03950
-#define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa
-#define CONFIG_SYS_GAFR2_U_VAL 0x29000308
-#define CONFIG_SYS_GAFR3_L_VAL 0x54000000
-#define CONFIG_SYS_GAFR3_U_VAL 0x000000d5
-#define CONFIG_SYS_GPCR0_VAL 0x00000000
-#define CONFIG_SYS_GPCR1_VAL 0x00000020
-#define CONFIG_SYS_GPCR2_VAL 0x00000000
-#define CONFIG_SYS_GPCR3_VAL 0x00000000
-#define CONFIG_SYS_GPDR0_VAL 0xdafcee00
-#define CONFIG_SYS_GPDR1_VAL 0xffa3aaab
-#define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff
-#define CONFIG_SYS_GPDR3_VAL 0x001b1f8a
-#define CONFIG_SYS_GPSR0_VAL 0x06080400
-#define CONFIG_SYS_GPSR1_VAL 0x007f0000
-#define CONFIG_SYS_GPSR2_VAL 0x032a0000
-#define CONFIG_SYS_GPSR3_VAL 0x00000180
-
-#define CONFIG_SYS_PSSR_VAL 0x30
-
-/*
- * Clock settings
- */
-#define CONFIG_SYS_CKEN 0x00511220
-#define CONFIG_SYS_CCCR 0x00000190
-
-/*
- * Memory settings
- */
-#define CONFIG_SYS_MSC0_VAL 0x2ffc38f8
-#define CONFIG_SYS_MSC1_VAL 0x0000ccd1
-#define CONFIG_SYS_MSC2_VAL 0x0000b884
-#define CONFIG_SYS_MDCNFG_VAL 0x08000ba9
-#define CONFIG_SYS_MDREFR_VAL 0x2011a01e
-#define CONFIG_SYS_MDMRS_VAL 0x00000000
-#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
-#define CONFIG_SYS_SXCNFG_VAL 0x40044004
-
-/*
- * PCMCIA and CF Interfaces
- */
-#define CONFIG_SYS_MECR_VAL 0x00000001
-#define CONFIG_SYS_MCMEM0_VAL 0x00014307
-#define CONFIG_SYS_MCMEM1_VAL 0x00014307
-#define CONFIG_SYS_MCATT0_VAL 0x0001c787
-#define CONFIG_SYS_MCATT1_VAL 0x0001c787
-#define CONFIG_SYS_MCIO0_VAL 0x0001430f
-#define CONFIG_SYS_MCIO1_VAL 0x0001430f
-
-#include "pxa-common.h"
-
-#endif /* __CONFIG_H */
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 4/8] arm: Drop pxa serial driver
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
` (2 preceding siblings ...)
2016-10-20 19:06 ` [U-Boot] [PATCH 3/8] arm: Remove zipitz2 board Simon Glass
@ 2016-10-20 19:06 ` Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 5/8] serial: Update docs to indicate mcfuart supports DM_SERIAL Simon Glass
` (4 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:06 UTC (permalink / raw)
To: u-boot
There are no boards using this driver and it has not been converted to
driver model. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
doc/driver-model/serial-howto.txt | 1 -
drivers/serial/Makefile | 1 -
drivers/serial/serial_pxa.c | 299 --------------------------------------
scripts/config_whitelist.txt | 1 -
4 files changed, 302 deletions(-)
delete mode 100644 drivers/serial/serial_pxa.c
diff --git a/doc/driver-model/serial-howto.txt b/doc/driver-model/serial-howto.txt
index cddfb9f..ed846e5 100644
--- a/doc/driver-model/serial-howto.txt
+++ b/doc/driver-model/serial-howto.txt
@@ -6,7 +6,6 @@ ones remain:
mcfuart.c
serial_bfin.c
- serial_pxa.c
serial_s3c24x0.c
The deadline for this work was the end of January 2016. If no one steps
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 21b1292..0c75718 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -26,7 +26,6 @@ obj-$(CONFIG_MCFUART) += mcfuart.o
obj-$(CONFIG_SYS_NS16550) += ns16550.o
obj-$(CONFIG_S5P) += serial_s5p.o
obj-$(CONFIG_MXC_UART) += serial_mxc.o
-obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c
deleted file mode 100644
index 1eb19ec..0000000
--- a/drivers/serial/serial_pxa.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/regs-uart.h>
-#include <asm/io.h>
-#include <linux/compiler.h>
-#include <serial.h>
-#include <watchdog.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
- * easily handle enabling of clock.
- */
-#ifdef CONFIG_CPU_MONAHANS
-#define UART_CLK_BASE CKENA_21_BTUART
-#define UART_CLK_REG CKENA
-#define BTUART_INDEX 0
-#define FFUART_INDEX 1
-#define STUART_INDEX 2
-#elif CONFIG_CPU_PXA25X
-#define UART_CLK_BASE (1 << 4) /* HWUART */
-#define UART_CLK_REG CKEN
-#define HWUART_INDEX 0
-#define STUART_INDEX 1
-#define FFUART_INDEX 2
-#define BTUART_INDEX 3
-#else /* PXA27x */
-#define UART_CLK_BASE CKEN5_STUART
-#define UART_CLK_REG CKEN
-#define STUART_INDEX 0
-#define FFUART_INDEX 1
-#define BTUART_INDEX 2
-#endif
-
-/*
- * Only PXA250 has HWUART, to avoid poluting the code with more macros,
- * artificially introduce this.
- */
-#ifndef CONFIG_CPU_PXA25X
-#define HWUART_INDEX 0xff
-#endif
-
-static uint32_t pxa_uart_get_baud_divider(void)
-{
- if (gd->baudrate == 1200)
- return 768;
- else if (gd->baudrate == 9600)
- return 96;
- else if (gd->baudrate == 19200)
- return 48;
- else if (gd->baudrate == 38400)
- return 24;
- else if (gd->baudrate == 57600)
- return 16;
- else if (gd->baudrate == 115200)
- return 8;
- else /* Unsupported baudrate */
- return 0;
-}
-
-static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index)
-{
- switch (uart_index) {
- case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE;
- case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE;
- case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE;
- case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE;
- default:
- return NULL;
- }
-}
-
-static void pxa_uart_toggle_clock(uint32_t uart_index, int enable)
-{
- uint32_t clk_reg, clk_offset, reg;
-
- clk_reg = UART_CLK_REG;
- clk_offset = UART_CLK_BASE << uart_index;
-
- reg = readl(clk_reg);
-
- if (enable)
- reg |= clk_offset;
- else
- reg &= ~clk_offset;
-
- writel(reg, clk_reg);
-}
-
-/*
- * Enable clock and set baud rate, parity etc.
- */
-void pxa_setbrg_dev(uint32_t uart_index)
-{
- uint32_t divider = 0;
- struct pxa_uart_regs *uart_regs;
-
- divider = pxa_uart_get_baud_divider();
- if (!divider)
- hang();
-
- uart_regs = pxa_uart_index_to_regs(uart_index);
- if (!uart_regs)
- hang();
-
- pxa_uart_toggle_clock(uart_index, 1);
-
- /* Disable interrupts and FIFOs */
- writel(0, &uart_regs->ier);
- writel(0, &uart_regs->fcr);
-
- /* Set baud rate */
- writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr);
- writel(divider & 0xff, &uart_regs->dll);
- writel(divider >> 8, &uart_regs->dlh);
- writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr);
-
- /* Enable UART */
- writel(IER_UUE, &uart_regs->ier);
-}
-
-/*
- * Initialise the serial port with the given baudrate. The settings
- * are always 8 data bits, no parity, 1 stop bit, no start bits.
- */
-int pxa_init_dev(unsigned int uart_index)
-{
- pxa_setbrg_dev (uart_index);
- return 0;
-}
-
-/*
- * Output a single byte to the serial port.
- */
-void pxa_putc_dev(unsigned int uart_index, const char c)
-{
- struct pxa_uart_regs *uart_regs;
-
- /* If \n, also do \r */
- if (c == '\n')
- pxa_putc_dev(uart_index, '\r');
-
- uart_regs = pxa_uart_index_to_regs(uart_index);
- if (!uart_regs)
- hang();
-
- while (!(readl(&uart_regs->lsr) & LSR_TEMT))
- WATCHDOG_RESET();
- writel(c, &uart_regs->thr);
-}
-
-/*
- * Read a single byte from the serial port. Returns 1 on success, 0
- * otherwise. When the function is succesfull, the character read is
- * written into its argument c.
- */
-int pxa_tstc_dev(unsigned int uart_index)
-{
- struct pxa_uart_regs *uart_regs;
-
- uart_regs = pxa_uart_index_to_regs(uart_index);
- if (!uart_regs)
- return -1;
-
- return readl(&uart_regs->lsr) & LSR_DR;
-}
-
-/*
- * Read a single byte from the serial port. Returns 1 on success, 0
- * otherwise. When the function is succesfull, the character read is
- * written into its argument c.
- */
-int pxa_getc_dev(unsigned int uart_index)
-{
- struct pxa_uart_regs *uart_regs;
-
- uart_regs = pxa_uart_index_to_regs(uart_index);
- if (!uart_regs)
- return -1;
-
- while (!(readl(&uart_regs->lsr) & LSR_DR))
- WATCHDOG_RESET();
- return readl(&uart_regs->rbr) & 0xff;
-}
-
-void pxa_puts_dev(unsigned int uart_index, const char *s)
-{
- while (*s)
- pxa_putc_dev(uart_index, *s++);
-}
-
-#define pxa_uart(uart, UART) \
- int uart##_init(void) \
- { \
- return pxa_init_dev(UART##_INDEX); \
- } \
- \
- void uart##_setbrg(void) \
- { \
- return pxa_setbrg_dev(UART##_INDEX); \
- } \
- \
- void uart##_putc(const char c) \
- { \
- return pxa_putc_dev(UART##_INDEX, c); \
- } \
- \
- void uart##_puts(const char *s) \
- { \
- return pxa_puts_dev(UART##_INDEX, s); \
- } \
- \
- int uart##_getc(void) \
- { \
- return pxa_getc_dev(UART##_INDEX); \
- } \
- \
- int uart##_tstc(void) \
- { \
- return pxa_tstc_dev(UART##_INDEX); \
- } \
-
-#define pxa_uart_desc(uart) \
- struct serial_device serial_##uart##_device = \
- { \
- .name = "serial_"#uart, \
- .start = uart##_init, \
- .stop = NULL, \
- .setbrg = uart##_setbrg, \
- .getc = uart##_getc, \
- .tstc = uart##_tstc, \
- .putc = uart##_putc, \
- .puts = uart##_puts, \
- };
-
-#define pxa_uart_multi(uart, UART) \
- pxa_uart(uart, UART) \
- pxa_uart_desc(uart)
-
-#if defined(CONFIG_HWUART)
- pxa_uart_multi(hwuart, HWUART)
-#endif
-#if defined(CONFIG_STUART)
- pxa_uart_multi(stuart, STUART)
-#endif
-#if defined(CONFIG_FFUART)
- pxa_uart_multi(ffuart, FFUART)
-#endif
-#if defined(CONFIG_BTUART)
- pxa_uart_multi(btuart, BTUART)
-#endif
-
-__weak struct serial_device *default_serial_console(void)
-{
-#if CONFIG_CONS_INDEX == 1
- return &serial_hwuart_device;
-#elif CONFIG_CONS_INDEX == 2
- return &serial_stuart_device;
-#elif CONFIG_CONS_INDEX == 3
- return &serial_ffuart_device;
-#elif CONFIG_CONS_INDEX == 4
- return &serial_btuart_device;
-#else
-#error "Bad CONFIG_CONS_INDEX."
-#endif
-}
-
-void pxa_serial_initialize(void)
-{
-#if defined(CONFIG_FFUART)
- serial_register(&serial_ffuart_device);
-#endif
-#if defined(CONFIG_BTUART)
- serial_register(&serial_btuart_device);
-#endif
-#if defined(CONFIG_STUART)
- serial_register(&serial_stuart_device);
-#endif
-}
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2c10c0b..4d42fc5 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3751,7 +3751,6 @@ CONFIG_PWM_IMX
CONFIG_PXA_LCD
CONFIG_PXA_MMC_GENERIC
CONFIG_PXA_PWR_I2C
-CONFIG_PXA_SERIAL
CONFIG_PXA_STD_I2C
CONFIG_PXA_VGA
CONFIG_PXA_VIDEO
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 5/8] serial: Update docs to indicate mcfuart supports DM_SERIAL
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
` (3 preceding siblings ...)
2016-10-20 19:06 ` [U-Boot] [PATCH 4/8] arm: Drop pxa serial driver Simon Glass
@ 2016-10-20 19:06 ` Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 6/8] arm: Remove smdk2410 board Simon Glass
` (3 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:06 UTC (permalink / raw)
To: u-boot
This driver was converted so we should remove it from the list.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
doc/driver-model/serial-howto.txt | 1 -
1 file changed, 1 deletion(-)
diff --git a/doc/driver-model/serial-howto.txt b/doc/driver-model/serial-howto.txt
index ed846e5..a655464 100644
--- a/doc/driver-model/serial-howto.txt
+++ b/doc/driver-model/serial-howto.txt
@@ -4,7 +4,6 @@ How to port a serial driver to driver model
Almost all of the serial drivers have been converted as at January 2016. These
ones remain:
- mcfuart.c
serial_bfin.c
serial_s3c24x0.c
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 6/8] arm: Remove smdk2410 board
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
` (4 preceding siblings ...)
2016-10-20 19:06 ` [U-Boot] [PATCH 5/8] serial: Update docs to indicate mcfuart supports DM_SERIAL Simon Glass
@ 2016-10-20 19:06 ` Simon Glass
2016-10-20 19:06 ` [U-Boot] [PATCH 7/8] arm: Remove VCMA9 board Simon Glass
` (2 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:06 UTC (permalink / raw)
To: u-boot
This board has not been converted to DM_SERIAL by the deadline.
Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/Kconfig | 5 -
board/samsung/smdk2410/Kconfig | 15 ---
board/samsung/smdk2410/MAINTAINERS | 6 --
board/samsung/smdk2410/Makefile | 9 --
board/samsung/smdk2410/lowlevel_init.S | 146 --------------------------
board/samsung/smdk2410/smdk2410.c | 139 -------------------------
configs/smdk2410_defconfig | 16 ---
include/configs/smdk2410.h | 181 ---------------------------------
scripts/config_whitelist.txt | 2 -
9 files changed, 519 deletions(-)
delete mode 100644 board/samsung/smdk2410/Kconfig
delete mode 100644 board/samsung/smdk2410/MAINTAINERS
delete mode 100644 board/samsung/smdk2410/Makefile
delete mode 100644 board/samsung/smdk2410/lowlevel_init.S
delete mode 100644 board/samsung/smdk2410/smdk2410.c
delete mode 100644 configs/smdk2410_defconfig
delete mode 100644 include/configs/smdk2410.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cd582a7..6aa5208 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -141,10 +141,6 @@ config TARGET_VCMA9
bool "Support VCMA9"
select CPU_ARM920T
-config TARGET_SMDK2410
- bool "Support smdk2410"
- select CPU_ARM920T
-
config TARGET_ASPENITE
bool "Support aspenite"
select CPU_ARM926EJS
@@ -978,7 +974,6 @@ source "board/olimex/mx23_olinuxino/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/phytec/pcm052/Kconfig"
source "board/ppcag/bg0900/Kconfig"
-source "board/samsung/smdk2410/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/schulercontrol/sc_sps_1/Kconfig"
source "board/siemens/draco/Kconfig"
diff --git a/board/samsung/smdk2410/Kconfig b/board/samsung/smdk2410/Kconfig
deleted file mode 100644
index e987b64..0000000
--- a/board/samsung/smdk2410/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_SMDK2410
-
-config SYS_BOARD
- default "smdk2410"
-
-config SYS_VENDOR
- default "samsung"
-
-config SYS_SOC
- default "s3c24x0"
-
-config SYS_CONFIG_NAME
- default "smdk2410"
-
-endif
diff --git a/board/samsung/smdk2410/MAINTAINERS b/board/samsung/smdk2410/MAINTAINERS
deleted file mode 100644
index 12a25e8..0000000
--- a/board/samsung/smdk2410/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-SMDK2410 BOARD
-M: David M?ller <d.mueller@elsoft.ch>
-S: Maintained
-F: board/samsung/smdk2410/
-F: include/configs/smdk2410.h
-F: configs/smdk2410_defconfig
diff --git a/board/samsung/smdk2410/Makefile b/board/samsung/smdk2410/Makefile
deleted file mode 100644
index 1939a21..0000000
--- a/board/samsung/smdk2410/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := smdk2410.o
-obj-y += lowlevel_init.o
diff --git a/board/samsung/smdk2410/lowlevel_init.S b/board/samsung/smdk2410/lowlevel_init.S
deleted file mode 100644
index c3f4187..0000000
--- a/board/samsung/smdk2410/lowlevel_init.S
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
- *
- * Modified for the Samsung SMDK2410 by
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-
-#include <config.h>
-
-/* some parameters for the board */
-
-/*
- *
- * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
- *
- * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar@sec.samsung.com>
- *
- */
-
-#define BWSCON 0x48000000
-
-/* BWSCON */
-#define DW8 (0x0)
-#define DW16 (0x1)
-#define DW32 (0x2)
-#define WAIT (0x1<<2)
-#define UBLB (0x1<<3)
-
-#define B1_BWSCON (DW32)
-#define B2_BWSCON (DW16)
-#define B3_BWSCON (DW16 + WAIT + UBLB)
-#define B4_BWSCON (DW16)
-#define B5_BWSCON (DW16)
-#define B6_BWSCON (DW32)
-#define B7_BWSCON (DW32)
-
-/* BANK0CON */
-#define B0_Tacs 0x0 /* 0clk */
-#define B0_Tcos 0x0 /* 0clk */
-#define B0_Tacc 0x7 /* 14clk */
-#define B0_Tcoh 0x0 /* 0clk */
-#define B0_Tah 0x0 /* 0clk */
-#define B0_Tacp 0x0
-#define B0_PMC 0x0 /* normal */
-
-/* BANK1CON */
-#define B1_Tacs 0x0 /* 0clk */
-#define B1_Tcos 0x0 /* 0clk */
-#define B1_Tacc 0x7 /* 14clk */
-#define B1_Tcoh 0x0 /* 0clk */
-#define B1_Tah 0x0 /* 0clk */
-#define B1_Tacp 0x0
-#define B1_PMC 0x0
-
-#define B2_Tacs 0x0
-#define B2_Tcos 0x0
-#define B2_Tacc 0x7
-#define B2_Tcoh 0x0
-#define B2_Tah 0x0
-#define B2_Tacp 0x0
-#define B2_PMC 0x0
-
-#define B3_Tacs 0x0 /* 0clk */
-#define B3_Tcos 0x3 /* 4clk */
-#define B3_Tacc 0x7 /* 14clk */
-#define B3_Tcoh 0x1 /* 1clk */
-#define B3_Tah 0x0 /* 0clk */
-#define B3_Tacp 0x3 /* 6clk */
-#define B3_PMC 0x0 /* normal */
-
-#define B4_Tacs 0x0 /* 0clk */
-#define B4_Tcos 0x0 /* 0clk */
-#define B4_Tacc 0x7 /* 14clk */
-#define B4_Tcoh 0x0 /* 0clk */
-#define B4_Tah 0x0 /* 0clk */
-#define B4_Tacp 0x0
-#define B4_PMC 0x0 /* normal */
-
-#define B5_Tacs 0x0 /* 0clk */
-#define B5_Tcos 0x0 /* 0clk */
-#define B5_Tacc 0x7 /* 14clk */
-#define B5_Tcoh 0x0 /* 0clk */
-#define B5_Tah 0x0 /* 0clk */
-#define B5_Tacp 0x0
-#define B5_PMC 0x0 /* normal */
-
-#define B6_MT 0x3 /* SDRAM */
-#define B6_Trcd 0x1
-#define B6_SCAN 0x1 /* 9bit */
-
-#define B7_MT 0x3 /* SDRAM */
-#define B7_Trcd 0x1 /* 3clk */
-#define B7_SCAN 0x1 /* 9bit */
-
-/* REFRESH parameter */
-#define REFEN 0x1 /* Refresh enable */
-#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
-#define Trp 0x0 /* 2clk */
-#define Trc 0x3 /* 7clk */
-#define Tchr 0x2 /* 3clk */
-#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
-/**************************************/
-
-.globl lowlevel_init
-lowlevel_init:
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads SMRDATA out of FLASH rather than memory ! */
- ldr r0, =SMRDATA
- ldr r1, =CONFIG_SYS_TEXT_BASE
- sub r0, r0, r1
- ldr r1, =BWSCON /* Bus Width Status Controller */
- add r2, r0, #13*4
-0:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r2, r0
- bne 0b
-
- /* everything is fine now */
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-SMRDATA:
- .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32
- .word 0x30
- .word 0x30
diff --git a/board/samsung/smdk2410/smdk2410.c b/board/samsung/smdk2410/smdk2410.c
deleted file mode 100644
index 6e678c7..0000000
--- a/board/samsung/smdk2410/smdk2410.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002, 2010
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/io.h>
-#include <asm/arch/s3c24x0_cpu.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define FCLK_SPEED 1
-
-#if (FCLK_SPEED == 0) /* Fout = 203MHz, Fin = 12MHz for Audio */
-#define M_MDIV 0xC3
-#define M_PDIV 0x4
-#define M_SDIV 0x1
-#elif (FCLK_SPEED == 1) /* Fout = 202.8MHz */
-#define M_MDIV 0xA1
-#define M_PDIV 0x3
-#define M_SDIV 0x1
-#endif
-
-#define USB_CLOCK 1
-
-#if (USB_CLOCK == 0)
-#define U_M_MDIV 0xA1
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x1
-#elif (USB_CLOCK == 1)
-#define U_M_MDIV 0x48
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x2
-#endif
-
-static inline void pll_delay(unsigned long loops)
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b" : "=r" (loops) : "0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_early_init_f(void)
-{
- struct s3c24x0_clock_power * const clk_power =
- s3c24x0_get_base_clock_power();
- struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
-
- /* to reduce PLL lock time, adjust the LOCKTIME register */
- writel(0xFFFFFF, &clk_power->locktime);
-
- /* configure MPLL */
- writel((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV,
- &clk_power->mpllcon);
-
- /* some delay between MPLL and UPLL */
- pll_delay(4000);
-
- /* configure UPLL */
- writel((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV,
- &clk_power->upllcon);
-
- /* some delay between MPLL and UPLL */
- pll_delay(8000);
-
- /* set up the I/O ports */
- writel(0x007FFFFF, &gpio->gpacon);
- writel(0x00044555, &gpio->gpbcon);
- writel(0x000007FF, &gpio->gpbup);
- writel(0xAAAAAAAA, &gpio->gpccon);
- writel(0x0000FFFF, &gpio->gpcup);
- writel(0xAAAAAAAA, &gpio->gpdcon);
- writel(0x0000FFFF, &gpio->gpdup);
- writel(0xAAAAAAAA, &gpio->gpecon);
- writel(0x0000FFFF, &gpio->gpeup);
- writel(0x000055AA, &gpio->gpfcon);
- writel(0x000000FF, &gpio->gpfup);
- writel(0xFF95FFBA, &gpio->gpgcon);
- writel(0x0000FFFF, &gpio->gpgup);
- writel(0x002AFAAA, &gpio->gphcon);
- writel(0x000007FF, &gpio->gphup);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* arch number of SMDK2410-Board */
- gd->bd->bi_arch_number = MACH_TYPE_SMDK2410;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x30000100;
-
- icache_enable();
- dcache_enable();
-
- return 0;
-}
-
-int dram_init(void)
-{
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = PHYS_SDRAM_1_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_CS8900
- rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
-#endif
- return rc;
-}
-#endif
-
-/*
- * Hardcoded flash setup:
- * Flash 0 is a non-CFI AMD AM29LV800BB flash.
- */
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
- info->portwidth = FLASH_CFI_16BIT;
- info->chipwidth = FLASH_CFI_BY16;
- info->interface = FLASH_CFI_X16;
- return 1;
-}
diff --git a/configs/smdk2410_defconfig b/configs/smdk2410_defconfig
deleted file mode 100644
index d6aa2dd..0000000
--- a/configs/smdk2410_defconfig
+++ /dev/null
@@ -1,16 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_SMDK2410=y
-CONFIG_BOOTDELAY=5
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="SMDK2410 # "
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_UBI=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
deleted file mode 100644
index f76fa75..0000000
--- a/include/configs/smdk2410.h
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- * Gary Jennejohn <garyj@denx.de>
- * David Mueller <d.mueller@elsoft.ch>
- *
- * Configuation settings for the SAMSUNG SMDK2410 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */
-#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
-#define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
-
-#define CONFIG_SYS_TEXT_BASE 0x0
-
-#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
-
-/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
-#define CONFIG_SYS_CLK_FREQ 12000000
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * Hardware drivers
- */
-#define CONFIG_CS8900 /* we have a CS8900 on-board */
-#define CONFIG_CS8900_BASE 0x19000300
-#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
-
-/*
- * select serial console configuration
- */
-#define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
-
-/************************************************************
- * USB support (currently only works with D-cache off)
- ************************************************************/
-#define CONFIG_USB_OHCI
-#define CONFIG_USB_OHCI_S3C24XX
-#define CONFIG_USB_KEYBOARD
-#define CONFIG_DOS_PARTITION
-
-/************************************************************
- * RTC
- ************************************************************/
-#define CONFIG_RTC_S3C24X0
-
-#define CONFIG_BAUDRATE 115200
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_REGINFO
-
-#define CONFIG_CMDLINE_EDITING
-
-/* autoboot */
-#define CONFIG_BOOT_RETRY_TIME -1
-#define CONFIG_RESET_TO_RETRY
-
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 10.0.0.110
-#define CONFIG_SERVERIP 10.0.0.1
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_CBSIZE 256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x30800000
-
-/* support additional compression methods */
-#define CONFIG_BZIP2
-#define CONFIG_LZO
-#define CONFIG_LZMA
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_FLASH_CFI_LEGACY
-#define CONFIG_SYS_FLASH_LEGACY_512Kx16
-#define CONFIG_FLASH_SHOW_PROGRESS 45
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-#define CONFIG_SYS_MAX_FLASH_SECT (19)
-
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_SIZE 0x10000
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Size of malloc() pool
- * BZIP2 / LZO / LZMA need a lot of RAM
- */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
-#define CONFIG_SYS_MONITOR_LEN (448 * 1024)
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-/*
- * NAND configuration
- */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_S3C2410
-#define CONFIG_SYS_S3C2410_NAND_HWECC
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x4E000000
-#endif
-
-/*
- * File system
- */
-#define CONFIG_CMD_UBIFS
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_YAFFS2
-#define CONFIG_RBTREE
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
- GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_BOARD_EARLY_INIT_F
-
-#endif /* __CONFIG_H */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 4d42fc5..337407f 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -165,7 +165,6 @@ CONFIG_ARCH_RMOBILE_EXTRAM_BOOT
CONFIG_ARCH_RPC
CONFIG_ARCH_S3C2440
CONFIG_ARCH_SHARK
-CONFIG_ARCH_SMDK2410
CONFIG_ARCH_TEGRA
CONFIG_ARCH_USE_BUILTIN_BSWAP
CONFIG_ARCH_VERSATILE_PB
@@ -4119,7 +4118,6 @@ CONFIG_SMC_B3TIM_VAL
CONFIG_SMC_GCTL_VAL
CONFIG_SMC_USE_32_BIT
CONFIG_SMC_USE_IOFUNCS
-CONFIG_SMDK2410
CONFIG_SMDK5420
CONFIG_SMDKC100
CONFIG_SMDKV310
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 7/8] arm: Remove VCMA9 board
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
` (5 preceding siblings ...)
2016-10-20 19:06 ` [U-Boot] [PATCH 6/8] arm: Remove smdk2410 board Simon Glass
@ 2016-10-20 19:06 ` Simon Glass
2016-10-20 19:07 ` [U-Boot] [PATCH 8/8] serial: Drop the s3c24x0 serial driver Simon Glass
2016-10-21 6:52 ` [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Marcel Ziswiler
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:06 UTC (permalink / raw)
To: u-boot
This board has not been converted to DM_SERIAL by the deadline.
Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/Kconfig | 5 -
board/mpl/common/common_util.c | 23 --
board/mpl/vcma9/Kconfig | 15 --
board/mpl/vcma9/MAINTAINERS | 6 -
board/mpl/vcma9/Makefile | 11 -
board/mpl/vcma9/cmd_vcma9.c | 119 ----------
board/mpl/vcma9/lowlevel_init.S | 500 ----------------------------------------
board/mpl/vcma9/vcma9.c | 209 -----------------
board/mpl/vcma9/vcma9.h | 28 ---
configs/VCMA9_defconfig | 16 --
include/configs/VCMA9.h | 207 -----------------
scripts/config_whitelist.txt | 1 -
12 files changed, 1140 deletions(-)
delete mode 100644 board/mpl/vcma9/Kconfig
delete mode 100644 board/mpl/vcma9/MAINTAINERS
delete mode 100644 board/mpl/vcma9/Makefile
delete mode 100644 board/mpl/vcma9/cmd_vcma9.c
delete mode 100644 board/mpl/vcma9/lowlevel_init.S
delete mode 100644 board/mpl/vcma9/vcma9.c
delete mode 100644 board/mpl/vcma9/vcma9.h
delete mode 100644 configs/VCMA9_defconfig
delete mode 100644 include/configs/VCMA9.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6aa5208..5036379 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -137,10 +137,6 @@ config TARGET_EDB93XX
bool "Support edb93xx"
select CPU_ARM920T
-config TARGET_VCMA9
- bool "Support VCMA9"
- select CPU_ARM920T
-
config TARGET_ASPENITE
bool "Support aspenite"
select CPU_ARM926EJS
@@ -969,7 +965,6 @@ source "board/gumstix/pepper/Kconfig"
source "board/hisilicon/hikey/Kconfig"
source "board/imx31_phycore/Kconfig"
source "board/isee/igep0033/Kconfig"
-source "board/mpl/vcma9/Kconfig"
source "board/olimex/mx23_olinuxino/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/phytec/pcm052/Kconfig"
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index 3c110fa..aa40d10 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -272,29 +272,6 @@ mpl_prg(uchar *src, ulong size)
return (1);
}
#endif /* defined(CONFIG_PATI) */
-
-#elif defined(CONFIG_VCMA9)
- start = 0;
-
- /* search end sector */
- for (i = 0; i < info->sector_count; i++)
- if (size < info->start[i])
- break;
-
- flash_protect(FLAG_PROTECT_CLEAR,
- start,
- size,
- info);
-
- /* now erase flash */
- printf("Erasing at %lx (sector %d) (start %lx)\n",
- start,0,info->start[0]);
- if ((rc = flash_erase (info, 0, i)) != 0) {
- puts("ERROR ");
- flash_perror(rc);
- return (1);
- }
-
#endif
printf("flash erased, programming from 0x%lx 0x%lx Bytes\n",
(ulong)src, size);
diff --git a/board/mpl/vcma9/Kconfig b/board/mpl/vcma9/Kconfig
deleted file mode 100644
index a156452..0000000
--- a/board/mpl/vcma9/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_VCMA9
-
-config SYS_BOARD
- default "vcma9"
-
-config SYS_VENDOR
- default "mpl"
-
-config SYS_SOC
- default "s3c24x0"
-
-config SYS_CONFIG_NAME
- default "VCMA9"
-
-endif
diff --git a/board/mpl/vcma9/MAINTAINERS b/board/mpl/vcma9/MAINTAINERS
deleted file mode 100644
index 3817436..0000000
--- a/board/mpl/vcma9/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-VCMA9 BOARD
-M: David M?ller <d.mueller@elsoft.ch>
-S: Maintained
-F: board/mpl/vcma9/
-F: include/configs/VCMA9.h
-F: configs/VCMA9_defconfig
diff --git a/board/mpl/vcma9/Makefile b/board/mpl/vcma9/Makefile
deleted file mode 100644
index 175a19f..0000000
--- a/board/mpl/vcma9/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := ../common/common_util.o
-obj-y += vcma9.o cmd_vcma9.o
-
-obj-y += lowlevel_init.o
diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c
deleted file mode 100644
index c2d62e4..0000000
--- a/board/mpl/vcma9/cmd_vcma9.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * (C) Copyright 2002
- * Denis Peter, MPL AG Switzerland, d.peter at mpl.ch
- *
- * adapted for VCMA9
- * David Mueller, ELSOFT AG, d.mueller at elsoft.ch
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <net.h>
-#include "vcma9.h"
-#include "../common/common_util.h"
-
-#if defined(CONFIG_CS8900)
-#include <../drivers/net/cs8900.h>
-
-static uchar cs8900_chksum(ushort data)
-{
- return((data >> 8) & 0x00FF) + (data & 0x00FF);
-}
-
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-
-int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- struct eth_device *dev;
- char cs8900_name[10];
- if (strcmp(argv[1], "info") == 0)
- {
- vcma9_print_info();
- return 0;
- }
-#if defined(CONFIG_CS8900)
- if (strcmp(argv[1], "cs8900") == 0) {
- sprintf(cs8900_name, "%s-0", CS8900_DRIVERNAME);
- dev = eth_get_dev_by_name(cs8900_name);
- if (!dev) {
- printf("Couldn't find CS8900 driver");
- return 0;
- }
- if (strcmp(argv[2], "read") == 0) {
- uchar addr; ushort data;
-
- addr = simple_strtoul(argv[3], NULL, 16);
- cs8900_e2prom_read(dev, addr, &data);
- printf("0x%2.2X: 0x%4.4X\n", addr, data);
- } else if (strcmp(argv[2], "write") == 0) {
- uchar addr; ushort data;
-
- addr = simple_strtoul(argv[3], NULL, 16);
- data = simple_strtoul(argv[4], NULL, 16);
- cs8900_e2prom_write(dev, addr, data);
- } else if (strcmp(argv[2], "setaddr") == 0) {
- uchar addr, i, csum; ushort data;
- uchar ethaddr[6];
-
- /* check for valid ethaddr */
- if (eth_getenv_enetaddr("ethaddr", ethaddr)) {
- addr = 1;
- data = 0x2158;
- cs8900_e2prom_write(dev, addr, data);
- csum = cs8900_chksum(data);
- addr++;
- for (i = 0; i < 6; i+=2) {
- data = ethaddr[i+1] << 8 |
- ethaddr[i];
- cs8900_e2prom_write(dev, addr, data);
- csum += cs8900_chksum(data);
- addr++;
- }
- /* calculate header link byte */
- data = 0xA100 | (addr * 2);
- cs8900_e2prom_write(dev, 0, data);
- csum += cs8900_chksum(data);
- /* write checksum word */
- cs8900_e2prom_write(dev, addr, (0 - csum) << 8);
- } else {
- puts("\nplease defined 'ethaddr'\n");
- }
- } else if (strcmp(argv[2], "dump") == 0) {
- uchar addr = 0, endaddr, csum; ushort data;
-
- puts("Dump of CS8900 config device: ");
- cs8900_e2prom_read(dev, addr, &data);
- if ((data & 0xE000) == 0xA000) {
- endaddr = (data & 0x00FF) / 2;
- csum = cs8900_chksum(data);
- for (addr = 1; addr <= endaddr; addr++) {
- cs8900_e2prom_read(dev, addr, &data);
- printf("\n0x%2.2X: 0x%4.4X", addr, data);
- csum += cs8900_chksum(data);
- }
- printf("\nChecksum: %s", (csum == 0) ? "ok" : "wrong");
- } else {
- puts("no valid config found");
- }
- puts("\n");
- }
-
- return 0;
- }
-#endif
-
- return (do_mplcommon(cmdtp, flag, argc, argv));
-}
-
-U_BOOT_CMD(
- vcma9, 6, 1, do_vcma9,
- "VCMA9 specific commands",
- "flash mem [SrcAddr] - updates U-Boot with image in memory\n"
- "vcma9 info - displays board information"
-);
diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S
deleted file mode 100644
index c0d6cc8..0000000
--- a/board/mpl/vcma9/lowlevel_init.S
+++ /dev/null
@@ -1,500 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
- *
- * Modified for MPL VCMA9 by
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- * (C) Copyright 2002, 2003, 2004, 2005
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-
-#include <config.h>
-
-/* register definitions */
-
-#define PLD_BASE 0x28000000
-#define MISC_REG 0x103
-#define SDRAM_REG 0x106
-#define BWSCON 0x48000000
-#define CLKBASE 0x4C000000
-#define LOCKTIME 0x0
-#define MPLLCON 0x4
-#define UPLLCON 0x8
-#define GPIOBASE 0x56000000
-#define GSTATUS1 0xB0
-#define FASTCPU 0x02
-
-/* some parameters for the board */
-/* BWSCON */
-#define DW8 (0x0)
-#define DW16 (0x1)
-#define DW32 (0x2)
-#define WAIT (0x1<<2)
-#define UBLB (0x1<<3)
-
-/* BANKSIZE */
-#define BURST_EN (0x1<<7)
-
-/* BANK0CON 200 */
-#define B0_Tacs_200 0x0 /* 0clk (or 0x1 1clk) */
-#define B0_Tcos_200 0x1 /* 1clk (or 0x2 2clk) */
-#define B0_Tacc_200 0x5 /* 8clk (or 0x6 10clk) */
-#define B0_Tcoh_200 0x0 /* 0clk */
-#define B0_Tcah_200 0x3 /* 4clk (or0x01 1clk) */
-#define B0_Tacp_200 0x0 /* page mode is not used */
-#define B0_PMC_200 0x0 /* page mode disabled */
-
-/* BANK0CON 250 */
-#define B0_Tacs_250 0x0 /* 0clk (or 0x1 1clk) */
-#define B0_Tcos_250 0x1 /* 1clk (or 0x2 2clk) */
-#define B0_Tacc_250 0x5 /* 8clk (or 0x7 14clk) */
-#define B0_Tcoh_250 0x0 /* 0clk */
-#define B0_Tcah_250 0x3 /* 4clk (or 0x1 1clk) */
-#define B0_Tacp_250 0x0 /* page mode is not used */
-#define B0_PMC_250 0x0 /* page mode disabled */
-
-/* BANK0CON 266 */
-#define B0_Tacs_266 0x0 /* 0clk (or 0x1 1clk) */
-#define B0_Tcos_266 0x1 /* 1clk (or 0x2 2clk) */
-#define B0_Tacc_266 0x6 /* 10clk (or 0x7 14clk) */
-#define B0_Tcoh_266 0x0 /* 0clk */
-#define B0_Tcah_266 0x3 /* 4clk (or 0x1 1clk) */
-#define B0_Tacp_266 0x0 /* page mode is not used */
-#define B0_PMC_266 0x0 /* page mode disabled */
-
-/* BANK1CON 200 */
-#define B1_Tacs_200 0x0 /* 0clk (or 0x1 1clk) */
-#define B1_Tcos_200 0x1 /* 1clk (or 0x2 2clk) */
-#define B1_Tacc_200 0x5 /* 8clk (or 0x6 10clk) */
-#define B1_Tcoh_200 0x0 /* 0clk */
-#define B1_Tcah_200 0x3 /* 4clk (or 0x1 1clk) */
-#define B1_Tacp_200 0x0 /* page mode is not used */
-#define B1_PMC_200 0x0 /* page mode disabled */
-
-/* BANK1CON 250 */
-#define B1_Tacs_250 0x0 /* 0clk (or 0x1 1clk) */
-#define B1_Tcos_250 0x1 /* 1clk (or 0x2 2clk) */
-#define B1_Tacc_250 0x5 /* 8clk (or 0x7 14clk) */
-#define B1_Tcoh_250 0x0 /* 0clk */
-#define B1_Tcah_250 0x3 /* 4clk (or 0x1 1clk) */
-#define B1_Tacp_250 0x0 /* page mode is not used */
-#define B1_PMC_250 0x0 /* page mode disabled */
-
-/* BANK1CON 266 */
-#define B1_Tacs_266 0x0 /* 0clk (or 0x1 1clk) */
-#define B1_Tcos_266 0x1 /* 1clk (or 0x2 2clk) */
-#define B1_Tacc_266 0x6 /* 10clk (or 0x7 14clk) */
-#define B1_Tcoh_266 0x0 /* 0clk */
-#define B1_Tcah_266 0x3 /* 4clk (or 0x1 1clk) */
-#define B1_Tacp_266 0x0 /* page mode is not used */
-#define B1_PMC_266 0x0 /* page mode disabled */
-
-/* BANK2CON 200 + 250 + 266 */
-#define B2_Tacs 0x3 /* 4clk */
-#define B2_Tcos 0x3 /* 4clk */
-#define B2_Tacc 0x7 /* 14clk */
-#define B2_Tcoh 0x3 /* 4clk */
-#define B2_Tcah 0x3 /* 4clk */
-#define B2_Tacp 0x0 /* page mode is not used */
-#define B2_PMC 0x0 /* page mode disabled */
-
-/* BANK3CON 200 + 250 + 266 */
-#define B3_Tacs 0x3 /* 4clk */
-#define B3_Tcos 0x3 /* 4clk */
-#define B3_Tacc 0x7 /* 14clk */
-#define B3_Tcoh 0x3 /* 4clk */
-#define B3_Tcah 0x3 /* 4clk */
-#define B3_Tacp 0x0 /* page mode is not used */
-#define B3_PMC 0x0 /* page mode disabled */
-
-/* BANK4CON 200 */
-#define B4_Tacs_200 0x1 /* 1clk */
-#define B4_Tcos_200 0x3 /* 4clk */
-#define B4_Tacc_200 0x7 /* 14clk */
-#define B4_Tcoh_200 0x3 /* 4clk */
-#define B4_Tcah_200 0x2 /* 2clk */
-#define B4_Tacp_200 0x0 /* page mode is not used */
-#define B4_PMC_200 0x0 /* page mode disabled */
-
-/* BANK4CON 250 */
-#define B4_Tacs_250 0x1 /* 1clk */
-#define B4_Tcos_250 0x3 /* 4clk */
-#define B4_Tacc_250 0x7 /* 14clk */
-#define B4_Tcoh_250 0x3 /* 4clk */
-#define B4_Tcah_250 0x2 /* 2clk */
-#define B4_Tacp_250 0x0 /* page mode is not used */
-#define B4_PMC_250 0x0 /* page mode disabled */
-
-/* BANK4CON 266 */
-#define B4_Tacs_266 0x1 /* 1clk */
-#define B4_Tcos_266 0x3 /* 4clk */
-#define B4_Tacc_266 0x7 /* 14clk */
-#define B4_Tcoh_266 0x3 /* 4clk */
-#define B4_Tcah_266 0x2 /* 2clk */
-#define B4_Tacp_266 0x0 /* page mode is not used */
-#define B4_PMC_266 0x0 /* page mode disabled */
-
-/* BANK5CON 200 */
-#define B5_Tacs_200 0x0 /* 0clk */
-#define B5_Tcos_200 0x3 /* 4clk */
-#define B5_Tacc_200 0x4 /* 6clk */
-#define B5_Tcoh_200 0x3 /* 4clk */
-#define B5_Tcah_200 0x1 /* 1clk */
-#define B5_Tacp_200 0x0 /* page mode is not used */
-#define B5_PMC_200 0x0 /* page mode disabled */
-
-/* BANK5CON 250 */
-#define B5_Tacs_250 0x0 /* 0clk */
-#define B5_Tcos_250 0x3 /* 4clk */
-#define B5_Tacc_250 0x5 /* 8clk */
-#define B5_Tcoh_250 0x3 /* 4clk */
-#define B5_Tcah_250 0x1 /* 1clk */
-#define B5_Tacp_250 0x0 /* page mode is not used */
-#define B5_PMC_250 0x0 /* page mode disabled */
-
-/* BANK5CON 266 */
-#define B5_Tacs_266 0x0 /* 0clk */
-#define B5_Tcos_266 0x3 /* 4clk */
-#define B5_Tacc_266 0x5 /* 8clk */
-#define B5_Tcoh_266 0x3 /* 4clk */
-#define B5_Tcah_266 0x1 /* 1clk */
-#define B5_Tacp_266 0x0 /* page mode is not used */
-#define B5_PMC_266 0x0 /* page mode disabled */
-
-#define B6_MT 0x3 /* SDRAM */
-#define B6_Trcd_200 0x0 /* 2clk */
-#define B6_Trcd_250 0x1 /* 3clk */
-#define B6_Trcd_266 0x1 /* 3clk */
-#define B6_SCAN 0x2 /* 10bit */
-
-#define B7_MT 0x3 /* SDRAM */
-#define B7_Trcd_200 0x0 /* 2clk */
-#define B7_Trcd_250 0x1 /* 3clk */
-#define B7_Trcd_266 0x1 /* 3clk */
-#define B7_SCAN 0x2 /* 10bit */
-
-/* REFRESH parameter */
-#define REFEN 0x1 /* Refresh enable */
-#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
-#define Trp_200 0x0 /* 2clk */
-#define Trp_250 0x1 /* 3clk */
-#define Trp_266 0x1 /* 3clk */
-#define Tsrc_200 0x1 /* 5clk */
-#define Tsrc_250 0x2 /* 6clk */
-#define Tsrc_266 0x3 /* 7clk */
-
-/* period=15.6us, HCLK=100Mhz, (2048+1-15.6*100) */
-#define REFCNT_200 489
-/* period=15.6us, HCLK=125Mhz, (2048+1-15.6*125) */
-#define REFCNT_250 99
-/* period=15.6us, HCLK=133Mhz, (2048+1-15.6*133) */
-#define REFCNT_266 0
-/**************************************/
-
-.globl lowlevel_init
-lowlevel_init:
- /* use r0 to relocate DATA read/write to flash rather than memory ! */
- ldr r0, =CONFIG_SYS_TEXT_BASE
- ldr r13, =BWSCON
-
- /* enable minimal access to PLD */
- ldr r1, [r13] /* load default BWSCON */
- orr r1, r1, #(DW8 + UBLB) << 20 /* set necessary CS attrs */
- str r1, [r13] /* set BWSCON */
- ldr r1, =0x7FF0 /* select slowest timing */
- str r1, [r13, #0x18] /* set BANKCON5 */
-
- ldr r1, =PLD_BASE
- ldr r2, =SETUPDATA
- ldrb r1, [r1, #MISC_REG]
- sub r2, r2, r0
- tst r1, #FASTCPU /* FASTCPU available ? */
- addeq r2, r2, #SETUPENTRY_SIZE
-
- /* memory control configuration */
- /* r2 = pointer into timing table */
- /* r13 = pointer to MEM controller regs (starting with BWSCON) */
- add r3, r2, #CSDATA_OFFSET
- add r4, r3, #CSDATAENTRY_SIZE
-0:
- ldr r1, [r3], #4
- str r1, [r13], #4
- cmp r3, r4
- bne 0b
-
- /* PLD access is now possible */
- /* r3 = SDRAMDATA */
- /* r13 = pointer to MEM controller regs */
- ldr r1, =PLD_BASE
- mov r4, #SDRAMENTRY_SIZE
- ldrb r1, [r1, #SDRAM_REG]
- /* calculate start and end point */
- mla r3, r4, r1, r3
- add r4, r3, r4
-0:
- ldr r1, [r3], #4
- str r1, [r13], #4
- cmp r3, r4
- bne 0b
-
- /* setup MPLL registers */
- ldr r1, =CLKBASE
- ldr r4, =0xFFFFFF
- add r3, r2, #4 /* r3 points to PLL values */
- str r4, [r1, #LOCKTIME]
- ldmia r3, {r4,r5}
- str r5, [r1, #UPLLCON] /* writing PLL register */
- /* !! order seems to be important !! */
- /* a little delay */
- ldr r3, =0x4000
-0:
- subs r3, r3, #1
- bne 0b
-
- str r4, [r1, #MPLLCON] /* writing PLL register */
- /* !! order seems to be important !! */
- /* a little delay */
- ldr r3, =0x4000
-0:
- subs r3, r3, #1
- bne 0b
-
- /* everything is fine now */
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-#define MK_BWSCON(bws1, bws2, bws3, bws4, bws5, bws6, bws7) \
- ((bws1) << 4) + \
- ((bws2) << 8) + \
- ((bws3) << 12) + \
- ((bws4) << 16) + \
- ((bws5) << 20) + \
- ((bws6) << 24) + \
- ((bws7) << 28)
-
-#define MK_BANKCON(tacs, tcos, tacc, tcoh, tcah, tacp, pmc) \
- ((tacs) << 13) + \
- ((tcos) << 11) + \
- ((tacc) << 8) + \
- ((tcoh) << 6) + \
- ((tcah) << 4) + \
- ((tacp) << 2) + \
- (pmc)
-
-#define MK_BANKCON_SDRAM(trcd, scan) \
- ((0x03) << 15) + \
- ((trcd) << 2) + \
- (scan)
-
-#define MK_SDRAM_REFRESH(enable, trefmd, trp, tsrc, cnt) \
- ((enable) << 23) + \
- ((trefmd) << 22) + \
- ((trp) << 20) + \
- ((tsrc) << 18) + \
- (cnt)
-
-SETUPDATA:
- .word 0x32410002
- /* PLL values (MDIV, PDIV, SDIV) for 250 MHz */
- .word (0x75 << 12) + (0x01 << 4) + (0x01 << 0)
- /* PLL values for USB clock */
- .word (0x48 << 12) + (0x03 << 4) + (0x02 << 0)
-
- /* timing for 250 MHz*/
-0:
- .equiv CSDATA_OFFSET, (. - SETUPDATA)
- .word MK_BWSCON(DW16, \
- DW32, \
- DW32, \
- DW16 + WAIT + UBLB, \
- DW8 + UBLB, \
- DW32, \
- DW32)
-
- .word MK_BANKCON(B0_Tacs_250, \
- B0_Tcos_250, \
- B0_Tacc_250, \
- B0_Tcoh_250, \
- B0_Tcah_250, \
- B0_Tacp_250, \
- B0_PMC_250)
-
- .word MK_BANKCON(B1_Tacs_250, \
- B1_Tcos_250, \
- B1_Tacc_250, \
- B1_Tcoh_250, \
- B1_Tcah_250, \
- B1_Tacp_250, \
- B1_PMC_250)
-
- .word MK_BANKCON(B2_Tacs, \
- B2_Tcos, \
- B2_Tacc, \
- B2_Tcoh, \
- B2_Tcah, \
- B2_Tacp, \
- B2_PMC)
-
- .word MK_BANKCON(B3_Tacs, \
- B3_Tcos, \
- B3_Tacc, \
- B3_Tcoh, \
- B3_Tcah, \
- B3_Tacp, \
- B3_PMC)
-
- .word MK_BANKCON(B4_Tacs_250, \
- B4_Tcos_250, \
- B4_Tacc_250, \
- B4_Tcoh_250, \
- B4_Tcah_250, \
- B4_Tacp_250, \
- B4_PMC_250)
-
- .word MK_BANKCON(B5_Tacs_250, \
- B5_Tcos_250, \
- B5_Tacc_250, \
- B5_Tcoh_250, \
- B5_Tcah_250, \
- B5_Tacp_250, \
- B5_PMC_250)
-
- .equiv CSDATAENTRY_SIZE, (. - 0b)
- /* 4Mx8x4 */
-0:
- .word MK_BANKCON_SDRAM(B6_Trcd_250, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_250, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_250, Tsrc_250, REFCNT_250)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
- .equiv SDRAMENTRY_SIZE, (. - 0b)
-
- /* 8Mx8x4 */
- .word MK_BANKCON_SDRAM(B6_Trcd_250, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_250, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_250, Tsrc_250, REFCNT_250)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
- /* 2Mx8x4 */
- .word MK_BANKCON_SDRAM(B6_Trcd_250, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_250, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_250, Tsrc_250, REFCNT_250)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
- /* 4Mx8x2 */
- .word MK_BANKCON_SDRAM(B6_Trcd_250, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_250, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_250, Tsrc_250, REFCNT_250)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
- .equiv SETUPENTRY_SIZE, (. - SETUPDATA)
-
- .word 0x32410000
- /* PLL values (MDIV, PDIV, SDIV) for 200 MHz (Fout = 202.8MHz) */
- .word (0xA1 << 12) + (0x03 << 4) + (0x01 << 0)
- /* PLL values for USB clock */
- .word (0x48 << 12) + (0x03 << 4) + (0x02 << 0)
-
- /* timing for 200 MHz and default*/
- .word MK_BWSCON(DW16, \
- DW32, \
- DW32, \
- DW16 + WAIT + UBLB, \
- DW8 + UBLB, \
- DW32, \
- DW32)
-
- .word MK_BANKCON(B0_Tacs_200, \
- B0_Tcos_200, \
- B0_Tacc_200, \
- B0_Tcoh_200, \
- B0_Tcah_200, \
- B0_Tacp_200, \
- B0_PMC_200)
-
- .word MK_BANKCON(B1_Tacs_200, \
- B1_Tcos_200, \
- B1_Tacc_200, \
- B1_Tcoh_200, \
- B1_Tcah_200, \
- B1_Tacp_200, \
- B1_PMC_200)
-
- .word MK_BANKCON(B2_Tacs, \
- B2_Tcos, \
- B2_Tacc, \
- B2_Tcoh, \
- B2_Tcah, \
- B2_Tacp, \
- B2_PMC)
-
- .word MK_BANKCON(B3_Tacs, \
- B3_Tcos, \
- B3_Tacc, \
- B3_Tcoh, \
- B3_Tcah, \
- B3_Tacp, \
- B3_PMC)
-
- .word MK_BANKCON(B4_Tacs_200, \
- B4_Tcos_200, \
- B4_Tacc_200, \
- B4_Tcoh_200, \
- B4_Tcah_200, \
- B4_Tacp_200, \
- B4_PMC_200)
-
- .word MK_BANKCON(B5_Tacs_200, \
- B5_Tcos_200, \
- B5_Tacc_200, \
- B5_Tcoh_200, \
- B5_Tcah_200, \
- B5_Tacp_200, \
- B5_PMC_200)
-
- /* 4Mx8x4 */
- .word MK_BANKCON_SDRAM(B6_Trcd_200, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_200, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_200, Tsrc_200, REFCNT_200)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
- /* 8Mx8x4 */
- .word MK_BANKCON_SDRAM(B6_Trcd_200, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_200, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_200, Tsrc_200, REFCNT_200)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
- /* 2Mx8x4 */
- .word MK_BANKCON_SDRAM(B6_Trcd_200, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_200, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_200, Tsrc_200, REFCNT_200)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
- /* 4Mx8x2 */
- .word MK_BANKCON_SDRAM(B6_Trcd_200, B6_SCAN)
- .word MK_BANKCON_SDRAM(B7_Trcd_200, B7_SCAN)
- .word MK_SDRAM_REFRESH(REFEN, TREFMD, Trp_200, Tsrc_200, REFCNT_200)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
- .equiv SETUPDATA_SIZE, (. - SETUPDATA)
diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c
deleted file mode 100644
index 43a3d47..0000000
--- a/board/mpl/vcma9/vcma9.c
+++ /dev/null
@@ -1,209 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002, 2010
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <i2c.h>
-#include <asm/io.h>
-#include <asm/arch/s3c24x0_cpu.h>
-
-#include "vcma9.h"
-#include "../common/common_util.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_early_init_f(void)
-{
- struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
-
- /* set up the I/O ports */
- writel(0x007FFFFF, &gpio->gpacon);
- writel(0x002AAAAA, &gpio->gpbcon);
- writel(0x000002BF, &gpio->gpbup);
- writel(0xAAAAAAAA, &gpio->gpccon);
- writel(0x0000FFFF, &gpio->gpcup);
- writel(0xAAAAAAAA, &gpio->gpdcon);
- writel(0x0000FFFF, &gpio->gpdup);
- writel(0xAAAAAAAA, &gpio->gpecon);
- writel(0x000037F7, &gpio->gpeup);
- writel(0x00000000, &gpio->gpfcon);
- writel(0x00000000, &gpio->gpfup);
- writel(0xFFEAFF5A, &gpio->gpgcon);
- writel(0x0000F0DC, &gpio->gpgup);
- writel(0x0028AAAA, &gpio->gphcon);
- writel(0x00000656, &gpio->gphup);
-
- /* setup correct IRQ modes for NIC (rising edge mode) */
- writel((readl(&gpio->extint2) & ~(7<<8)) | (4<<8), &gpio->extint2);
-
- /* select USB port 2 to be host or device (setup as host for now) */
- writel(readl(&gpio->misccr) | 0x08, &gpio->misccr);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x30000100;
-
- icache_enable();
- dcache_enable();
-
- return 0;
-}
-
-/*
- * Get some Board/PLD Info
- */
-
-static u8 get_pld_reg(enum vcma9_pld_regs reg)
-{
- return readb(VCMA9_PLD_BASE + reg);
-}
-
-static u8 get_pld_version(void)
-{
- return (get_pld_reg(VCMA9_PLD_ID) >> 4) & 0x0F;
-}
-
-static u8 get_pld_revision(void)
-{
- return get_pld_reg(VCMA9_PLD_ID) & 0x0F;
-}
-
-static uchar get_board_pcb(void)
-{
- return ((get_pld_reg(VCMA9_PLD_BOARD) >> 4) & 0x03) + 'A';
-}
-
-static u8 get_nr_chips(void)
-{
- switch ((get_pld_reg(VCMA9_PLD_SDRAM) >> 4) & 0x0F) {
- case 0: return 4;
- case 1: return 1;
- case 2: return 2;
- default: return 0;
- }
-}
-
-static ulong get_chip_size(void)
-{
- switch (get_pld_reg(VCMA9_PLD_SDRAM) & 0x0F) {
- case 0: return 16 * (1024*1024);
- case 1: return 32 * (1024*1024);
- case 2: return 8 * (1024*1024);
- case 3: return 8 * (1024*1024);
- default: return 0;
- }
-}
-
-static const char *get_chip_geom(void)
-{
- switch (get_pld_reg(VCMA9_PLD_SDRAM) & 0x0F) {
- case 0: return "4Mx8x4";
- case 1: return "8Mx8x4";
- case 2: return "2Mx8x4";
- case 3: return "4Mx8x2";
- default: return "unknown";
- }
-}
-
-static void vcma9_show_info(char *board_name, char *serial)
-{
- printf("Board: %s SN: %s PCB Rev: %c PLD(%d,%d)\n",
- board_name, serial,
- get_board_pcb(), get_pld_version(), get_pld_revision());
- printf("SDRAM: %d chips %s\n", get_nr_chips(), get_chip_geom());
-}
-
-int dram_init(void)
-{
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_chip_size() * get_nr_chips();
- return 0;
-}
-
-/*
- * Check Board Identity:
- */
-
-int checkboard(void)
-{
- char s[50];
- int i;
- backup_t *b = (backup_t *) s;
-
- i = getenv_f("serial#", s, 32);
- if ((i < 0) || strncmp (s, "VCMA9", 5)) {
- get_backup_values (b);
- if (strncmp (b->signature, "MPL\0", 4) != 0) {
- puts ("### No HW ID - assuming VCMA9");
- } else {
- b->serial_name[5] = 0;
- vcma9_show_info(b->serial_name, &b->serial_name[6]);
- }
- } else {
- s[5] = 0;
- vcma9_show_info(s, &s[6]);
- }
-
- return 0;
-}
-
-int board_late_init(void)
-{
- /*
- * check if environment is healthy, otherwise restore values
- * from shadow copy
- */
- check_env();
- return 0;
-}
-
-void vcma9_print_info(void)
-{
- char *s = getenv("serial#");
-
- if (!s) {
- puts ("### No HW ID - assuming VCMA9");
- } else {
- s[5] = 0;
- vcma9_show_info(s, &s[6]);
- }
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_CS8900
- rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
-#endif
- return rc;
-}
-#endif
-
-/*
- * Hardcoded flash setup:
- * Flash 0 is a non-CFI AMD AM29F400BB flash.
- */
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
- info->portwidth = FLASH_CFI_16BIT;
- info->chipwidth = FLASH_CFI_BY16;
- info->interface = FLASH_CFI_X16;
- return 1;
-}
diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h
deleted file mode 100644
index c585c8e..0000000
--- a/board/mpl/vcma9/vcma9.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * (C) Copyright 2002, 2003
- * David Mueller, ELSOFT AG, d.mueller at elsoft.ch
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
- /****************************************************************************
- * Global routines used for VCMA9
- *****************************************************************************/
-
-#include <asm/arch/s3c24x0_cpu.h>
-
-extern void vcma9_print_info(void);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag,
- int argc, char *const argv[]);
-
-/* VCMA9 PLD registers */
-enum vcma9_pld_regs {
- VCMA9_PLD_ID,
- VCMA9_PLD_NIC,
- VCMA9_PLD_CAN,
- VCMA9_PLD_MISC,
- VCMA9_PLD_GPCD,
- VCMA9_PLD_BOARD,
- VCMA9_PLD_SDRAM
-};
-
-#define VCMA9_PLD_BASE (0x2C000100)
diff --git a/configs/VCMA9_defconfig b/configs/VCMA9_defconfig
deleted file mode 100644
index da568a1..0000000
--- a/configs/VCMA9_defconfig
+++ /dev/null
@@ -1,16 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_VCMA9=y
-CONFIG_IDENT_STRING="\n(c) 2003 - 2011 by MPL AG Switzerland, MEV-10080-001 unstable"
-CONFIG_BOOTDELAY=5
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="VCMA9 # "
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_UBI=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
deleted file mode 100644
index e012417..0000000
--- a/include/configs/VCMA9.h
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * (C) Copyright 2002, 2003
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- * Gary Jennejohn <garyj@denx.de>
- * David Mueller <d.mueller@elsoft.ch>
- *
- * Configuation settings for the MPL VCMA9 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define MACH_TYPE_MPL_VCMA9 227
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_SYS_THUMB_BUILD
-
-#define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */
-#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
-#define CONFIG_VCMA9 /* on a MPL VCMA9 Board */
-#define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */
-
-#define CONFIG_SYS_TEXT_BASE 0x0
-
-#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
-
-/* input clock of PLL (VCMA9 has 12MHz input clock) */
-#define CONFIG_SYS_CLK_FREQ 12000000
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_NAND
-
-#define CONFIG_BOARD_LATE_INIT
-
-#define CONFIG_CMDLINE_EDITING
-
-/*
- * I2C stuff:
- * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
- * address 0x50 with 16bit addressing
- */
-#define CONFIG_SYS_I2C
-
-/* we use the built-in I2C controller */
-#define CONFIG_SYS_I2C_S3C24X0
-#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */
-#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-/* use EEPROM for environment vars */
-#define CONFIG_ENV_IS_IN_EEPROM 1
-/* environment starts at offset 0 */
-#define CONFIG_ENV_OFFSET 0x000
-/* 2KB should be more than enough */
-#define CONFIG_ENV_SIZE 0x800
-
-#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
-/* 64 bytes page write mode on 24C256 */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-
-/*
- * Hardware drivers
- */
-#define CONFIG_CS8900 /* we have a CS8900 on-board */
-#define CONFIG_CS8900_BASE 0x20000300
-#define CONFIG_CS8900_BUS16
-
-/*
- * select serial console configuration
- */
-#define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
-
-/* USB support (currently only works with D-cache off) */
-#define CONFIG_USB_OHCI
-#define CONFIG_USB_OHCI_S3C24XX
-#define CONFIG_USB_KEYBOARD
-#define CONFIG_DOS_PARTITION
-
-/* Enable needed helper functions */
-#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
-
-/* RTC */
-#define CONFIG_RTC_S3C24X0
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE 9600
-
-#define CONFIG_BOOT_RETRY_TIME -1
-#define CONFIG_RESET_TO_RETRY
-
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 10.0.0.110
-#define CONFIG_SERVERIP 10.0.0.1
-
-#if defined(CONFIG_CMD_KGDB)
-/* speed to run kgdb serial port */
-#define CONFIG_KGDB_BAUDRATE 115200
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_CBSIZE 256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */
-
-#define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_SYS_LOAD_ADDR 0x30800000
-
-/* we configure PWM Timer 4 to 1ms 1000Hz */
-
-/* support additional compression methods */
-#define CONFIG_BZIP2
-#define CONFIG_LZO
-#define CONFIG_LZMA
-
-/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-/* FLASH and environment organization */
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_FLASH_CFI_LEGACY
-#define CONFIG_SYS_FLASH_LEGACY_512Kx16
-#define CONFIG_FLASH_SHOW_PROGRESS 45
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-#define CONFIG_SYS_MAX_FLASH_SECT (19)
-
-/*
- * Size of malloc() pool
- * BZIP2 / LZO / LZMA need a lot of RAM
- */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-/* NAND configuration */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_S3C2410
-#define CONFIG_SYS_S3C2410_NAND_HWECC
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x4E000000
-#define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
-#define CONFIG_S3C24XX_TACLS 1
-#define CONFIG_S3C24XX_TWRPH0 5
-#define CONFIG_S3C24XX_TWRPH1 3
-#endif
-
-#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
-
-/* File system */
-#define CONFIG_CMD_UBIFS
-#define CONFIG_CMD_JFFS2
-#define CONFIG_YAFFS2
-#define CONFIG_RBTREE
-#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_LZO
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
- GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_BOARD_EARLY_INIT_F
-
-#endif /* __CONFIG_H */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 337407f..b637599 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -8253,7 +8253,6 @@ CONFIG_U_QE
CONFIG_V38B
CONFIG_VAL
CONFIG_VAR_SIZE_SPL
-CONFIG_VCMA9
CONFIG_VCO_HZ
CONFIG_VCO_MULT
CONFIG_VCT_NOR
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 8/8] serial: Drop the s3c24x0 serial driver
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
` (6 preceding siblings ...)
2016-10-20 19:06 ` [U-Boot] [PATCH 7/8] arm: Remove VCMA9 board Simon Glass
@ 2016-10-20 19:07 ` Simon Glass
2016-10-21 6:52 ` [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Marcel Ziswiler
8 siblings, 0 replies; 15+ messages in thread
From: Simon Glass @ 2016-10-20 19:07 UTC (permalink / raw)
To: u-boot
This is not used by any boards. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
doc/driver-model/serial-howto.txt | 1 -
drivers/serial/Makefile | 1 -
drivers/serial/serial_s3c24x0.c | 208 --------------------------------------
scripts/config_whitelist.txt | 1 -
4 files changed, 211 deletions(-)
delete mode 100644 drivers/serial/serial_s3c24x0.c
diff --git a/doc/driver-model/serial-howto.txt b/doc/driver-model/serial-howto.txt
index a655464..67d0983 100644
--- a/doc/driver-model/serial-howto.txt
+++ b/doc/driver-model/serial-howto.txt
@@ -5,7 +5,6 @@ Almost all of the serial drivers have been converted as at January 2016. These
ones remain:
serial_bfin.c
- serial_s3c24x0.c
The deadline for this work was the end of January 2016. If no one steps
forward to convert these, at some point there may come a patch to remove them!
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 0c75718..9e7207a 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -30,7 +30,6 @@ obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
endif
-obj-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
obj-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
deleted file mode 100644
index 0f0878a..0000000
--- a/drivers/serial/serial_s3c24x0.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/compiler.h>
-#include <asm/arch/s3c24x0_cpu.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_SERIAL1
-#define UART_NR S3C24X0_UART0
-
-#elif defined(CONFIG_SERIAL2)
-#define UART_NR S3C24X0_UART1
-
-#elif defined(CONFIG_SERIAL3)
-#define UART_NR S3C24X0_UART2
-
-#else
-#error "Bad: you didn't configure serial ..."
-#endif
-
-#include <asm/io.h>
-#include <serial.h>
-
-/* Multi serial device functions */
-#define DECLARE_S3C_SERIAL_FUNCTIONS(port) \
- int s3serial##port##_init(void) \
- { \
- return serial_init_dev(port); \
- } \
- void s3serial##port##_setbrg(void) \
- { \
- serial_setbrg_dev(port); \
- } \
- int s3serial##port##_getc(void) \
- { \
- return serial_getc_dev(port); \
- } \
- int s3serial##port##_tstc(void) \
- { \
- return serial_tstc_dev(port); \
- } \
- void s3serial##port##_putc(const char c) \
- { \
- serial_putc_dev(port, c); \
- } \
- void s3serial##port##_puts(const char *s) \
- { \
- serial_puts_dev(port, s); \
- }
-
-#define INIT_S3C_SERIAL_STRUCTURE(port, __name) { \
- .name = __name, \
- .start = s3serial##port##_init, \
- .stop = NULL, \
- .setbrg = s3serial##port##_setbrg, \
- .getc = s3serial##port##_getc, \
- .tstc = s3serial##port##_tstc, \
- .putc = s3serial##port##_putc, \
- .puts = s3serial##port##_puts, \
-}
-
-static void _serial_setbrg(const int dev_index)
-{
- struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
- unsigned int reg = 0;
- int i;
-
- /* value is calculated so : (int)(PCLK/16./baudrate) -1 */
- reg = get_PCLK() / (16 * gd->baudrate) - 1;
-
- writel(reg, &uart->ubrdiv);
- for (i = 0; i < 100; i++)
- /* Delay */ ;
-}
-
-static inline void serial_setbrg_dev(unsigned int dev_index)
-{
- _serial_setbrg(dev_index);
-}
-
-/* Initialise the serial port. The settings are always 8 data bits, no parity,
- * 1 stop bit, no start bits.
- */
-static int serial_init_dev(const int dev_index)
-{
- struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-
- /* FIFO enable, Tx/Rx FIFO clear */
- writel(0x07, &uart->ufcon);
- writel(0x0, &uart->umcon);
-
- /* Normal,No parity,1 stop,8 bit */
- writel(0x3, &uart->ulcon);
- /*
- * tx=level,rx=edge,disable timeout int.,enable rx error int.,
- * normal,interrupt or polling
- */
- writel(0x245, &uart->ucon);
-
- _serial_setbrg(dev_index);
-
- return (0);
-}
-
-/*
- * Read a single byte from the serial port. Returns 1 on success, 0
- * otherwise. When the function is succesfull, the character read is
- * written into its argument c.
- */
-static int _serial_getc(const int dev_index)
-{
- struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-
- while (!(readl(&uart->utrstat) & 0x1))
- /* wait for character to arrive */ ;
-
- return readb(&uart->urxh) & 0xff;
-}
-
-static inline int serial_getc_dev(unsigned int dev_index)
-{
- return _serial_getc(dev_index);
-}
-
-/*
- * Output a single byte to the serial port.
- */
-static void _serial_putc(const char c, const int dev_index)
-{
- struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-
- /* If \n, also do \r */
- if (c == '\n')
- serial_putc('\r');
-
- while (!(readl(&uart->utrstat) & 0x2))
- /* wait for room in the tx FIFO */ ;
-
- writeb(c, &uart->utxh);
-}
-
-static inline void serial_putc_dev(unsigned int dev_index, const char c)
-{
- _serial_putc(c, dev_index);
-}
-
-/*
- * Test whether a character is in the RX buffer
- */
-static int _serial_tstc(const int dev_index)
-{
- struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-
- return readl(&uart->utrstat) & 0x1;
-}
-
-static inline int serial_tstc_dev(unsigned int dev_index)
-{
- return _serial_tstc(dev_index);
-}
-
-static void _serial_puts(const char *s, const int dev_index)
-{
- while (*s) {
- _serial_putc(*s++, dev_index);
- }
-}
-
-static inline void serial_puts_dev(int dev_index, const char *s)
-{
- _serial_puts(s, dev_index);
-}
-
-DECLARE_S3C_SERIAL_FUNCTIONS(0);
-struct serial_device s3c24xx_serial0_device =
-INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0");
-DECLARE_S3C_SERIAL_FUNCTIONS(1);
-struct serial_device s3c24xx_serial1_device =
-INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1");
-DECLARE_S3C_SERIAL_FUNCTIONS(2);
-struct serial_device s3c24xx_serial2_device =
-INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2");
-
-__weak struct serial_device *default_serial_console(void)
-{
-#if defined(CONFIG_SERIAL1)
- return &s3c24xx_serial0_device;
-#elif defined(CONFIG_SERIAL2)
- return &s3c24xx_serial1_device;
-#elif defined(CONFIG_SERIAL3)
- return &s3c24xx_serial2_device;
-#else
-#error "CONFIG_SERIAL? missing."
-#endif
-}
-
-void s3c24xx_serial_initialize(void)
-{
- serial_register(&s3c24xx_serial0_device);
- serial_register(&s3c24xx_serial1_device);
- serial_register(&s3c24xx_serial2_device);
-}
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b637599..5719ede 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3890,7 +3890,6 @@ CONFIG_S3C2410_NAND_BBT
CONFIG_S3C2410_NAND_HWECC
CONFIG_S3C2440
CONFIG_S3C24X0
-CONFIG_S3C24X0_SERIAL
CONFIG_S3C24XX_CUSTOM_NAND_TIMING
CONFIG_S3C24XX_TACLS
CONFIG_S3C24XX_TWRPH0
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 0/8] dm: Update on serial driver progress
2016-10-20 19:06 [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Simon Glass
` (7 preceding siblings ...)
2016-10-20 19:07 ` [U-Boot] [PATCH 8/8] serial: Drop the s3c24x0 serial driver Simon Glass
@ 2016-10-21 6:52 ` Marcel Ziswiler
2016-10-21 8:10 ` Marek Vasut
8 siblings, 1 reply; 15+ messages in thread
From: Marcel Ziswiler @ 2016-10-21 6:52 UTC (permalink / raw)
To: u-boot
Hi Simon
On Thu, 2016-10-20 at 13:06 -0600, Simon Glass wrote:
> Only three serial drivers remain to be converted. This series drops
> two of those, since the boards appear to be unmaintained.
>
> With this, only blackfin remains.
>
> The blackfin driver probably needs to be converted as there is recent
> activity with these boards. I am copying the maintainer so that this
> work can be completed.
Could you please hold off with dropping the PXA serial driver and
accompanying PXA270 support. I will have a look at it ASAP. We do
actually continue to sell the Colibri PXA270 (as we are the Colibri
PXA320) and I have been maintaining it lately with sending patches as
recently as last week! It would be rather sad to see it drop like the
PXA3xx support did a couple years back when we were too busy with other
issues.
Cheers
Marcel
> Simon Glass (8):
> ? arm: Remove colibri_pxa270 board
> ? arm: Remove h2200 board
> ? arm: Remove zipitz2 board
> ? arm: Drop pxa serial driver
> ? serial: Update docs to indicate mcfuart supports DM_SERIAL
> ? arm: Remove smdk2410 board
> ? arm: Remove VCMA9 board
> ? serial: Drop the s3c24x0 serial driver
>
> ?arch/arm/Kconfig??????????????????????????????|??25 --
> ?board/h2200/Kconfig???????????????????????????|???9 -
> ?board/h2200/MAINTAINERS???????????????????????|???6 -
> ?board/h2200/Makefile??????????????????????????|??14 -
> ?board/h2200/h2200-header.S????????????????????|??15 -
> ?board/h2200/h2200.c???????????????????????????|??73 ----
> ?board/mpl/common/common_util.c????????????????|??23 --
> ?board/mpl/vcma9/Kconfig???????????????????????|??15 -
> ?board/mpl/vcma9/MAINTAINERS???????????????????|???6 -
> ?board/mpl/vcma9/Makefile??????????????????????|??11 -
> ?board/mpl/vcma9/cmd_vcma9.c???????????????????| 119 ------
> ?board/mpl/vcma9/lowlevel_init.S???????????????| 500 ----------------
> ----------
> ?board/mpl/vcma9/vcma9.c???????????????????????| 209 -----------
> ?board/mpl/vcma9/vcma9.h???????????????????????|??28 --
> ?board/samsung/smdk2410/Kconfig????????????????|??15 -
> ?board/samsung/smdk2410/MAINTAINERS????????????|???6 -
> ?board/samsung/smdk2410/Makefile???????????????|???9 -
> ?board/samsung/smdk2410/lowlevel_init.S????????| 146 --------
> ?board/samsung/smdk2410/smdk2410.c?????????????| 139 -------
> ?board/toradex/colibri_pxa270/Kconfig??????????|??12 -
> ?board/toradex/colibri_pxa270/MAINTAINERS??????|???6 -
> ?board/toradex/colibri_pxa270/Makefile?????????|???9 -
> ?board/toradex/colibri_pxa270/colibri_pxa270.c | 107 ------
> ?board/zipitz2/Kconfig?????????????????????????|???9 -
> ?board/zipitz2/MAINTAINERS?????????????????????|???6 -
> ?board/zipitz2/Makefile????????????????????????|??10 -
> ?board/zipitz2/zipitz2.c???????????????????????| 217 -----------
> ?configs/VCMA9_defconfig???????????????????????|??16 -
> ?configs/colibri_pxa270_defconfig??????????????|??19 -
> ?configs/h2200_defconfig???????????????????????|??25 --
> ?configs/smdk2410_defconfig????????????????????|??16 -
> ?configs/zipitz2_defconfig?????????????????????|??19 -
> ?doc/driver-model/serial-howto.txt?????????????|???3 -
> ?drivers/serial/Makefile???????????????????????|???2 -
> ?drivers/serial/serial_pxa.c???????????????????| 299 ---------------
> ?drivers/serial/serial_s3c24x0.c???????????????| 208 -----------
> ?include/configs/VCMA9.h???????????????????????| 207 -----------
> ?include/configs/colibri_pxa270.h??????????????| 223 ------------
> ?include/configs/h2200.h???????????????????????| 155 --------
> ?include/configs/smdk2410.h????????????????????| 181 ----------
> ?include/configs/zipitz2.h?????????????????????| 213 -----------
> ?scripts/config_whitelist.txt??????????????????|???6 -
> ?42 files changed, 3336 deletions(-)
> ?delete mode 100644 board/h2200/Kconfig
> ?delete mode 100644 board/h2200/MAINTAINERS
> ?delete mode 100644 board/h2200/Makefile
> ?delete mode 100644 board/h2200/h2200-header.S
> ?delete mode 100644 board/h2200/h2200.c
> ?delete mode 100644 board/mpl/vcma9/Kconfig
> ?delete mode 100644 board/mpl/vcma9/MAINTAINERS
> ?delete mode 100644 board/mpl/vcma9/Makefile
> ?delete mode 100644 board/mpl/vcma9/cmd_vcma9.c
> ?delete mode 100644 board/mpl/vcma9/lowlevel_init.S
> ?delete mode 100644 board/mpl/vcma9/vcma9.c
> ?delete mode 100644 board/mpl/vcma9/vcma9.h
> ?delete mode 100644 board/samsung/smdk2410/Kconfig
> ?delete mode 100644 board/samsung/smdk2410/MAINTAINERS
> ?delete mode 100644 board/samsung/smdk2410/Makefile
> ?delete mode 100644 board/samsung/smdk2410/lowlevel_init.S
> ?delete mode 100644 board/samsung/smdk2410/smdk2410.c
> ?delete mode 100644 board/toradex/colibri_pxa270/Kconfig
> ?delete mode 100644 board/toradex/colibri_pxa270/MAINTAINERS
> ?delete mode 100644 board/toradex/colibri_pxa270/Makefile
> ?delete mode 100644 board/toradex/colibri_pxa270/colibri_pxa270.c
> ?delete mode 100644 board/zipitz2/Kconfig
> ?delete mode 100644 board/zipitz2/MAINTAINERS
> ?delete mode 100644 board/zipitz2/Makefile
> ?delete mode 100644 board/zipitz2/zipitz2.c
> ?delete mode 100644 configs/VCMA9_defconfig
> ?delete mode 100644 configs/colibri_pxa270_defconfig
> ?delete mode 100644 configs/h2200_defconfig
> ?delete mode 100644 configs/smdk2410_defconfig
> ?delete mode 100644 configs/zipitz2_defconfig
> ?delete mode 100644 drivers/serial/serial_pxa.c
> ?delete mode 100644 drivers/serial/serial_s3c24x0.c
> ?delete mode 100644 include/configs/VCMA9.h
> ?delete mode 100644 include/configs/colibri_pxa270.h
> ?delete mode 100644 include/configs/h2200.h
> ?delete mode 100644 include/configs/smdk2410.h
> ?delete mode 100644 include/configs/zipitz2.h
^ permalink raw reply [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 0/8] dm: Update on serial driver progress
2016-10-21 6:52 ` [U-Boot] [PATCH 0/8] dm: Update on serial driver progress Marcel Ziswiler
@ 2016-10-21 8:10 ` Marek Vasut
2016-10-26 16:30 ` Simon Glass
0 siblings, 1 reply; 15+ messages in thread
From: Marek Vasut @ 2016-10-21 8:10 UTC (permalink / raw)
To: u-boot
On 10/21/2016 08:52 AM, Marcel Ziswiler wrote:
> Hi Simon
>
> On Thu, 2016-10-20 at 13:06 -0600, Simon Glass wrote:
>> Only three serial drivers remain to be converted. This series drops
>> two of those, since the boards appear to be unmaintained.
>>
>> With this, only blackfin remains.
>>
>> The blackfin driver probably needs to be converted as there is recent
>> activity with these boards. I am copying the maintainer so that this
>> work can be completed.
>
> Could you please hold off with dropping the PXA serial driver and
> accompanying PXA270 support. I will have a look at it ASAP. We do
> actually continue to sell the Colibri PXA270 (as we are the Colibri
> PXA320) and I have been maintaining it lately with sending patches as
> recently as last week! It would be rather sad to see it drop like the
> PXA3xx support did a couple years back when we were too busy with other
> issues.
>
> Cheers
>
> Marcel
>
>> Simon Glass (8):
>> arm: Remove colibri_pxa270 board
>> arm: Remove h2200 board
>> arm: Remove zipitz2 board
>> arm: Drop pxa serial driver
Whoa, would be nice to keep me on Cc regarding PXA stuff. Thanks for
CCing me, Marcel. And I would like to NAK these first four patches.
>> serial: Update docs to indicate mcfuart supports DM_SERIAL
>> arm: Remove smdk2410 board
>> arm: Remove VCMA9 board
>> serial: Drop the s3c24x0 serial driver
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 0/8] dm: Update on serial driver progress
2016-10-21 8:10 ` Marek Vasut
@ 2016-10-26 16:30 ` Simon Glass
2016-10-28 10:44 ` Marcel Ziswiler
0 siblings, 1 reply; 15+ messages in thread
From: Simon Glass @ 2016-10-26 16:30 UTC (permalink / raw)
To: u-boot
Hi,
On 21 October 2016 at 01:10, Marek Vasut <marex@denx.de> wrote:
> On 10/21/2016 08:52 AM, Marcel Ziswiler wrote:
>> Hi Simon
>>
>> On Thu, 2016-10-20 at 13:06 -0600, Simon Glass wrote:
>>> Only three serial drivers remain to be converted. This series drops
>>> two of those, since the boards appear to be unmaintained.
>>>
>>> With this, only blackfin remains.
>>>
>>> The blackfin driver probably needs to be converted as there is recent
>>> activity with these boards. I am copying the maintainer so that this
>>> work can be completed.
>>
>> Could you please hold off with dropping the PXA serial driver and
>> accompanying PXA270 support. I will have a look at it ASAP. We do
>> actually continue to sell the Colibri PXA270 (as we are the Colibri
>> PXA320) and I have been maintaining it lately with sending patches as
>> recently as last week! It would be rather sad to see it drop like the
>> PXA3xx support did a couple years back when we were too busy with other
>> issues.
OK we can hold off - when do you expect to do this?
Also re PXA3xx, please feel free to bring it back. If I recall it was
only removed long after the deadline for conversion.
>>
>> Cheers
>>
>> Marcel
>>
>>> Simon Glass (8):
>>> arm: Remove colibri_pxa270 board
>>> arm: Remove h2200 board
>>> arm: Remove zipitz2 board
>>> arm: Drop pxa serial driver
>
> Whoa, would be nice to keep me on Cc regarding PXA stuff. Thanks for
> CCing me, Marcel. And I would like to NAK these first four patches.
>
>>> serial: Update docs to indicate mcfuart supports DM_SERIAL
>>> arm: Remove smdk2410 board
>>> arm: Remove VCMA9 board
>>> serial: Drop the s3c24x0 serial driver
>
> --
> Best regards,
> Marek Vasut
Regards,
Simon
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 0/8] dm: Update on serial driver progress
2016-10-26 16:30 ` Simon Glass
@ 2016-10-28 10:44 ` Marcel Ziswiler
2016-11-02 1:55 ` Simon Glass
0 siblings, 1 reply; 15+ messages in thread
From: Marcel Ziswiler @ 2016-10-28 10:44 UTC (permalink / raw)
To: u-boot
On Wed, 2016-10-26 at 16:30 +0000, Simon Glass wrote:
> Hi,
>
> On 21 October 2016 at 01:10, Marek Vasut <marex@denx.de> wrote:
> >
> > On 10/21/2016 08:52 AM, Marcel Ziswiler wrote:
> > >
> > > Hi Simon
> > >
> > > On Thu, 2016-10-20 at 13:06 -0600, Simon Glass wrote:
> > > >
> > > > Only three serial drivers remain to be converted. This series
> > > > drops
> > > > two of those, since the boards appear to be unmaintained.
> > > >
> > > > With this, only blackfin remains.
> > > >
> > > > The blackfin driver probably needs to be converted as there is
> > > > recent
> > > > activity with these boards. I am copying the maintainer so that
> > > > this
> > > > work can be completed.
> > > Could you please hold off with dropping the PXA serial driver and
> > > accompanying PXA270 support. I will have a look at it ASAP. We do
> > > actually continue to sell the Colibri PXA270 (as we are the
> > > Colibri
> > > PXA320) and I have been maintaining it lately with sending
> > > patches as
> > > recently as last week! It would be rather sad to see it drop like
> > > the
> > > PXA3xx support did a couple years back when we were too busy with
> > > other
> > > issues.
> OK we can hold off - when do you expect to do this?
Thanks Simon, I'm looking into it right now.
> Also re PXA3xx, please feel free to bring it back. If I recall it was
> only removed long after the deadline for conversion.
Yeah, I guess the only constant is change (;-p).
> > >
> > >
> > > Cheers
> > >
> > > Marcel
> > >
> > > >
> > > > Simon Glass (8):
> > > > ? arm: Remove colibri_pxa270 board
> > > > ? arm: Remove h2200 board
> > > > ? arm: Remove zipitz2 board
> > > > ? arm: Drop pxa serial driver
> > Whoa, would be nice to keep me on Cc regarding PXA stuff. Thanks
> > for
> > CCing me, Marcel. And I would like to NAK these first four patches.
> >
> > >
> > > >
> > > > ? serial: Update docs to indicate mcfuart supports DM_SERIAL
> > > > ? arm: Remove smdk2410 board
> > > > ? arm: Remove VCMA9 board
> > > > ? serial: Drop the s3c24x0 serial driver
> > --
> > Best regards,
> > Marek Vasut
> Regards,
> Simon
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 0/8] dm: Update on serial driver progress
2016-10-28 10:44 ` Marcel Ziswiler
@ 2016-11-02 1:55 ` Simon Glass
2016-11-02 15:44 ` Marcel Ziswiler
0 siblings, 1 reply; 15+ messages in thread
From: Simon Glass @ 2016-11-02 1:55 UTC (permalink / raw)
To: u-boot
Hi Marcel,
On 28 October 2016 at 04:44, Marcel Ziswiler
<marcel.ziswiler@toradex.com> wrote:
> On Wed, 2016-10-26 at 16:30 +0000, Simon Glass wrote:
>> Hi,
>>
>> On 21 October 2016 at 01:10, Marek Vasut <marex@denx.de> wrote:
>> >
>> > On 10/21/2016 08:52 AM, Marcel Ziswiler wrote:
>> > >
>> > > Hi Simon
>> > >
>> > > On Thu, 2016-10-20 at 13:06 -0600, Simon Glass wrote:
>> > > >
>> > > > Only three serial drivers remain to be converted. This series
>> > > > drops
>> > > > two of those, since the boards appear to be unmaintained.
>> > > >
>> > > > With this, only blackfin remains.
>> > > >
>> > > > The blackfin driver probably needs to be converted as there is
>> > > > recent
>> > > > activity with these boards. I am copying the maintainer so that
>> > > > this
>> > > > work can be completed.
>> > > Could you please hold off with dropping the PXA serial driver and
>> > > accompanying PXA270 support. I will have a look at it ASAP. We do
>> > > actually continue to sell the Colibri PXA270 (as we are the
>> > > Colibri
>> > > PXA320) and I have been maintaining it lately with sending
>> > > patches as
>> > > recently as last week! It would be rather sad to see it drop like
>> > > the
>> > > PXA3xx support did a couple years back when we were too busy with
>> > > other
>> > > issues.
>> OK we can hold off - when do you expect to do this?
>
> Thanks Simon, I'm looking into it right now.
Great. Also are you going to bring back the other PXA boards? It
should be really easy - I very much doubt that there will be any odd
bugs with generic board.
>
>> Also re PXA3xx, please feel free to bring it back. If I recall it was
>> only removed long after the deadline for conversion.
>
> Yeah, I guess the only constant is change (;-p).
Well I wish it could happen for free :-) This was signaled for a long
long time. I think we missed an email to maintainers for the generic
board stuff, but I thought that serial drivers were well communicated.
I hope that maintainers can take on a little work every now and then.
Regards,
Simon
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 0/8] dm: Update on serial driver progress
2016-11-02 1:55 ` Simon Glass
@ 2016-11-02 15:44 ` Marcel Ziswiler
0 siblings, 0 replies; 15+ messages in thread
From: Marcel Ziswiler @ 2016-11-02 15:44 UTC (permalink / raw)
To: u-boot
On Tue, 2016-11-01 at 19:55 -0600, Simon Glass wrote:
> Hi Marcel,
>
> On 28 October 2016 at 04:44, Marcel Ziswiler
> <marcel.ziswiler@toradex.com> wrote:
> >
> > On Wed, 2016-10-26 at 16:30 +0000, Simon Glass wrote:
> > > ...
> > > OK we can hold off - when do you expect to do this?
> > Thanks Simon, I'm looking into it right now.
> Great. Also are you going to bring back the other PXA boards? It
> should be really easy - I very much doubt that there will be any odd
> bugs with generic board.
I once considered looking at Colibri PXA3xx again but since did not
really have much time. I am also missing any other PXA3xx hardware to
do any kind of cross testing.
> > > Also re PXA3xx, please feel free to bring it back. If I recall it
> > > was
> > > only removed long after the deadline for conversion.
> > Yeah, I guess the only constant is change (;-p).
> Well I wish it could happen for free :-) This was signaled for a long
> long time.
Yes, no pun intended.
> I think we missed an email to maintainers for the generic
> board stuff, but I thought that serial drivers were well
> communicated.
Yes, agreed. I also remember Marek having enquired about me doing this
once but I did not take the bait back then.
> I hope that maintainers can take on a little work every now and then.
Agreed but I am not really the PXA270 maintainer nor was the one of
PXA3xx.
> Regards,
> Simon
Cheers
Marcel
^ permalink raw reply [flat|nested] 15+ messages in thread