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From: Mark Rutland <mark.rutland@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: marc.zyngier@arm.com, catalin.marinas@arm.com,
	will.deacon@arm.com, kvmarm@lists.cs.columbia.edu
Subject: [PATCH 01/15] arm64: sysreg: sort by encoding
Date: Thu,  9 Mar 2017 17:07:13 +0000	[thread overview]
Message-ID: <1489079247-31092-2-git-send-email-mark.rutland@arm.com> (raw)
In-Reply-To: <1489079247-31092-1-git-send-email-mark.rutland@arm.com>

Out sysreg definitions are largely (but not entirely) in ascending order
of op0:op1:CRn:CRm:op2.

It would be preferable to enforce this sort, as this makes it easier to
verify the set of encodings against documentation, and provides an
obvious location for each addition in future, minimising conflicts.

This patch enforces this order, by moving the few items that break it.
There should be no functional change.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/sysreg.h | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index ac24b6e..e6498ac 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -81,6 +81,14 @@
 
 #endif	/* CONFIG_BROKEN_GAS_INST */
 
+#define REG_PSTATE_PAN_IMM		sys_reg(0, 0, 4, 0, 4)
+#define REG_PSTATE_UAO_IMM		sys_reg(0, 0, 4, 0, 3)
+
+#define SET_PSTATE_PAN(x) __emit_inst(0xd5000000 | REG_PSTATE_PAN_IMM |	\
+				      (!!x)<<8 | 0x1f)
+#define SET_PSTATE_UAO(x) __emit_inst(0xd5000000 | REG_PSTATE_UAO_IMM |	\
+				      (!!x)<<8 | 0x1f)
+
 #define SYS_MIDR_EL1			sys_reg(3, 0, 0, 0, 0)
 #define SYS_MPIDR_EL1			sys_reg(3, 0, 0, 0, 5)
 #define SYS_REVIDR_EL1			sys_reg(3, 0, 0, 0, 6)
@@ -118,17 +126,10 @@
 #define SYS_ID_AA64MMFR1_EL1		sys_reg(3, 0, 0, 7, 1)
 #define SYS_ID_AA64MMFR2_EL1		sys_reg(3, 0, 0, 7, 2)
 
-#define SYS_CNTFRQ_EL0			sys_reg(3, 3, 14, 0, 0)
 #define SYS_CTR_EL0			sys_reg(3, 3, 0, 0, 1)
 #define SYS_DCZID_EL0			sys_reg(3, 3, 0, 0, 7)
 
-#define REG_PSTATE_PAN_IMM		sys_reg(0, 0, 4, 0, 4)
-#define REG_PSTATE_UAO_IMM		sys_reg(0, 0, 4, 0, 3)
-
-#define SET_PSTATE_PAN(x) __emit_inst(0xd5000000 | REG_PSTATE_PAN_IMM |	\
-				      (!!x)<<8 | 0x1f)
-#define SET_PSTATE_UAO(x) __emit_inst(0xd5000000 | REG_PSTATE_UAO_IMM |	\
-				      (!!x)<<8 | 0x1f)
+#define SYS_CNTFRQ_EL0			sys_reg(3, 3, 14, 0, 0)
 
 /* Common SCTLR_ELx flags. */
 #define SCTLR_ELx_EE    (1 << 25)
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/15] arm64: sysreg: sort by encoding
Date: Thu,  9 Mar 2017 17:07:13 +0000	[thread overview]
Message-ID: <1489079247-31092-2-git-send-email-mark.rutland@arm.com> (raw)
In-Reply-To: <1489079247-31092-1-git-send-email-mark.rutland@arm.com>

Out sysreg definitions are largely (but not entirely) in ascending order
of op0:op1:CRn:CRm:op2.

It would be preferable to enforce this sort, as this makes it easier to
verify the set of encodings against documentation, and provides an
obvious location for each addition in future, minimising conflicts.

This patch enforces this order, by moving the few items that break it.
There should be no functional change.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/sysreg.h | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index ac24b6e..e6498ac 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -81,6 +81,14 @@
 
 #endif	/* CONFIG_BROKEN_GAS_INST */
 
+#define REG_PSTATE_PAN_IMM		sys_reg(0, 0, 4, 0, 4)
+#define REG_PSTATE_UAO_IMM		sys_reg(0, 0, 4, 0, 3)
+
+#define SET_PSTATE_PAN(x) __emit_inst(0xd5000000 | REG_PSTATE_PAN_IMM |	\
+				      (!!x)<<8 | 0x1f)
+#define SET_PSTATE_UAO(x) __emit_inst(0xd5000000 | REG_PSTATE_UAO_IMM |	\
+				      (!!x)<<8 | 0x1f)
+
 #define SYS_MIDR_EL1			sys_reg(3, 0, 0, 0, 0)
 #define SYS_MPIDR_EL1			sys_reg(3, 0, 0, 0, 5)
 #define SYS_REVIDR_EL1			sys_reg(3, 0, 0, 0, 6)
@@ -118,17 +126,10 @@
 #define SYS_ID_AA64MMFR1_EL1		sys_reg(3, 0, 0, 7, 1)
 #define SYS_ID_AA64MMFR2_EL1		sys_reg(3, 0, 0, 7, 2)
 
-#define SYS_CNTFRQ_EL0			sys_reg(3, 3, 14, 0, 0)
 #define SYS_CTR_EL0			sys_reg(3, 3, 0, 0, 1)
 #define SYS_DCZID_EL0			sys_reg(3, 3, 0, 0, 7)
 
-#define REG_PSTATE_PAN_IMM		sys_reg(0, 0, 4, 0, 4)
-#define REG_PSTATE_UAO_IMM		sys_reg(0, 0, 4, 0, 3)
-
-#define SET_PSTATE_PAN(x) __emit_inst(0xd5000000 | REG_PSTATE_PAN_IMM |	\
-				      (!!x)<<8 | 0x1f)
-#define SET_PSTATE_UAO(x) __emit_inst(0xd5000000 | REG_PSTATE_UAO_IMM |	\
-				      (!!x)<<8 | 0x1f)
+#define SYS_CNTFRQ_EL0			sys_reg(3, 3, 14, 0, 0)
 
 /* Common SCTLR_ELx flags. */
 #define SCTLR_ELx_EE    (1 << 25)
-- 
1.9.1

  reply	other threads:[~2017-03-09 17:06 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-09 17:07 [PATCH 00/15] arm64/kvm: use common sysreg definitions Mark Rutland
2017-03-09 17:07 ` Mark Rutland
2017-03-09 17:07 ` Mark Rutland [this message]
2017-03-09 17:07   ` [PATCH 01/15] arm64: sysreg: sort by encoding Mark Rutland
2017-03-09 17:07 ` [PATCH 02/15] arm64: sysreg: add debug system registers Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 03/15] arm64: sysreg: add performance monitor registers Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 04/15] arm64: sysreg: subsume GICv3 sysreg definitions Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 05/15] arm64: sysreg: add physical timer registers Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 06/15] arm64: sysreg: add register encodings used by KVM Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 07/15] arm64: sysreg: add Set/Way sys encodings Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 08/15] KVM: arm64: add SYS_DESC() Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 09/15] KVM: arm64: Use common debug sysreg definitions Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 10/15] KVM: arm64: Use common performance monitor " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 11/15] KVM: arm64: Use common GICv3 " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 12/15] KVM: arm64: Use common physical timer " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 13/15] KVM: arm64: use common invariant " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 14/15] KVM: arm64: Use common " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 15/15] KVM: arm64: Use common Set/Way sys definitions Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-10  8:17 ` [PATCH 00/15] arm64/kvm: use common sysreg definitions Marc Zyngier
2017-03-10  8:17   ` Marc Zyngier
2017-03-10 18:35   ` Will Deacon
2017-03-10 18:35     ` Will Deacon
2017-03-10 18:42     ` Mark Rutland
2017-03-10 18:42       ` Mark Rutland
2017-03-11 11:06     ` Marc Zyngier
2017-03-11 11:06       ` Marc Zyngier
2017-03-22 18:35     ` Mark Rutland
2017-03-22 18:35       ` Mark Rutland
2017-03-28 18:48       ` Mark Rutland
2017-03-28 18:48         ` Mark Rutland
2017-03-28 20:29         ` Christoffer Dall
2017-03-28 20:29           ` Christoffer Dall
2017-03-29  8:41           ` Will Deacon
2017-03-29  8:41             ` Will Deacon
2017-03-29  9:55             ` Mark Rutland
2017-03-29  9:55               ` Mark Rutland
2017-04-04 17:11             ` Catalin Marinas
2017-04-04 17:11               ` Catalin Marinas
2017-03-15  9:07   ` Christoffer Dall
2017-03-15  9:07     ` Christoffer Dall

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