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From: Mark Rutland <mark.rutland@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: marc.zyngier@arm.com, catalin.marinas@arm.com,
	will.deacon@arm.com, kvmarm@lists.cs.columbia.edu
Subject: [PATCH 03/15] arm64: sysreg: add performance monitor registers
Date: Thu,  9 Mar 2017 17:07:15 +0000	[thread overview]
Message-ID: <1489079247-31092-4-git-send-email-mark.rutland@arm.com> (raw)
In-Reply-To: <1489079247-31092-1-git-send-email-mark.rutland@arm.com>

This patch adds sysreg definitions for system registers which are part
of the performance monitors extension. Subsequent patches will make use
of these definitions.

The set of registers is described in ARM DDI 0487A.k_iss10775, Table
D5-9. The encodings were taken from Table C5-6 in the same document.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/sysreg.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index b54f8a4..3498d02 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -149,11 +149,36 @@
 #define SYS_ID_AA64MMFR1_EL1		sys_reg(3, 0, 0, 7, 1)
 #define SYS_ID_AA64MMFR2_EL1		sys_reg(3, 0, 0, 7, 2)
 
+#define SYS_PMINTENSET_EL1		sys_reg(3, 0, 9, 14, 1)
+#define SYS_PMINTENCLR_EL1		sys_reg(3, 0, 9, 14, 2)
+
 #define SYS_CTR_EL0			sys_reg(3, 3, 0, 0, 1)
 #define SYS_DCZID_EL0			sys_reg(3, 3, 0, 0, 7)
 
+#define SYS_PMCR_EL0			sys_reg(3, 3, 9, 12, 0)
+#define SYS_PMCNTENSET_EL0		sys_reg(3, 3, 9, 12, 1)
+#define SYS_PMCNTENCLR_EL0		sys_reg(3, 3, 9, 12, 2)
+#define SYS_PMOVSCLR_EL0		sys_reg(3, 3, 9, 12, 3)
+#define SYS_PMSWINC_EL0			sys_reg(3, 3, 9, 12, 4)
+#define SYS_PMSELR_EL0			sys_reg(3, 3, 9, 12, 5)
+#define SYS_PMCEID0_EL0			sys_reg(3, 3, 9, 12, 6)
+#define SYS_PMCEID1_EL0			sys_reg(3, 3, 9, 12, 7)
+#define SYS_PMCCNTR_EL0			sys_reg(3, 3, 9, 13, 0)
+#define SYS_PMXEVTYPER_EL0		sys_reg(3, 3, 9, 13, 1)
+#define SYS_PMXEVCNTR_EL0		sys_reg(3, 3, 9, 13, 2)
+#define SYS_PMUSERENR_EL0		sys_reg(3, 3, 9, 14, 0)
+#define SYS_PMOVSSET_EL0		sys_reg(3, 3, 9, 14, 3)
+
 #define SYS_CNTFRQ_EL0			sys_reg(3, 3, 14, 0, 0)
 
+#define __PMEV_op2(n)			((n) & 0x7)
+#define __CNTR_CRm(n)			(0x8 | (((n) >> 3) & 0x3))
+#define SYS_PMEVCNTRn_EL0(n)		sys_reg(3, 3, 14, __CNTR_CRm(n), __PMEV_op2(n))
+#define __TYPER_CRm(n)			(0xc | (((n) >> 3) & 0x3))
+#define SYS_PMEVTYPERn_EL0(n)		sys_reg(3, 3, 14, __TYPER_CRm(n), __PMEV_op2(n))
+
+#define SYS_PMCCFILTR_EL0		sys_reg (3, 3, 14, 15, 7)
+
 /* Common SCTLR_ELx flags. */
 #define SCTLR_ELx_EE    (1 << 25)
 #define SCTLR_ELx_I	(1 << 12)
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/15] arm64: sysreg: add performance monitor registers
Date: Thu,  9 Mar 2017 17:07:15 +0000	[thread overview]
Message-ID: <1489079247-31092-4-git-send-email-mark.rutland@arm.com> (raw)
In-Reply-To: <1489079247-31092-1-git-send-email-mark.rutland@arm.com>

This patch adds sysreg definitions for system registers which are part
of the performance monitors extension. Subsequent patches will make use
of these definitions.

The set of registers is described in ARM DDI 0487A.k_iss10775, Table
D5-9. The encodings were taken from Table C5-6 in the same document.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/sysreg.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index b54f8a4..3498d02 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -149,11 +149,36 @@
 #define SYS_ID_AA64MMFR1_EL1		sys_reg(3, 0, 0, 7, 1)
 #define SYS_ID_AA64MMFR2_EL1		sys_reg(3, 0, 0, 7, 2)
 
+#define SYS_PMINTENSET_EL1		sys_reg(3, 0, 9, 14, 1)
+#define SYS_PMINTENCLR_EL1		sys_reg(3, 0, 9, 14, 2)
+
 #define SYS_CTR_EL0			sys_reg(3, 3, 0, 0, 1)
 #define SYS_DCZID_EL0			sys_reg(3, 3, 0, 0, 7)
 
+#define SYS_PMCR_EL0			sys_reg(3, 3, 9, 12, 0)
+#define SYS_PMCNTENSET_EL0		sys_reg(3, 3, 9, 12, 1)
+#define SYS_PMCNTENCLR_EL0		sys_reg(3, 3, 9, 12, 2)
+#define SYS_PMOVSCLR_EL0		sys_reg(3, 3, 9, 12, 3)
+#define SYS_PMSWINC_EL0			sys_reg(3, 3, 9, 12, 4)
+#define SYS_PMSELR_EL0			sys_reg(3, 3, 9, 12, 5)
+#define SYS_PMCEID0_EL0			sys_reg(3, 3, 9, 12, 6)
+#define SYS_PMCEID1_EL0			sys_reg(3, 3, 9, 12, 7)
+#define SYS_PMCCNTR_EL0			sys_reg(3, 3, 9, 13, 0)
+#define SYS_PMXEVTYPER_EL0		sys_reg(3, 3, 9, 13, 1)
+#define SYS_PMXEVCNTR_EL0		sys_reg(3, 3, 9, 13, 2)
+#define SYS_PMUSERENR_EL0		sys_reg(3, 3, 9, 14, 0)
+#define SYS_PMOVSSET_EL0		sys_reg(3, 3, 9, 14, 3)
+
 #define SYS_CNTFRQ_EL0			sys_reg(3, 3, 14, 0, 0)
 
+#define __PMEV_op2(n)			((n) & 0x7)
+#define __CNTR_CRm(n)			(0x8 | (((n) >> 3) & 0x3))
+#define SYS_PMEVCNTRn_EL0(n)		sys_reg(3, 3, 14, __CNTR_CRm(n), __PMEV_op2(n))
+#define __TYPER_CRm(n)			(0xc | (((n) >> 3) & 0x3))
+#define SYS_PMEVTYPERn_EL0(n)		sys_reg(3, 3, 14, __TYPER_CRm(n), __PMEV_op2(n))
+
+#define SYS_PMCCFILTR_EL0		sys_reg (3, 3, 14, 15, 7)
+
 /* Common SCTLR_ELx flags. */
 #define SCTLR_ELx_EE    (1 << 25)
 #define SCTLR_ELx_I	(1 << 12)
-- 
1.9.1

  parent reply	other threads:[~2017-03-09 17:06 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-09 17:07 [PATCH 00/15] arm64/kvm: use common sysreg definitions Mark Rutland
2017-03-09 17:07 ` Mark Rutland
2017-03-09 17:07 ` [PATCH 01/15] arm64: sysreg: sort by encoding Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 02/15] arm64: sysreg: add debug system registers Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` Mark Rutland [this message]
2017-03-09 17:07   ` [PATCH 03/15] arm64: sysreg: add performance monitor registers Mark Rutland
2017-03-09 17:07 ` [PATCH 04/15] arm64: sysreg: subsume GICv3 sysreg definitions Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 05/15] arm64: sysreg: add physical timer registers Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 06/15] arm64: sysreg: add register encodings used by KVM Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 07/15] arm64: sysreg: add Set/Way sys encodings Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 08/15] KVM: arm64: add SYS_DESC() Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 09/15] KVM: arm64: Use common debug sysreg definitions Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 10/15] KVM: arm64: Use common performance monitor " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 11/15] KVM: arm64: Use common GICv3 " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 12/15] KVM: arm64: Use common physical timer " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 13/15] KVM: arm64: use common invariant " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 14/15] KVM: arm64: Use common " Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-09 17:07 ` [PATCH 15/15] KVM: arm64: Use common Set/Way sys definitions Mark Rutland
2017-03-09 17:07   ` Mark Rutland
2017-03-10  8:17 ` [PATCH 00/15] arm64/kvm: use common sysreg definitions Marc Zyngier
2017-03-10  8:17   ` Marc Zyngier
2017-03-10 18:35   ` Will Deacon
2017-03-10 18:35     ` Will Deacon
2017-03-10 18:42     ` Mark Rutland
2017-03-10 18:42       ` Mark Rutland
2017-03-11 11:06     ` Marc Zyngier
2017-03-11 11:06       ` Marc Zyngier
2017-03-22 18:35     ` Mark Rutland
2017-03-22 18:35       ` Mark Rutland
2017-03-28 18:48       ` Mark Rutland
2017-03-28 18:48         ` Mark Rutland
2017-03-28 20:29         ` Christoffer Dall
2017-03-28 20:29           ` Christoffer Dall
2017-03-29  8:41           ` Will Deacon
2017-03-29  8:41             ` Will Deacon
2017-03-29  9:55             ` Mark Rutland
2017-03-29  9:55               ` Mark Rutland
2017-04-04 17:11             ` Catalin Marinas
2017-04-04 17:11               ` Catalin Marinas
2017-03-15  9:07   ` Christoffer Dall
2017-03-15  9:07     ` Christoffer Dall

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