From: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> To: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org, linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Subject: [PATCH V4 4/4] pwm: tegra: Add support to configure pin state in suspends/resume Date: Thu, 6 Apr 2017 19:51:01 +0530 [thread overview] Message-ID: <1491488461-24621-5-git-send-email-ldewangan@nvidia.com> (raw) In-Reply-To: <1491488461-24621-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. The tristate (high impedance of PWM pin form Tegra) also define one of the state of PWM regulator which needs to be configure in suspend state of system. Add support to configure the pin state via pinctrl frameworks in suspend and active state of the system. Signed-off-by: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- Changes from v1: - Use standard pinctrl names for sleep and active state. - Use API pinctrl_pm_select_*() drivers/pwm/pwm-tegra.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c index e9c4de5..af1bd4f 100644 --- a/drivers/pwm/pwm-tegra.c +++ b/drivers/pwm/pwm-tegra.c @@ -29,6 +29,7 @@ #include <linux/of_device.h> #include <linux/pwm.h> #include <linux/platform_device.h> +#include <linux/pinctrl/consumer.h> #include <linux/slab.h> #include <linux/reset.h> @@ -256,6 +257,22 @@ static int tegra_pwm_remove(struct platform_device *pdev) return pwmchip_remove(&pc->chip); } +#ifdef CONFIG_PM_SLEEP +static int tegra_pwm_suspend(struct device *dev) +{ + pinctrl_pm_select_sleep_state(dev); + + return 0; +} + +static int tegra_pwm_resume(struct device *dev) +{ + pinctrl_pm_select_default_state(dev); + + return 0; +} +#endif + static const struct tegra_pwm_soc tegra20_pwm_soc = { .num_channels = 4, }; @@ -272,10 +289,15 @@ static const struct of_device_id tegra_pwm_of_match[] = { MODULE_DEVICE_TABLE(of, tegra_pwm_of_match); +static const struct dev_pm_ops tegra_pwm_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(tegra_pwm_suspend, tegra_pwm_resume) +}; + static struct platform_driver tegra_pwm_driver = { .driver = { .name = "tegra-pwm", .of_match_table = tegra_pwm_of_match, + .pm = &tegra_pwm_pm_ops, }, .probe = tegra_pwm_probe, .remove = tegra_pwm_remove, -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Laxman Dewangan <ldewangan@nvidia.com> To: <thierry.reding@gmail.com>, <robh+dt@kernel.org>, <jonathanh@nvidia.com> Cc: <mark.rutland@arm.com>, <linux-pwm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Laxman Dewangan <ldewangan@nvidia.com> Subject: [PATCH V4 4/4] pwm: tegra: Add support to configure pin state in suspends/resume Date: Thu, 6 Apr 2017 19:51:01 +0530 [thread overview] Message-ID: <1491488461-24621-5-git-send-email-ldewangan@nvidia.com> (raw) In-Reply-To: <1491488461-24621-1-git-send-email-ldewangan@nvidia.com> In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. The tristate (high impedance of PWM pin form Tegra) also define one of the state of PWM regulator which needs to be configure in suspend state of system. Add support to configure the pin state via pinctrl frameworks in suspend and active state of the system. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> --- Changes from v1: - Use standard pinctrl names for sleep and active state. - Use API pinctrl_pm_select_*() drivers/pwm/pwm-tegra.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c index e9c4de5..af1bd4f 100644 --- a/drivers/pwm/pwm-tegra.c +++ b/drivers/pwm/pwm-tegra.c @@ -29,6 +29,7 @@ #include <linux/of_device.h> #include <linux/pwm.h> #include <linux/platform_device.h> +#include <linux/pinctrl/consumer.h> #include <linux/slab.h> #include <linux/reset.h> @@ -256,6 +257,22 @@ static int tegra_pwm_remove(struct platform_device *pdev) return pwmchip_remove(&pc->chip); } +#ifdef CONFIG_PM_SLEEP +static int tegra_pwm_suspend(struct device *dev) +{ + pinctrl_pm_select_sleep_state(dev); + + return 0; +} + +static int tegra_pwm_resume(struct device *dev) +{ + pinctrl_pm_select_default_state(dev); + + return 0; +} +#endif + static const struct tegra_pwm_soc tegra20_pwm_soc = { .num_channels = 4, }; @@ -272,10 +289,15 @@ static const struct of_device_id tegra_pwm_of_match[] = { MODULE_DEVICE_TABLE(of, tegra_pwm_of_match); +static const struct dev_pm_ops tegra_pwm_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(tegra_pwm_suspend, tegra_pwm_resume) +}; + static struct platform_driver tegra_pwm_driver = { .driver = { .name = "tegra-pwm", .of_match_table = tegra_pwm_of_match, + .pm = &tegra_pwm_pm_ops, }, .probe = tegra_pwm_probe, .remove = tegra_pwm_remove, -- 2.1.4
next prev parent reply other threads:[~2017-04-06 14:21 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-06 14:20 [PATCH V2 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups Laxman Dewangan 2017-04-06 14:20 ` Laxman Dewangan 2017-04-06 14:20 ` [PATCH V2 2/4] pwm: tegra: Increase precision in pwm rate calculation Laxman Dewangan 2017-04-06 14:20 ` Laxman Dewangan [not found] ` <1491488461-24621-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-06 16:24 ` Thierry Reding 2017-04-06 16:24 ` Thierry Reding 2017-04-06 17:03 ` Laxman Dewangan 2017-04-06 16:28 ` Thierry Reding 2017-04-06 16:28 ` Thierry Reding [not found] ` <1491488461-24621-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-06 14:20 ` [PATCH V2 1/4] pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local implementation Laxman Dewangan 2017-04-06 14:20 ` Laxman Dewangan 2017-04-06 16:28 ` Thierry Reding 2017-04-06 14:21 ` [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Laxman Dewangan 2017-04-06 14:21 ` Laxman Dewangan 2017-04-06 15:26 ` Jon Hunter 2017-04-06 15:26 ` Jon Hunter [not found] ` <f43c83a9-8ae0-73b0-d41d-97d3bc6c253e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-06 16:48 ` Laxman Dewangan 2017-04-06 16:48 ` Laxman Dewangan [not found] ` <58E67152.1080400-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-07 7:49 ` Jon Hunter 2017-04-07 7:49 ` Jon Hunter 2017-04-06 14:21 ` Laxman Dewangan [this message] 2017-04-06 14:21 ` [PATCH V4 4/4] pwm: tegra: Add support to configure pin state " Laxman Dewangan 2017-04-06 15:17 ` Jon Hunter 2017-04-06 15:17 ` Jon Hunter 2017-04-06 16:40 ` Laxman Dewangan 2017-04-06 16:40 ` Laxman Dewangan [not found] ` <58E66F8F.1030802-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-07 7:51 ` Jon Hunter 2017-04-07 7:51 ` Jon Hunter
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