* [PATCH 1/2] drm/amdgpu/gfx7: enable cp/rlc ints after we disable clockgating
@ 2017-04-10 21:45 Alex Deucher
[not found] ` <1491860758-22182-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Alex Deucher @ 2017-04-10 21:45 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher
Even if we disable clockgating, we still need to make sure the
cp/rlc interrupts are enabled for powergating which might still
be enabled.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 8a8bc2f..185cb31 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -3797,6 +3797,9 @@ static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable)
gfx_v7_0_update_rlc(adev, tmp);
data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK;
+ if (orig != data)
+ WREG32(mmRLC_CGCG_CGLS_CTRL, data);
+
} else {
gfx_v7_0_enable_gui_idle_interrupt(adev, false);
@@ -3806,11 +3809,11 @@ static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable)
RREG32(mmCB_CGTT_SCLK_CTRL);
data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK);
- }
-
- if (orig != data)
- WREG32(mmRLC_CGCG_CGLS_CTRL, data);
+ if (orig != data)
+ WREG32(mmRLC_CGCG_CGLS_CTRL, data);
+ gfx_v7_0_enable_gui_idle_interrupt(adev, true);
+ }
}
static void gfx_v7_0_enable_mgcg(struct amdgpu_device *adev, bool enable)
--
2.5.5
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^ permalink raw reply related [flat|nested] 3+ messages in thread[parent not found: <1491860758-22182-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>]
* [PATCH 2/2] drm/amdgpu/gfx8: enable cp/rlc ints after we disable clockgating [not found] ` <1491860758-22182-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org> @ 2017-04-10 21:45 ` Alex Deucher 2017-04-11 6:44 ` [PATCH 1/2] drm/amdgpu/gfx7: " Christian König 1 sibling, 0 replies; 3+ messages in thread From: Alex Deucher @ 2017-04-10 21:45 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher Even if we disable clockgating, we still need to make sure the cp/rlc interrupts are enabled for powergating which might still be enabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 091fa36..9bff7a9 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -6095,6 +6095,8 @@ static void gfx_v8_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); if (temp != data) WREG32(mmRLC_CGCG_CGLS_CTRL, data); + /* enable interrupts again for PG */ + gfx_v8_0_enable_gui_idle_interrupt(adev, true); } gfx_v8_0_wait_for_rlc_serdes(adev); -- 2.5.5 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] drm/amdgpu/gfx7: enable cp/rlc ints after we disable clockgating [not found] ` <1491860758-22182-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org> 2017-04-10 21:45 ` [PATCH 2/2] drm/amdgpu/gfx8: " Alex Deucher @ 2017-04-11 6:44 ` Christian König 1 sibling, 0 replies; 3+ messages in thread From: Christian König @ 2017-04-11 6:44 UTC (permalink / raw) To: Alex Deucher, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher Am 10.04.2017 um 23:45 schrieb Alex Deucher: > Even if we disable clockgating, we still need to make sure the > cp/rlc interrupts are enabled for powergating which might still > be enabled. > > Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> for both. > --- > drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > index 8a8bc2f..185cb31 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > @@ -3797,6 +3797,9 @@ static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable) > gfx_v7_0_update_rlc(adev, tmp); > > data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; > + if (orig != data) > + WREG32(mmRLC_CGCG_CGLS_CTRL, data); > + > } else { > gfx_v7_0_enable_gui_idle_interrupt(adev, false); > > @@ -3806,11 +3809,11 @@ static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable) > RREG32(mmCB_CGTT_SCLK_CTRL); > > data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); > - } > - > - if (orig != data) > - WREG32(mmRLC_CGCG_CGLS_CTRL, data); > + if (orig != data) > + WREG32(mmRLC_CGCG_CGLS_CTRL, data); > > + gfx_v7_0_enable_gui_idle_interrupt(adev, true); > + } > } > > static void gfx_v7_0_enable_mgcg(struct amdgpu_device *adev, bool enable) _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-04-10 21:45 [PATCH 1/2] drm/amdgpu/gfx7: enable cp/rlc ints after we disable clockgating Alex Deucher
[not found] ` <1491860758-22182-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2017-04-10 21:45 ` [PATCH 2/2] drm/amdgpu/gfx8: " Alex Deucher
2017-04-11 6:44 ` [PATCH 1/2] drm/amdgpu/gfx7: " Christian König
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