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From: Dinh Nguyen <dinguyen@kernel.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v8 4/7] arm: socfpga: Enable FPGA driver on SPL
Date: Mon, 19 Jun 2017 08:18:52 -0500	[thread overview]
Message-ID: <152c9d53-0664-948a-f97f-f742e0ac536f@kernel.org> (raw)
In-Reply-To: <1497868320.2111.1.camel@intel.com>



On 06/19/2017 05:32 AM, Chee, Tien Fong wrote:
> On Sel, 2017-06-13 at 11:05 +0200, Marek Vasut wrote:
>> On 06/13/2017 05:26 AM, Chee, Tien Fong wrote:
>>>
>>> On Isn, 2017-06-12 at 16:38 +0800, Chee, Tien Fong wrote:
>>>>
>>>> On Jum, 2017-06-09 at 08:52 -0500, Dinh Nguyen wrote:
>>>>>
>>>>>
>>>>>
>>>>> On 06/09/2017 03:25 AM, Marek Vasut wrote:
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>> I didn't really look since we still have a discussion open on
>>>>>> V8
>>>>>> .
>>>>>> There
>>>>>> is no point in sending new versions while discussion is still
>>>>>> open.
>>>>>> Also, I'd like some review from Ley/Dinh
>>>>> I've reviewed v6 and gave my Reviewed-by. Now I see there's a
>>>>> v10.
>>>>> Should I be reviewing v10 or wait for a new version?
>>>>>
>>>>> Dinh
>>>> If Marek agree with my planning, code cleaning for gen5 in
>>>> different
>>>> patchset. v10 is updated based on Mareks' comments on v9, then
>>>> v10
>>>> should be the final version.
>>>>
>>>> Thanks.
>>> Hi Marek,
>>>
>>> I think Dinh is still waiting answer from you.
>> Thanks for reminding me daily. I'm actually on vacation, so sorry for
>> the delayed reply.

I have no idea what question I have to Marek, but it probably doesn't
matter anymore.

>>
>>>
>>> Could you please to
>>> advice?
>> Actually I lost track of what's going on here, we're still having
>> discussion on V8 and I already have V10 in my mailbox. I have two
>> suggestions:
>> 1) Slow down, bombarding people with new versions of patches every
>> day
>>    does not help at all. Give people some space to review the
>> patchset,
>>    discuss and let the discussion settle, then submit a new set. That
>>    can take a week or more, so let's establish a rule that you will
>> not
>>    submit more than one version of the patchset each week unless
>>    explicitly asked. OK ?

+1 in agreement. Just because you're in a hurry to get a patchset
reviewed and accepted, doesn't mean the rest of us are in a hurry to
review for you. If you had done things right and planned to upstream
first, often, and frequently, you'd not be trying to push 10 versions of
patchset in 2 weeks down our throat.

>> 2) I'd like AB/RB from Dinh on this set, yes.
>>
> Hi Dinh,
> 
> Could you help to review?

Sorry, I also just got back from vacation. Will try to get to it this week.

Dinh

  reply	other threads:[~2017-06-19 13:18 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-06  6:35 [U-Boot] [PATCH v8 0/7] Add Intel Arria 10 SoC FPGA driver tien.fong.chee at intel.com
2017-06-06  6:35 ` [U-Boot] [PATCH v8 1/7] arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset tien.fong.chee at intel.com
2017-06-06  6:35 ` [U-Boot] [PATCH v8 2/7] arm: socfpga: Restructure FPGA driver in the preparation to support A10 tien.fong.chee at intel.com
2017-06-06  6:35 ` [U-Boot] [PATCH v8 3/7] arm: socfpga: Convert all Intel related FPGA configuration to Kconfig tien.fong.chee at intel.com
2017-06-06  7:57   ` Marek Vasut
2017-06-06  8:16     ` Chee, Tien Fong
2017-06-06  8:32       ` Marek Vasut
2017-06-06  8:48         ` Chee, Tien Fong
2017-06-06  8:53           ` Marek Vasut
2017-06-06  9:40             ` Chee, Tien Fong
2017-06-06  6:35 ` [U-Boot] [PATCH v8 4/7] arm: socfpga: Enable FPGA driver on SPL tien.fong.chee at intel.com
2017-06-06  8:03   ` Marek Vasut
2017-06-06  8:19     ` Chee, Tien Fong
2017-06-06  8:35       ` Marek Vasut
2017-06-06  9:36         ` Chee, Tien Fong
2017-06-06  9:41           ` Marek Vasut
2017-06-06  9:46             ` Chee, Tien Fong
2017-06-06  9:50               ` Marek Vasut
2017-06-07  3:06                 ` Chee, Tien Fong
2017-06-07  6:36                   ` Marek Vasut
2017-06-07  8:04                     ` Chee, Tien Fong
2017-06-07 11:26                       ` Chee, Tien Fong
2017-06-07 12:31                         ` Marek Vasut
2017-06-08  3:40                           ` Chee, Tien Fong
2017-06-08 12:14                             ` Marek Vasut
2017-06-09  3:39                               ` Chee, Tien Fong
2017-06-09  8:25                                 ` Marek Vasut
2017-06-09 13:52                                   ` Dinh Nguyen
2017-06-12  8:38                                     ` Chee, Tien Fong
2017-06-13  3:26                                       ` Chee, Tien Fong
2017-06-13  9:05                                         ` Marek Vasut
2017-06-14  5:35                                           ` Chee, Tien Fong
2017-06-19 10:32                                           ` Chee, Tien Fong
2017-06-19 13:18                                             ` Dinh Nguyen [this message]
2017-06-07 12:30                       ` Marek Vasut
2017-06-06  6:35 ` [U-Boot] [PATCH v8 5/7] drivers: Enable FPGA driver build " tien.fong.chee at intel.com
2017-06-06  8:03   ` Marek Vasut
2017-06-06  8:26     ` Chee, Tien Fong
2017-06-06  8:35       ` Marek Vasut
2017-06-06  9:38         ` Chee, Tien Fong
2017-06-06  6:35 ` [U-Boot] [PATCH v8 6/7] arm: socfpga: Move FPGA manager driver to FPGA driver tien.fong.chee at intel.com
2017-06-06  6:35 ` [U-Boot] [PATCH v8 7/7] arm: socfpga: Add FPGA driver support for Arria 10 tien.fong.chee at intel.com

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